`
`Petition for Inter Partes Review of USP 6,804,724
`
`IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`
`
`
`
`In re Inter Partes Review of:
`U.S. Patent No. 6,804,724
`Issued: Oct. 12, 2004
`Application No.: 09/301,609
`Filing Date: April 29, 1999
`
`For: Analog/Digital Display Adapter and a Computer System Having the
`Same
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`FILED VIA PRPS
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`DECLARATION OF JOSEPH LAMM IN SUPPORT OF
`PETITION FOR INTER PARTES REVIEW
`OF U.S. PATENT NO. 6,804,724
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`For ease of reference, Mr. Lamm refers to this declaration as being in support of
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`“’724 Petition” challenging claims 6-10.
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`NVIDIA Corp.
`Exhibit 1003
`Page 001
`
`

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`Petition for Inter Partes Review of USP 6,804,724
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`TABLE OF CONTENTS
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`Page
`
`I.
`
`INTRODUCTION AND QUALIFICATIONS ............................................... 1
`
`II. MY KNOWLEDGE OF DISPLAY ADAPTER TECHNOLOGY IN
`THE LATE-1990S ........................................................................................... 5
`
`III. UNDERSTANDING OF THE GOVERNING LAW ..................................... 6
`
`Invalidity by Anticipation or Obviousness ........................................... 6
`A.
`Interpreting Claims Before the Patent Office ........................................ 7
`B.
`Relevant Time Period for the Obviousness Analysis ............................ 8
`C.
`D. Materials Relied on in Forming My Opinion ........................................ 8
`
`IV. LEVEL OF SKILL IN THE ART ................................................................... 8
`
`A.
`
`Person of Ordinary Skill in the Art ..................................................... 11
`
`V.
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`PERSPECTIVE APPLIED IN THIS DECLARATION ............................... 12
`
`VI. OVERVIEW OF THE ’724 PATENT .......................................................... 13
`
`A. Disclosure of the ’724 Patent .............................................................. 13
`B.
`Prosecution History of the ʼ724 Patent ............................................... 19
`
`VII. THE PRIOR ART .......................................................................................... 22
`
`A. VESA P&D ......................................................................................... 22
`B.
`VESA Flat Panel Display Interface ..................................................... 30
`
`VIII. MOTIVATIONS TO COMBINE THE PRIOR ART ................................... 33
`
`A. Motivation to Combine VESA P&D with VESA Flat Panel
`Display Interface ................................................................................. 33
`
`IX. CLAIM CONSTRUCTIONS ........................................................................ 35
`
`A.
`B.
`C.
`
`Legal Standard ..................................................................................... 35
`“sending parallel digital video data” ................................................... 35
`“display enable signal” ........................................................................ 37
`
`i
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`NVIDIA Corp.
`Exhibit 1003
`Page 002
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`X. GROUNDS OF INVALIDITY ..................................................................... 38
`
`Petition for Inter Partes Review of USP 6,804,724
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`A. Ground 1: Claims 6-10 are invalid under 35 U.S.C. § 103 on the
`ground that they are rendered obvious by VESA P&D in view
`of VESA Flat Panel Display Interface. ............................................... 38
`1.
`Claim 6 ...................................................................................... 39
`2.
`Claim 7 ...................................................................................... 60
`3.
`Claim 8 ...................................................................................... 63
`4.
`Claim 9 ...................................................................................... 67
`5.
`Claim 10 .................................................................................... 73
`
`
`
`ii
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`NVIDIA Corp.
`Exhibit 1003
`Page 003
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`I.
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`Petition for Inter Partes Review of USP 6,804,724
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`I, Joseph Lamm, resident of Livingston, Montana, hereby declare as follows:
`
`INTRODUCTION AND QUALIFICATIONS
`1.
`
`I have been retained by NVIDIA Corporation (“Petitioner”) to
`
`provide my opinion concerning the validity of U.S. Patent 6,804,724 (Ex. 1001,
`
`“the ’724 patent”) in support of their Petition for Inter Partes Review of U.S.
`
`Patent No. 6,804,724 (“’724 Petition”). I have not previously been employed or
`
`retained by Petitioner in any capacity.
`
`2.
`
`I received a Bachelor’s of Science (B.S.) degree in Electrical
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`Engineering from Texas A&M University (“Texas A&M”) in 1977. Since then, I
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`have spent more than 35 years developing graphics adaptors and related display
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`technologies. Throughout my career I have founded or otherwise been at the
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`forefront of startup technology companies in this area. Technologies range from
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`the relatively primitive two-color display systems with limited memory of 1977, to
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`the ultra-high resolution, multi-monitor systems used in today’s most advanced
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`applications.
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`3.
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`I have fostered innovation and development in the graphics display
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`community throughout my career. For example, I spent more than 4 years actively
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`involved with the Video Electronics Standards Association (“VESA”). At VESA,
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`I was heavily involved in creating the Digital Packet Video Link (DPVL) and
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`Mobile Digital Display Interface (MDDI) standards, while also contributing to the
`
`1
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`NVIDIA Corp.
`Exhibit 1003
`Page 004
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`

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`Enhanced Extended Display Identification (E-EDID), Display Data Channel
`
`Petition for Inter Partes Review of USP 6,804,724
`
`Command Interface (DDC/CI) and Enhanced Display Data Channel (E-DDC)
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`standards. I was on the Board of Directors of VESA from 2004 through 2006.
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`Further, I was a member of the Society for Information Display (“SID”) from the
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`mid 1990s through 2006. At SID, as a member of the Program Committee for
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`Display Electronics, I reviewed and selected technical papers for presentation at
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`DisplayWeek, SID’s annual technical conference.
`
`4.
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`After graduating from Texas A&M, I started work as a Design
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`Engineer at Datapoint Corporation (“Datapoint”), in San Antonio, Texas, in 1977.
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`At Datapoint, I worked on ASCII terminals that used character based display
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`controllers. Some of the units had attached computers.
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`5.
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`I started work at Basic Four Information Systems (“Basic Four”) in
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`Houston, Texas, in 1979. At Basic Four, I led a team of about 12 Design
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`Engineers developing a stand-alone Word Processing computer. The system was
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`character-based and used a CRT display.
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`6.
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`I joined Florida Computer Graphics in Orlando, Florida, in 1980,
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`where I worked as a Design Engineer and System Architect. This is when I began
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`my work on more modern graphics systems that would be familiar to most people
`
`today. Specifically, I designed a hardware system to support traditional character-
`
`based graphics that were overlaid on top of a more advanced bitmapped back-
`
`2
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`NVIDIA Corp.
`Exhibit 1003
`Page 005
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`ground. I also designed a graphics engine using a bit-slice processor for fast
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`Petition for Inter Partes Review of USP 6,804,724
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`graphics processing.
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`7.
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`At Florida Computer Graphics, we relied on superior graphics pro-
`
`cessing to differentiate our products from those of our competitors. While our dis-
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`play resolution was limited to 640 x 480 pixels, I optimized signal integrity by de-
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`signing a parallel digital interface to transmit the RGB color values from the
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`graphics processor to the CRT monitor. Because our CRT monitor was analog, we
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`designed a digital-to-analog (D/A) converter, which was installed on the neck of
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`the CRT bottle to convert the digital RGB information to analog for display.
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`8.
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`In 1983, I founded FCG Engineering and served as its President. At
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`FCG Engineering, we designed and built modular high-end workstations compo-
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`nents including processors, memory, disk controllers and graphics boards. These
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`products were designed to support multiple displays for high end systems. Further,
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`even as President at FCG Engineering, I spent the majority of my time entrenched
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`in the technical aspects of designing and building the circuit boards for graphical
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`display systems.
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`9.
`
`In 1987, having achieved some success, I, along with the other em-
`
`ployees of FCG Engineering, bought the company and renamed it Tech Source,
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`Inc. (“Tech Source”). Our idea at Tech Source was to focus the new company only
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`on the technology that we did best, namely, high-end graphics processors, control-
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`3
`
`NVIDIA Corp.
`Exhibit 1003
`Page 006
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`lers, and display adaptors. My official title at Tech Source changed between Presi-
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`Petition for Inter Partes Review of USP 6,804,724
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`dent, Chief Technology Officer, and Vice President, as needed, but I worked very
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`closely with the technology at all times. Specifically, I supervised a technical staff
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`that grew to about 16 engineers, while also personally designing many of our
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`graphics technologies.
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`10. At Tech Source, we quickly became known for one of our flagship
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`products, a graphics controller to support 2048 x 2048 pixel resolution for use with
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`the Sony DDM2801 monitor. This product was used in such demanding indus-
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`tries as air traffic control, medical imaging, and military applications. We also de-
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`veloped hardware and software as an OEM to Sun Microsystems. Eventually,
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`Tech Source was realizing up to 25 million USD in annual revenue.
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`11.
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`In 2005, I left day-to-day work at Tech Source, and founded my own
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`graphics consulting practice, Jovis consulting (“Jovis”). I continued to work on,
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`for example, design projects related to display adaptor technology including high
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`resolution lossless digital video recorders, fiber optic video repeaters and an inter-
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`face to a heads up display on F16 and B1 aircraft simulators. I have also served as
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`a consultant and expert witness on several intellectual property cases relating to my
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`expertise.
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`12.
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`In addition, I am co-inventor of a United States patent on technology
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`that I developed at Tech Source related to a high-speed multiplexed digital-to-
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`4
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`NVIDIA Corp.
`Exhibit 1003
`Page 007
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`

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`analog converter. I have also published several papers and have given conference
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`Petition for Inter Partes Review of USP 6,804,724
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`presentations relating to graphics processors and display interfaces, including the
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`standardization of such systems.
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`13.
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`In summary, I have extensive technical experience, as front line tech-
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`nical staff member, and as a technical supervisor of other staff members, relating to
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`all aspects of display adaptor technology, including protocol design, standardiza-
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`tion, and multi-display aspects, that have been developed over at least the past 35
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`years.
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`14. My curriculum vitae is attached as Ex. 1004. My work in this matter
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`is being billed at a rate of $250 per hour, with reimbursement for necessary and
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`reasonable expenses. My compensation is not in any way contingent upon the out-
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`come of any inter partes review. I have no financial or personal interest in the out-
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`come of this proceeding or any related litigation.
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`II. MY KNOWLEDGE OF DISPLAY ADAPTER TECHNOLOGY IN
`THE LATE-1990S
`15. As I have described above, I was heavily involved in the rapidly
`
`developing graphics display industry from the late-1970s through the present. My
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`work on modern graphics technologies, including bitmapped graphics, multi-
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`display high-resolution systems, and “intelligent” graphics adaptors has been
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`ongoing at least since 1980, and thus, surrounded a time period that included the
`
`5
`
`NVIDIA Corp.
`Exhibit 1003
`Page 008
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`April 29, 1999 filing date, and April 29, 1998 earliest-claimed priority date, of the
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`Petition for Inter Partes Review of USP 6,804,724
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`’724 patent.
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`16. More particularly, because I continually worked at small startup-type
`
`companies, and often with a significant personal stake in the company’s success,
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`my livelihood has depended on understanding the commercial state-of-art in the
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`rapidly evolving graphics industry during this time period.
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`17. As such, during the time period in question, I constantly reviewed
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`new technologies and standards, including VESA standards, to assess what
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`features I should build into my own products at the companies at which I have
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`worked. I also constantly assessed what our competitors were doing in the same
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`technology space.
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`III. UNDERSTANDING OF THE GOVERNING LAW
`A.
`Invalidity by Anticipation or Obviousness
`18.
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`I understand that a patent claim is invalid if it is anticipated or obvious
`
`in view of the prior art. I further understand that invalidity of a claim requires that
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`the claim be anticipated or obvious from the perspective of a person of ordinary
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`skill in the relevant art (“POSITA”), at the time the invention was made.
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`19.
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`I understand that anticipation of a claim requires that every element of
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`a claim be disclosed expressly or inherently in a single prior art reference, arranged
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`as in the claim. In analyzing obviousness in light of the prior art, I understand that
`
`6
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`NVIDIA Corp.
`Exhibit 1003
`Page 009
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`

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`it is important to understand the scope of the claims, the level of skill in the
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`Petition for Inter Partes Review of USP 6,804,724
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`relevant art, the scope and content of the prior art, the differences between the prior
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`art and the claims, and any secondary considerations.
`
`20.
`
`I also understand that if a technique has been used to improve one de-
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`vice, and a person of ordinary skill in the art would recognize that it would im-
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`prove similar devices in the same way, using the technique is obvious unless its ac-
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`tual application is beyond his or her skill. There may also be a specific teaching,
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`suggestion or motivation to combine a prior art reference with another prior art ref-
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`erence. Such a teaching, suggestion, or motivation to combine the prior art refer-
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`ences may be explicit or implicit in the prior art.
`
`B.
`21.
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`Interpreting Claims Before the Patent Office
`
`I understand that Inter Partes Review is a proceeding before the
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`United States Patent & Trademark Office for evaluating the validity of an issued
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`patent claim. I understand that claims in an Inter Partes Review are given their
`
`broadest reasonable interpretation that is consistent with the patent’s specification.
`
`I understand that a patent’s “specification” includes all the figures, discussion, and
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`claims within the patent document. I understand that the Patent Office will look to
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`the specification to see if there is a definition for a claim term, and if not, will
`
`apply the broadest reasonable interpretation from the perspective of a POSITA at
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`the time the invention was made. I present a more detailed explanation of the
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`7
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`NVIDIA Corp.
`Exhibit 1003
`Page 010
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`interpretation of certain terms in the ’724 patent in the section titled “Claim
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`Petition for Inter Partes Review of USP 6,804,724
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`Construction” below.
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`C. Relevant Time Period for the Obviousness Analysis
`22.
`I also understand that the earliest United States patent application
`
`filing leading to the ’724 patent was made on April 29, 1999. I have therefore
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`analyzed obviousness as of that day or somewhat before (approximately 1997-
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`1999), understanding that as time passes, the knowledge of a POSITA will
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`increase.
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`D. Materials Relied on in Forming My Opinion
`23.
`In forming my opinion, I have relied on the ’724 patent’s claims,
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`disclosure, and file history, on the prior art exhibits to the Petition for Inter Partes
`
`Review of the ’724 patent, any other materials cited in this declaration, and my
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`own experience, expertise, and knowledge of the POSITA in the relevant
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`timeframe.
`
`IV. LEVEL OF SKILL IN THE ART
`24. The ’724 patent involves several common concepts in computer
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`display adapters and monitors that were well known to those working in the field
`
`in the mid-to-late-1990s, including the use of a display adapter in portable
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`computers and the use of a display adapter to control both analog and digital
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`external monitors. Below, I explain how the technical context of the ’724 patent
`
`8
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`NVIDIA Corp.
`Exhibit 1003
`Page 011
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`informs my opinion on the level of skill of an ordinarily skilled artisan at the time
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`Petition for Inter Partes Review of USP 6,804,724
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`of the alleged invention.
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`25. The purported invention of the ’724 patent relates to a connection
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`between an external monitor and a computer. The specification explains that both
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`desktop computers and “portable computers such as laptop and notebook
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`computers” were well known in the art. ’724 patent at 1:20-27. The challenged
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`claims recite a “portable computer system” with “a LCD panel hingedly attached
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`to a main body of the portable computer.” Id. at 11:59-61; 12:26-28.
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`26.
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`I agree with the ’724 patent that notebook portable computers, like the
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`claimed “portable computer system” with an integrated LCD display, were very
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`well known by the time the patent was filed in the late 1990s. For example, the
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`May 6, 1997 edition of PC Magazine advertised numerous notebook portable
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`computers, all with an integrated flat panel display. The magazine included a
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`single page advertisement for 15 different models of notebook computers, each
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`with an integrated display:
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`9
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`NVIDIA Corp.
`Exhibit 1003
`Page 012
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`Petition for Inter Partes Review of USP 6,804,724
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`Ex. 1007, May 6, 1997 Edition of PC Magazine, stamped at p. 347.
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`27. As another example, the magazine included another page fold adver-
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`tisement for “THE BEST NOTEBOOK BRANDS AROUND,” showing 18 differ-
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`ent models of notebook computers, each with an integrated flat panel display:
`
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`10
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`NVIDIA Corp.
`Exhibit 1003
`Page 013
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`Petition for Inter Partes Review of USP 6,804,724
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`
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`Ex. 1007, May 6, 1997 Edition of PC Magazine, stamped at pp. 333-334.
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`28.
`
`In short, portable notebook computers with integrated folding dis-
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`plays, like the “portable computer” claimed in the ’724 patent, were well known in
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`the art by 1997-1999.
`
`A.
`Person of Ordinary Skill in the Art
`29. The purported invention of the ’724 patent reflects an understanding
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`of several basic principles of electronics and electrical engineering as they apply to
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`product design and knowledge of industry practices in 1998, including computer
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`architecture and communication with peripheral devices.
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`11
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`NVIDIA Corp.
`Exhibit 1003
`Page 014
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`Petition for Inter Partes Review of USP 6,804,724
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`30. Based on those factors, in my opinion a person of ordinary skill in the
`
`art in April 1999 would have had, at a minimum:
`
`a.
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`a Bachelor-level degree in computer science, electrical or electronics
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`engineering (or an equivalent subject) together with three to four years of
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`post-graduate experience working with computer architecture and
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`peripherals; or
`
`b.
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`a master’s degree in computer science, electrical or electronics
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`engineering (or an equivalent subject) together with two years of post-
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`graduate experience working with computer architecture and peripherals.
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`This description is approximate, and a higher level of education or skill might
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`make up for less experience, and vice-versa.
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`V.
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`PERSPECTIVE APPLIED IN THIS DECLARATION
`31.
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`I believe that I would qualify as a person of at least ordinary skill in
`
`the art in April 1999, and that I have a sufficient level of knowledge, experience
`
`and education to provide an expert opinion in the field of the ’724 patent.
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`32. Because of my work experience and the earlier date on which I
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`received my bachelor’s degree, by April 1999 my own level of skill likely
`
`exceeded the ordinary level of skill in the art. However, in my various roles as
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`President, Chief Technology Officer and Vice President at Tech Source, I worked
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`with and supervised individuals who were persons of ordinary skill in the art as
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`12
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`NVIDIA Corp.
`Exhibit 1003
`Page 015
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`defined above. My job responsibilities included hiring and managing these
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`Petition for Inter Partes Review of USP 6,804,724
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`individuals, assigning tasks and deadlines to them based on their capabilities, and
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`reviewing their work product. Accordingly, I am well acquainted with the actual
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`performance of a POSITA as defined above in ¶ 30, and can approach technical
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`issues from the perspective of such a person.
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`33. My opinions in this declaration are based on the perspective of a
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`POSITA as of April 1999. This is true even if the testimony is stated in the present
`
`tense. Each of the statements below reflects my opinion based on my review of the
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`prior art, the disclosures of the ’724 patent, its file history, and the challenged
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`claims.
`
`VI. OVERVIEW OF THE ’724 PATENT
`A. Disclosure of the ’724 Patent
`34. According to its specification, the ’724 patent relates to computer
`
`systems, and more particularly to a computer system having “display function that
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`supports analog displays and digital displays.” ’724 patent, Field of the Invention,
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`1:15-18. In particular, the specification describes a display adapter for a computer
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`than can support both digital LCD displays and analog CRT displays. Id. at 2:11-
`
`14.
`
`13
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`NVIDIA Corp.
`Exhibit 1003
`Page 016
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`Petition for Inter Partes Review of USP 6,804,724
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`35. The ’724 patent teaches that desktop and laptop computers were both
`
`well known in the art. For example, Figure 1 below depicts a prior art desktop
`
`computer:
`
`’724 Patent Fig. 1; id. at 3:30-31 (“FIG. 1 is an exterior view of an earlier desk top
`
`personal computer . . . .”).
`
`36. Figure 5, below, depicts a prior art portable notebook computer:
`
`
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`14
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`NVIDIA Corp.
`Exhibit 1003
`Page 017
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`Petition for Inter Partes Review of USP 6,804,724
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`’724 Patent Fig. 5; id. at 3:40-41 (“FIG. 5 is an exterior view of an earlier notebook
`
`computer . . . .”)
`
`37. The ’724 patent teaches that connection of a desktop or portable note-
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`book computer to an external monitor, including an analog CRT monitor or digital
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`LCD monitor, was known in the art. ’724 patent at 1:20-45. But according to the
`
`’724 patent, an “all digital” interface for an LCD monitor was not known. Id. at
`
`1:46-51. Furthermore, according to the ’724 patent, the prior art could not ade-
`
`quately handle “cases where either the external monitor cable fails to connect with
`
`the external video port of the notebook computer or the external monitor is not
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`supported with the power.” Id. at 1:52-55.
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`15
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`NVIDIA Corp.
`Exhibit 1003
`Page 018
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`Petition for Inter Partes Review of USP 6,804,724
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`38. The ’724 patent purports to solve this problem with “a portable, note-
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`book computer having an LCD display panel, that can accommodate hookups to
`
`another LCD digital flat panel display and a hookup to a CRT monitor. In this ar-
`
`rangement, the extra LCD display will contain circuitry that will let the notebook
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`computer know whether the extra LCD display monitor is hooked up so that power
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`will be delivered to the LCD hookup only when an LCD monitor is plugged into
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`the LCD hookup.” ’724 patent at 2:1-8.
`
`39. First, the ’724 patent describes digital video transmission using the
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`“well-known VESA Transition Minimized Differential Signaling (TMDS) [for-
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`mat.]” Id. at 5:61-63. The ’724 patent describes encoding video signals using
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`TMDS and transmitting them to a digital monitor. Id. at 6:3-34.
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`40. Second, the ’724 patent describes several embodiments of the
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`allegedly novel overall system. Figure 20 of the ’724 patent is illustrative. This
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`describes a “block diagram of the notebook computer system having a VGA card
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`with an external CRT port and LCD port in accordance with another embodiment
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`of the invention.” ’724 patent at 4:17-20.
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`16
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`NVIDIA Corp.
`Exhibit 1003
`Page 019
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`Petition for Inter Partes Review of USP 6,804,724
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`
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`Id. at Fig. 20
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`41. Element 722 is a video controller. Id. at 9:64. It can include “a LCD
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`monitor cable sensing circuit for detecting connection state of the LCD monitor
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`cable.” Id. at 10:30-31. This cable sensing circuit determines whether the external
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`LCD monitor is connected, and if it is not, it disables the video output of the sec-
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`ond transmitter 726. Id. at 10:35-40 (“If the LCD monitor cable 611 is not con-
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`nected with the video port 727, the sensing circuit detects the disconnection state
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`and prevents the display enable signal (DE) supplied by video controller 722 from
`
`being inputted to the second transmitter 726.”).
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`42. Figure 14, below, provides the details of the sensing circuit:
`
`17
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`NVIDIA Corp.
`Exhibit 1003
`Page 020
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`Petition for Inter Partes Review of USP 6,804,724
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`’724 patent at Fig. 14.
`
`43. LCD monitor 600a is connected to video card 520a. “[S]ense resistor
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`R1” on the LCD monitor connects through the MDR connector to the line labeled
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`“CS” that connects to the video controller. ’724 patent at 7:35-47. This “CS” line
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`“is a monitor cable sensing signal (CS) line between the LCD monitor 600a and
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`the video controller 524 of the host computer system, if the monitor cable 610 is
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`completely connected between two MDR connectors 522 and 620.” Id. at 7:44-47.
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`44.
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`In operation, when the monitor cable is connected the sensing circuit
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`produces a “high” signal across the resistor R1. Id. at 7:59-65. This signal is sup-
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`plied to the video controller 524. Id. The video controller responds with a “high”
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`18
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`Exhibit 1003
`Page 021
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`“display enable (DE)” signal across gate AND1. Id. at 7:65-8:3. This enables the
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`Petition for Inter Partes Review of USP 6,804,724
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`transmitter. But when the monitor cable is not connected, the video controller does
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`not receive the cable sensing signal CS, no “display enable” signal is generated, the
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`output of the AND gate is low, and the transmitter is disabled. Id. at 8:8-16.
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`45. This same cable sensing signal CS is also used to signal to the video
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`controller that the monitor is not powered on, and to disable video transmission.
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`Id. at 8:8-16 (“However, when the monitor cable 610 is disconnected from the
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`connector 522 or the power failure is occurring in the monitor 600a, the monitor
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`cable sensing signal CS can not be supplied with the video controller 524 and the
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`disabled is the display enable signal DE, which causes operation of the transmitter
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`526 to be suspended. Therefore, it is possible to prevent unnecessary power con-
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`sumption in the transmitter 526, if the monitor cable 610 is disconnected or the
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`power failure is occurring in the LCD monitor 600a.”).1
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`46. Thus the same signal, CS, both indicates that the monitor is connect-
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`ed, and that it is powered on.
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`B.
`47.
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`Prosecution History of the ʼ724 Patent
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`I have reviewed the prosecution history of the ’724 patent.
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`48. The examiner first rejected all 15 pending claims as obvious over U.S.
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`Patent No. 5,710,570 (“Wada”)
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`1 Emphasis added unless otherwise indicated.
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`in view of U.S. Patent No. 6,262,695
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`19
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`NVIDIA Corp.
`Exhibit 1003
`Page 022
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`(“McGowan”). Ex. 1002, ’724 patent prosecution history, Oct. 11, 2001 Office
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`Petition for Inter Partes Review of USP 6,804,724
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`Action at 3. The examiner found that Wada disclosed all elements of the pending
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`claims other than a second “external video port or cable connector.” Id. at 4. But
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`the examiner found that McGowan disclosed this limitation, and would have
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`rendered the pending claims obvious in combination with Wada.
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`49. The applicant responded by arguing that Wada and McGowan did not
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`disclose the claimed limitations, and that a POSITA would not have been
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`motivated to combine the references. ’724 patent prosecution history, Jan. 10,
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`2002 Applicant Remarks at 8-13. Among other arguments, the applicant argued
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`that Wada’s disclosure of an integrated LCD panel did not meet the claims’ digital
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`monitor limitation. Id. at 10. The applicant did not amend the claims.
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`50. The examiner then issued a final rejection on essentially the same
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`bases as the initial rejection. The examiner rejected all pending claims as obvious
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`over Wada in view of McGowan. ’724 patent prosecution history, Mar. 26, 2002
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`Office Action at 3.
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`51. The applicant responded by cancelling all 15 pending claims, and
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`entering 21 new claims. ’724 patent prosecution history, June 26, 2002
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`Preliminary Amendment at 9. The applicant did not provide any argument to
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`distinguish these new claims over the prior art. Id.
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`20
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`Exhibit 1003
`Page 023
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`Petition for Inter Partes Review of USP 6,804,724
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`52. The examiner rejected all 21 new pending claims. The examiner
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`found that two claims were anticipated by Wada. ’724 patent prosecution history,
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`Sept. 9, 2002 Office Action at 3. The examiner found that five claims were
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`obvious in view of Wada alone. Id. at 4. The examiner found that the remaining
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`14 claims were obvious in view of Wada in combination with McGowan. Id. at 7-
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`8.
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`53. The applicant responded by amending two pending claims to address
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`formalities, and by submitting arguments to distinguish Wada and McGowan.
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`’724 patent prosecution history, Dec. 6, 2002 Applicant Remarks, 4-10. Among
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`other arguments, the applicant argued that Wada did not disclose disabling
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`transmission of digital video signals because it merely disclosed that such signals
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`could not be processed by the receiving device. Id. at 5. The applicant also argued
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`that Wada’s disclosure of an integrated LCD panel did not meet the claims’
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`requirement of an “external” digital monitor. Id. at 6-7.
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`54. The examiner issued a final rejection, again adopting essentially the
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`same grounds of rejection he had previously proposed. The examiner rejected two
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`pending claims as anticipated by Wada, five pending claims as obvious in light of
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`Wada and the remaining claims as obvious in light of Wada in view of McGowan.
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`’724 patent prosecution history, Feb. 21, 2003 Final Rejection at 2-7.
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`21
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`Exhibit 1003
`Page 024
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`Petition for Inter Partes Review of USP 6,804,724
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`55. Several rounds of rejections and proposed responses followed. The
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`applicant eventually filed a Notice of Appeal and Appeal Brief, cancelling three
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`claims and again arguing, among other things, that the examiner had erred in
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`concluding that an integrated LCD display disclosed in Wada met the “external
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`monitor” limitation in the claims. After the applicant again amended the claims to
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`fix the dependency of several dependent claims that depended on cancelled claims,
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`the examiner allowed the claims without further comment in light of the appeal
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`brief. The appeal process went no further than the applicant filing an initial brief.
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`56. The VESA P&D reference was of record during examination. It was
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`provided by the Applicant to the examiner in an Information Disclosure Statement
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`without discussion. ’724 patent prosecution history, September 9, 2002 Applicant
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`Remarks at 11. But the examiner never identified or addressed the VESA P&D
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`reference.
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`VII. THE PRIOR ART
`A. VESA P&D
`57. The Video Electronics Standards Association (VESA) Plug & Display
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`Standard, Version 1, Revision 0 (“VESA P&D”), was published on June 11, 1997.
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`I understand
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`that VESA P&D
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`is prior art
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`to
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`the ’724 patent under
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`35 U.S.C. § 102(b) because VESA P&D was published more than one year before
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`the application that led to the ’724 patent was filed.
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`22
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`Exhibit 1003
`Page 025
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`Petition for Inter Partes Review of USP 6,804,724
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`58. VESA
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`is a well-known standards setting organization
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`that
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`promulgates standards relating to video in electronics. VESA P&D describes one
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`of those standards, the Plug & Display standard. Plug & Display was “intended to
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`provide an industry standard digital interface for display devices.” VESA P&D at
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`1. It provides “a digital interface and, optionally, an analogue interface for video
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`data.” Id. at 13.
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`59.
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`In particular, the Plug & Display standard was intended to facilitate
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`the use of digital LCD monitors. Id. at 13. Prior interfaces offered two solutions
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`for attaching a digital monitor to a computer with an existing analog graphics card.
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`Id. For example, one could simply plug the digital monitor into the analog
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`graphics card, thereby sending analog signals to the display,