`ADVANCED MEDIA PROCESSOR CHIPS
`
`Robert J. Gove
`
`Equator Technologies, Inc.,
`1300 White Oaks Road, Campbell, CA 95008
`
`ABSTRACT
`
`Media processors will provide an effective solution for
`consumer products, including digital televisions (DTV).
`These flexible processors enable platforms for customer-
`added product differentiation in the form of software
`rather than hardware. A single media processor can
`execute audio, video, 3D graphics and communications
`functions which have traditionally been performed by
`several individual hardwired chips. We include an
`overview of media processors, comparing them to
`previous fixed-function implementations.
`
`Background
`
`Since the development of the first digital video product
`years ago, product developers have sought cost-effective
`computing platforms to handle the demands posed by
`simultaneously processing video, audio, 3D graphics and
`communications. For many reasons these solutions have
`been slow to evolve, somewhat limiting the acceptance of
`programmable solutions for consumer video products.
`Solutions incorporating multiple fixed-function chips have
`dominated consumer video product platforms.
`
`Some Media Processors (MPs) emerged to support the
`multimedia PC industry. Media computing technologies
`like image capture, processing and video display, coupled
`with the supporting media software platforms like Active-X
`and Talisman, made it relatively simple to develop high-
`performance multimedia solutions on a PC platform. To
`date, limited acceptance of those MPs has in part been due
`to attempts by the host processor manufacturers to augment
`the general-purpose (GP) processor with multimedia
`extensions. Regardless, PCs combined with MPs offer
`exceptional performance and flexibility.
`
`Definition of Media Processors
`
`We define a Media Processor (MP) as a chip with a highly
`specialized architecture for real-time processing of media.
`Due to the complexity of the signal and graphics processing
`needed, MPs must utilize significant parallelism and
`architectural optimizations to achieve real-time processing.
`
`The media functions include the generation of sight and
`sound from audio, video, imaging, 3D graphics, and
`communication signals and data. Applications include soft
`versions of DVD, DTV, All-Format Decode (AFD), 3D
`games, H.323 and modems. A MP will also contain a real-
`time operating system (RTOS) for effective control and
`scheduling of time critical events, such as for video, audio
`and graphics synchronization.
`
`offer an “effective” balance of functionality between:
`Multiple and byte-wise pixel or sample processing
`for audio and video,
`floating-point geometry processing for 3D graphics,
`bit-wise or look-up table processing for MPEG
`and/or 3D graphics,
`for block or chunk
`memory cache models
`processing for MPEG and 3D,
`general-purpose processing,
`streaming of data on and off the processor/memory
`with programmable dimension and stride,
`Standard input/output like USB, 656, I’C.
`
`Advantage of Programmable over Hardwired
`
`MPs offer fully programmable solutions, in comparison to
`fixed-function alternatives, with sufficient computational
`power for simultaneous acceleration of
`the media
`functions. One chip can replace an assortment of fixed-
`function chips. This programmable approach provides a
`key differentiator in that it allows the designer or end-user
`to adapt or change the product with evolving requirements,
`protocols or standards. Application Programmer Interfaces
`(APIs) and High-Level Languages (HLL) like C greatly
`enable these changes, as well as provide portability of the
`code to future products and self-documenting nature of
`software (in comparison to embedded hardware). On the
`other hand, hardwired or fixed-function solution usually
`requires time-consuming hardware spins to adapt to
`changes, as well does not encourage the use of self-
`documentation from design-to-design like software does.
`MPs also have an assortment of electrical interfaces, such
`as PCI or AGP busses and audiolvideo input and output
`ports, thereby simplifying design of a final product since
`no special ASICs need to be developed.
`
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`Comparison of Cost for Soft vs. Hardwired
`
`A programmable solution can be achieved with similar, or
`even lower, silicon cost as that of a fixed-function solution,
`however maintaining the flexibility for user-programmed
`change. We can see this by looking at the architectural
`differences between the two solutions in Figure 1.
`
`With a soft solution users can balance the utilization of the
`processor’s cycles between different applications as a
`function of need. For example, a single poor-quality video
`channel could be improved using additional cycles for
`picture quality enhancements via post-processing algorithms
`at one time, whereas another time, a 2-channel simultaneous
`decoder, with Internet access via the soft modem, could
`execute, presenting a dynamic resource allocation challenge.
`
`c
`
`Media Processo
`
`Hardwired, Fixed-Function
`Programmable Media
`Processor Solution
`Solution
`(Many Chips & Data Memories)
`(Single Memory Bank)
`Figure I . Comparing SofhYare to Fixed Hardware Solutions
`
`The Fixed Hardware solution uses more chips, more
`interconnecting signals, more power, and custom interfaces.
`Holding all factors constant (functionality, clock speed,
`process), the MP solution will have less system cost. If the
`MP architecture and software is optimized for nearly full
`utilization of data paths and the computing elements, it will
`have cost savings over the fixed schedule Fixed Hardware,
`which wastes the resource when not in use. Essentially the
`dynamic nature of applications used and the data leads to
`inefficient utilization in a Fixed solution, whereas in a
`programmable solution, the resources can be allocated
`efficiently. Another difference could be the cost of code
`memory and the cost of buffer memory to handle latency
`associated with dynamic scheduling.
`However, as
`memories decline in cost, this has much less impact.
`
`Key Elements of Media Processors
`
`the degree of programmability or
`MPs vary by
`customization possible, as well the time for a developer to
`apply the processor to solve a problem. The alternative,
`hardwired solutions generally require many months to
`convert an algorithm into working hardware, and even
`longer if a change is then required to that hardware once
`actual use begins. This happens quite often in imaging and
`
`to
`video systems due
`the changing of application
`requirements, piartly due to the wide variation of source
`images and error conditions possible in real situations,
`which can v;ary more
`than
`the original system
`specification.
`
`Some early mledia processing chips required detailed
`microcoding to port imaging algorithms onto the processor.
`This would consume many months of design by
`programmers proficient in that coding language. Other
`MPs have C compilers for each of their multiple internal
`processors (sometimes heterogeneous), however to fully
`utilize the power of the processor, one must manually
`partitioning algorithms to each processor for parallelism
`without the help of the compiler and/or resort to writing the
`code in assembly language. While not as cumbersome as
`microcode, this method also requires much skill.
`
`More recent MPs featuring VLIW architectures (with
`instruction level parallelism and partitioned operations)
`have C compilers to improve the user’s ability to map the
`algorithms onto the processor. However, coding efficiency
`(measure by the resultant speed of the processor when
`using compiler generated code) has not been as good as
`expected. Old compiler technology had difficulty finding
`parallelism and accurately mapping the application code to
`run on multiple execution units in parallel. Next-
`generation MPs; with advanced compiler technology and
`architectures, which map well to the compiler, are in
`development, These compilers will perform functions like
`finding parallelism and assigning functions to individual
`processors and allocating registers. Features include:
`1) Branch elimination with predicated execution,
`2) Software pipelining and loop unrolling,
`3) Media intrinsics for fast execution of DSP & 3D.
`The ultimate advantage of the use of a compiler is that
`when the undeirlying chip changes in future generations,
`the user’s source code can simpIy be re-compiled to adapt
`to the new chip.
`
`Media Processor Performance Trends
`
`MPs range in performance from 2 to 20 billion operations
`per second (BOPS) and 32- to 64-bits in width. Next-
`generation MPs will range up to 30 BOPS and 128-bits.
`This performance permits a multitude of opportunities for
`consumer media markets, including real-time encoders,
`MPEG-4, and nnultiple-channel DTV MPEG decoders.
`
`Conclusions
`
`Media Processors will provide the computational solution
`for consumer products in digital television. Next-
`generation MPs offer improvements in performance and
`cost, while offering even greater flexibility. Soft versions
`of high-definition video decode, video conferencing, and
`3D TV and games become enabled by MPs.
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