United States Patent 1191
`van Phuoc et al.
`
`IlllllllllilllIlllllllllllllllllllllllllllllllllllllllllllllllllllllll
`5,710,501
`*Jan. 20, 1998
`
`USOO5710501A
`Patent Number:
`[11]
`[45] Date of Patent:
`
`BATTERY PACK HAVING A PROCESSOR
`
`4,949,046
`
`8/1990 Seyfang ................................ .. 324/427
`
`CONTROLLED BATTERY ()PERATlNG
`
`4,961,043 10/1990 Koenck . . . . . . . . . .
`
`. . . . . .. 320/21
`
`[54]
`
`[75]
`
`173]
`
`1*]
`
`[21]
`[22]
`
`[62]
`[5 ll
`[52]
`[58]
`
`[56]
`
`SYSTEM
`
`.
`
`-
`
`.
`
`Invenms' gv‘gongrzlf 51131211133118; 12311
`Fm *
`c '
`“_
`s_"‘g'
`Hamdl?ng an °f Germany’ L011“ W-
`HmSk?~N°r?1b°r°3MaSSdAlWyn 1}-
`Taylor. Wellesley H1115. Mass-z Dame]
`D. Friel, Woburn, Mass; Matthew P.
`Hull, Jamestown, R.I.
`
`Assignee: Duracell, Inc., Needham, Mass.
`
`Notice;
`
`The m of this patent shall not extend
`beyond the expiration date of Pat. No.
`5.691.621.
`
`APPL No‘: 473,339
`
`Filed:
`
`Jun. 7, 1995
`
`.
`'
`Related [18- Applmtwn Data
`
`_
`_
`_
`
`
`DIVISIOI! 0f Ser. N0. 336,945, NOV. 10, 6
`
`.
`
`an;
`F.4d 0t:
`l
`
`............................ .. H01M 10I434iog023J2Z2;
`.................................... .. 320/5, 19 20
`a
`.................................. ..
`.
`~
`.
`320/22. 30, 35. 48; 324/426; 365/96. 106
`
`References Cited
`
`U'S~ PATENT DOCUMENTS
`7/1976 Jungfer et =11. ..... ..
`3,971,980
`4 233,339 12/1980 Redfem et aL __
`4,289,836
`9/1981 Lemelson . . . . . . . . .
`4,377,787
`3/1983 Kikuoka et a1. .
`4,390,841
`6/1983 Martin et a1.
`4533.034 411936
`- - - - -
`4595330 6/1936 Paul
`23:23:“;
`2/1988 P 61 ed et a1
`
`‘£725,784
`
`324/29
`365,196
`. . . . .. 429/61
`324/431
`324/427
`- - . - -- 320/21
`324/427
`
`320/43
`
`4,743,831
`4,947,123
`
`324/427
`5/1988 Young ....... ..
`8/1990 Minezawa ............................... .. 320/48
`
`4,965,738 10/1990 Baueret a1. . . . . . . .
`5,027,294
`6/1991 Fakruddin et al.
`5,047,961
`9/1991 Simonsen ............. ..
`
`. . . .. 364/483
`364/550
`. 364/350
`
`. 320/14
`3/1993 Alexandnes et a1.
`5,196,779
`320/20
`4/1993 Interiano et a1. ..
`5,200,689
`324/428
`6/1993 Nagai ............... ..
`5,216,371
`. 320/14
`5,254,92s 10/1993 Young @1311. ..
`.. 320/21
`5,278,487
`1/1994 Koenck ........ ..
`.. 429150
`5,284,719 2/1994 Landau et a1
`.. 429/50
`5,287,286 2/1994 Ninomiya ..... ..
`.. 320/31
`5,315,228
`5/1994 Hess etal
`' 364/433
`5321.627
`611994 Relief
`.. 320/44
`5,325,041
`6/1994 Briggs
`5,341,084
`8/1994 061611 et a1. ............................ .. 320/44
`OTHER PUBLICATIONS
`
`Markus Bullinger. “Quick Cahrging with Intelligence-An
`IC Controls NiCad and NiMH Battery Chargers.” Elec
`tromk, 42. No. 6. Mar. 23. 1993. PP. 74-77.
`Patrick Guelle, “Integrated Circuits for Rapid Chargers”.
`Elecrrom'que Radio Plans, Feb. 1993, N0. 543. pp. 57-64.
`Jacques Robert, et 211., “A 1681311 Low-Voltage CMOS A/D
`Converter," IEEE Journal of Solid State Circuits, vol.
`No. 2.
`
`Primary Examiner_Pctcr S‘ Wong
`Assistant Examiner G egory Toa?gy
`A"
`, A
`F'Mcuu _ S on. M h & Pr Sel
`“my gem’ 0’ '
`y c
`‘up y
`cs
`[57]
`ABSTRACT
`
`A battery pack and a method of operating a battery system
`The battery pack includes a rechargeable battery and a
`P¥°°eSs°F f°r mnim?ng the 9mm’ during charging ind
`d1scharg1ng.The processor rece1ves data values representing
`thB b39913’ voltage tempmmre and CIIHBHL and the Pro
`cessor performs a series of calculations using those data
`values. The processor is part of a hybrid integrated circuit.
`which also includes an analog-to-digital converter. a ROM
`and a RAM. Preferably. the integrated circuit comprises a
`multitude of layers. upper layers of the circuit form the
`ROM. and lower layers of the circuit form the RAM.
`
`11 Claims, 31 Drawing Sheets
`
`36
`
`17
`
`‘199
`
`35/}
`
`54
`,34
`
`32
`
`185"
`
`15
`/
`. L/50
`
`1 ‘5s
`i
`|
`;
`program ROM \
`
`61
`
`8 bit
`
`register
`i
`
`67
`
`internal 8 bit bus;
`75
`15148615;
`
`I 650
`[ {65
`1../
`SMBUS
`RAM
`Interface
`
`- ~ — EJSMBDATA
`40
`
`Apple Inc., et al.
`Exhibit 1028
`Apple Inc., et al. v. Global Touch Solutions, Inc.
`IPR2015-01174
`
`Exhibit 1028, Page 001
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 1 of 31
`
`5,710,501
`
`.7 ||
`
`Q
`
`
`
`\ uz?m Egon.
`
`4 +
`
`_.o _ m
`
`
`
`o_ 2 Egg M255
`
`55% 5o:
`
`\ “Em;
`E45 (1 mm 542w N
`E \
`
`E353 . 505:0 \
`
`mgmzm
`PM. /
`
`2 w
`
`i
`
`Exhibit 1028, Page 002
`
`

`
`U.S. Patent
`
`Jan. 20, 1993
`
`Sheet 2 of 31
`
`5,710,501
`
`.50omoz_owe
`
`___
`
`_“
`
`aw
`
`mm
`
`.1_.i!L
`
`_.o.omccoo_
`
`as?_
`
`.1I_uuzw_o>:aamz___*
`
`E.<o._.
`
`Exhibit 1028, Page 003
`
`
`
`
`

`
`U.S. Patent
`
`Jan. 20, 1993
`
`Sheet 3 of 31
`
`5,710,501
`
`__
`
`25.5m_oc._o:.__H.
`
`mmo_H.
`
`«mr1n».,._mmwmmmoo>
`
`flq..§.._.u3H_n:.oEs___._T/we.."_mm:v;o.__I.||l1!
`flEom528.5.5m..EL"flE9:E5__m.
`_.u.1u:1-rah,1~:..mmE
`
`Exhibit 1028, Page 004
`
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 4 of 31
`
`5,710,501
`
`wake up
`
`/
`
`Bus
`request
`
`‘3 ‘'
`l/ K r '00
`Initialization
`‘Handle request
`r
`J
`
`{I30
`Disable bus
`requests
`Enable ND
`
`Standby 23
`
`.5
`getvalues
`
`Obtain row I,
`U,andTvalues
`*
`l4!
`KQSet AID
`measurement
`ready flag
`_._
`
`{ I45
`Exit
`sample’
`mode
`
`l44
`
`Enter sample
`m°de
`
`M61
`Set getvalues
`:0
`
`Disable A/D
`converters
`
`MB
`’
`Set
`getvalues=l
`'49
`[
`Start A/D
`conversion
`
`K '5‘
`Capacity
`calculation
`
`[ I52
`Alarm
`control
`{ '54
`Charger
`control
`(l56
`LED display
`
`‘58W
`Enable bus
`requests
`
`i (23
`Standby
`
`Exhibit 1028, Page 005
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 5 of 31
`
`5,710,501
`
`Fl 6 .4
`
`Von
`
`l’- “'" _' q m W w — ? — _ ‘1
`
`|
`60\N
`
`1
`I
`Curren? '
`or
`I
`voltage —T'>
`0'’
`Temp.
`l
`
`Clock
`
`I
`I
`x
`
`Reference
`
`6?»
`
`Voltage
`Bundgnp “62
`125V divider 0nd
`buffers
`}
`64
`Full
`some
`
`AGND
`
`'
`1
`I
`t
`1
`:
`‘
`
`68
`\
`
`DELTA SIGMA CONVERTER
`Q
`ADC
`Control Logic
`
`|
`|
`f‘ 69
`:
`
`l__ ._ _ __ _ _ _ _ ? __ -J
`
`FIG.5A
`Al
`
`S|\______.___E4
`C‘ ::
`(D4
`'f__—"1
`s21 53W
`A3
`A2
`$2
`‘93
`
`FIG.5B
`
`3
`4/
`
`S| }
`¢‘____
`i
`33'
`52
`$2 A2 (D3 A3
`
`1
`
`A4¢4
`
`Exhibit 1028, Page 006
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 6 of 31
`
`5,710,501
`
`Exhibit 1028, Page 007
`
`

`
`U.S. Patent
`
`Jan. 20, 1993
`
`Sheet 7 of 31
`
`5,710,501
`
`
`
`o._.Buamum1:2:
`
`A0204
`
`
`
`zo:amompz_:///Luuz:mm>zrHm
`
`mm<x¢mm<zm
`
`zo:<mou»z_
`
`umst
`
`A
`
`Emma
`
`um<:n_
`
`,H
`
`
`
`fifimwH.Ew.u.wfi.~.m.m.H.__H.=H.
`
`.
`
`..L.l
`
`. .
`
`5
`
`Exhibit 1028, Page 008
`
`
`
`

`
`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 8 of 31
`
`5,710,501
`
`
`
`cmfiomfi«manna.mam
`
`E
`
`9__a$_mQ1
`8NmmC.
`
`_9_E8._om..
`_o:coo-EE_<
`
`u_8-ooaoo
`
`m_m.o_.._
`
`
`
`A..M\on.89..<eo:Eom.
`
`o_nEum
`
`/once_o,Eoz
`
`mt..mEE:mcmE
`
`09
`
`oz
`
`we
`
`N.
`
`K
`
`g
`
`
`
`
`
`.\!|n||\(l|l1|J..o._Eoo$o..o:o
`
`wemmm-....:mm:um..mam
`
`Exhibit 1028, Page 009
`
`
`
`
`
`
`
`
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 9 of 31
`
`5,710,501
`
`Exhibit 1028, Page 010
`
`

`
`U.S. Patent
`
`Jan. 20, 1993
`
`Sheet 10 of 31
`
`5,710,501
`
`flflflflflflflfl
`
`Ic
`N
`
`SP7
`
`UU9UUUUU9
`
`SP0
`
`EIIFIEIIIEI
`E IIEIIIE-IE
`
`
`0 0N 3
`
`0 § 3
`
`WZ2G
`
`WZ73 W263
`
`W253 WZ4G W236~
`
`F|G.9BPRIORART
`
`E
`
`080flfl
`
`Exhibit 1028, Page 011
`
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 11 of 31
`
`5,710,501
`
`FIG. l0
`
`llVDD
`
`85
`
`h
`l>-—_—__————1_—_-
`T
`1 vol) 2v
`low i
`
`“J79
`
`65
`
`VBUF ,/
`
`.
`l
`RAM
`1' C4
`=
`330nF V83
`
`a5\
`
`POR high if v00 2v
`Circuit
`4‘
`
`I!‘ To
`
`Oscillator
`
`l
`
`FIG. II
`
`VDD
`P
`0W8!’
`
`770
`/
`E
`
`90
`J
`
`8
`
`a0
`
`890
`//
`76
`
`X.
`
`‘
`
`78
`\ Output
`T‘E
`
`l3
`
`R4
`
`s2
`f
`
`‘3 J
`
`89b
`
`R5
`
`83
`
`\
`I50
`
`72
`
`V33
`
`~77b
`
`Exhibit 1028, Page 012
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 12 of 31
`
`5,710,501
`
`F|G.12
`
`205
`
`from Fig 13A
`1
`Convert raw AID
`current and
`voltage values to
`actual "l" and "U"
`
`200
`
`no
`
`21 2'
`
`213
`uP turns off
`AID converter ../
`
`216
`uP turns off 455
`KHZ /
`oscillator
`i
`Enable wake-up
`comparator
`circuit
`
`,
`
`218
`'
`pP sets itself
`for sleep \J
`
`215
`
`/
`
`222
`
`Convert raw AID
`temperature value
`to actual "t"and
`scale T value
`t
`Check for over
`temperature
`condition
`
`Perform d T/d t
`calculation to
`determine d. t
`i
`Perform internal
`temperature check
`i
`Perform r1 uldt
`calculation to
`determine (1 p
`
`226
`
`227
`____.)
`
`Wakeup
`comparator J
`outputs trigger
`signals
`
`1
`Turn on up AID,
`oscillator and
`ASIC circuits
`
`221
`/
`
`go to step 100
`Fig. 3
`
`- Set EOD flag
`- Set terminate
`discharge alarm
`I
`
`264
`
`-Clear EOD flag
`-Clear terminate
`discharge alarm
`-Cap reset disabled
`
`go to step 165
`Fig. 13A
`
`Exhibit 1028, Page 013
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 13 of 31
`
`5,710,501
`
`FIG.|3A
`
`l5!
`From Fig.3 /
`J,
`Perform
`‘U T
`i
`culcuiutlon
`+
`Update average “I65
`current I Avg
`
`A, 200
`
`Clear seif- NW2
`dISChCH'QG flog
`
`I75
`S
`—Stote= CD
`-Set seifduscharge
`flog
`
`Capacity
`IDCTOFOSIRQ
`
`Set state
`as CI
`'
`
`I82
`I
`Set state
`as CD
`
`To step I92
`Fig.!3B
`
`Ca oci’ry
`reset log enobl - -
`
`-Set remaining capacity
`as function of [UT
`residual capacity value
`-Reset error re ieter
`~Discble cupeci y resei
`i——-—-——-"-—"To step I92,Fig.I3B
`
`Exhibit 1028, Page 014
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 14 of 31
`
`5,710,501
`
`from step 190 ?ap-18‘;- from Step 189
`Determine if state
`change occurred
`
`- 1 3 B
`
`300
`Check self — discharge _ _ _ _ __ __
`\-
`timer
`i
`
`Get self - discharge
`rate as a function of
`SOC and T from look - \J
`up table
`
`305
`
`Capacity
`decreasing ?
`
`315
`
`/
`
`320
`
`325
`
`calculate decrease in
`capacity since last
`state change
`*
`Increment charge to
`self - discharge for
`error calculation
`
`l
`
`Increment capacity
`integral by self -
`discharge rate
`
`400
`
`l‘ _ " _ _ _ _ _ — —
`
`\ Perform current
`integration
`
`198
`
`Capacity
`increasing ?
`
`500
`g.‘ Perform encF
`conditions C l
`L
`
`/ 600
`Perform end
`conditions C D
`J
`|——> go to step 152 He 3
`
`Exhibit 1028, Page 015
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 15 of 31
`
`5,710,501
`
`405
`
`400
`
`f 4l2
`Clamp State of
`
`Calculate
`state of charge
`relative to
`full capacity
`
`Calculate
`C rate
`
`420 7
`Get‘ charge
`efficiency factor
`as a function of
`state of charge,
`C rate and T
`from LUT
`
`Capacity
`decreasing
`'?
`
`I422
`Integrate charge
`for current
`discharge cycle
`
`45l
`l
`i
`Get residual capacity
`as a function of C
`rate and T from LUT
`
`435
`
`/
`Calculate charge
`to incrernent the
`"lieql'?llo?
`
`Y
`
`440?
`Calculate charge
`to increment the
`inte?c'if"
`1
`l. integrate charge for
`445x error calculation
`2. Calculate error
`3.lntegrate charge for
`capacity calc.
`
`FlG.I3C
`
`End integration
`
`Disable resets
`(reset f|ag= It
`
`‘
`
`Exhibit 1028, Page 016
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 16 of 31
`
`5,710,501
`
`From step 50l
`
`FlG.l4A
`500
`/
`
`State of
`charge ) 20% of full
`chage value
`
`Clea f ll di cha
`stqtigs‘f?gq s Wed
`
`5l0
`
`Dt/dt
`trlgger enable
`condition met and
`dT) threshold
`limit
`
`go to step
`540,
`Fig.l4A
`
`')
`EOC flag set .
`
`92;; STEP
`Fig. [4B
`
`Remaining
`capacity;
`full capacity
`
`go to step
`575
`
`from
`step 555
`F'
`
`520 g
`
`Set capacity = full
`capacity
`Set error registers
`to zero
`Clear error overflow
`flag
`
`530
`
`Charger
`still on?
`
`532
`P
`'
`Accumulate
`overcharge in
`overcharge
`register
`
`535
`\
`Set
`overcharging
`alarm
`
`l
`
`60 to step 575
`
`Exhibit 1028, Page 017
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 17 of 31
`
`5,710,501
`
`From step 5|2
`
`700
`
`Learn
`number of cells
`
`570
`
`LS8? EOC flog
`2.8et copocity= 95%
`full cup.
`3.Cleor error registers
`4.Cleor error overflow
`flag
`5. Set fully charged
`status if log
`
`G010 step 575
`
`Exhibit 1028, Page 018
`
`

`
`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 18 of 31
`
`5,710,501
`
`From step 510
`
`Char e
`current C/IO
`and dVtrigger
`reached
`
`545
`
`charge) t50% and
`CIS <Crate< C/SO
`
`Y
`
`‘K20
`Learn
`number of cells
`1
`551
`Set EOC ?ag
`
`From
`step
`535
`
`From
`step
`5l4
`
`l
`
`55f
`
`Set futly
`charged status
`H09
`
`60 to step 520
`
`From
`5'69
`570
`
`1
`
`575A Set terminate
`charge alarm
`
`Exhibit 1028, Page 019
`
`

`
`US. Patent
`
`Jan. 20, 1998
`
`Sheet 19 0f 31
`
`5,710,501
`
`FlG.I4D
`
`/7OO
`
`Set number
`of cells= 6
`
`1
`
`Sat number
`of cells = 4
`
`705
`
`Calibrated
`?
`
`(U)
`Vo l luge>
`ll volts
`
`Set number
`of cells = 9
`
`740
`K
`Se? EOD
`Cut off voltage
`=number of
`cellslLOZV)
`
`End
`
`Exhibit 1028, Page 020
`
`

`
`U.S. Patent
`
`Jan. 20, 1993
`
`Sheet 20 of 31
`
`5,710,501
`
`From step 60!
`605
`
`Voltage
`
`)EDV vouoqc-:_
`lus hysieresns
`
`
`
`6lO
`
`‘~";?°
`N
`
`
`
`
`
`
`Clear flog
`
`To
`$1‘8p
`54°
`
`
`525
`C as com,
`
`
`
`flag dear and
`
`
`copac|ty< 15%
`
`nomo.cup
`
`
`
`
`Hncrement number
`of cycles
`2.CycIa count flog
`set
`
`
`
`Clear charging
`alarm:
`
`6| 3
`
`65
`
`
`Capocfl
`( calcul ed
`
`error
`?
`
`
`
`
`6l8
`
`Set fully
`dlscha ed
`status no
`
`6I9
`
` SOC
`( hysteresis
`value (SOC
`
`620
`
`
`
`Clear fully
`charged status
`flag
`
`Exhibit 1028, Page 021
`
`
`

`
`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 21 of 31
`
`5,710,501
`
`From step625
`
`
`
`
`
`
`
`EOD fla
`setAN
`resets enabled
`
`(flag=Ol
`
`
` EOD flag
`
`
`645
`
`set AND
`
`error value<8%
`of full cap.
`
`
`
`
` Reset full capacity
`
`lcalculate present
`capacity value -
`last full+capacity
`residual capacity
`
`2. Clear EOC flag
`
`
`
`EDV
`Current=¢
`OR
`C-rate (EDVc—rate
`AND CAP Reset
`
`660
`mm“
`
`
`
`
`Set EOD current-=
`Set C-rate;
`
`delayed capacity
`
`reset=present
`
`residual capacity
`Set delay capacity
`
`flags after EOD
`
`Exhibit 1028, Page 022
`
`
`

`
`U.S. Patent
`
`Jan. 20, 1993
`
`Sheet 22 of 31
`
`5,710,501
`
`
`
`
`F|G.|6
`
`
`750
`
`
`Decode command
`code
`count. = Z
`
`
`
`
`
`Supported
`C
`nd
`om?ma
`
`
`Set
`Unsupported
`Command bit
`
`
`
` 752
`
`800
`
`Terminate
`transmission
`
`Perform
`Read— Block
`
`
`
`End handle request
`
`Exhibit 1028, Page 023
`
`
`
`
`
`Perform
`Write- Block
`
`arminate
`
`transmission
`
`
`

`
`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 23 of 31
`
`5,710,501
`
`
`
`W. =1o1a| number of
`of bytes
`
`778
`
`
` ERROR or
`TIMEOUT
`
`
`
`
`[Adr] = IZC-DATA
`decrement couni
`Adr= Adr + I
`
`
`
`
`
`"errmnqte _
`fl'OnS|'\"I|SS|On
`
`
`End write biock
`
`Exhibit 1028, Page 024
`
`
`

`
`U.S. Patent
`
`Jan. 20, 1993
`
`Sheet 24 of 31
`
`5,710,501
`
`FiG.|8
`
`B00
`
`B02
`
`/
`
`
`Data b te
`entere
`on
`I 2c bus
`
`
`
`
`
`Ackbit
`received
`timeout
`
` i2c data-= [Adr]
`
`decrement count
`increment [Adr]
`
`Count
`
`BIB
`
`iastbyte
`
`Set
`flag
`
`82
`
`Stop bit
`
`recigved
`
`
`
`End Read Bloc
`k
`
`Set unknown
`error and
`terminate transmit
`
`
`
`Exhibit 1028, Page 025
`
`
`

`
`U.S. Patent
`
`Jan. 20, 1993
`
`Sheet 25 of 31
`
`5,710,501
`
`90!
`I 52
`
` / F|G.|9A
` ltf-It f _ e rr
`
`AL..R>em.CAP
`
`
`0
`
`906
`
`
`
`Set
`REM...CAP..ALARM
`
`r
`
`CAP- ALARM
`
`
`
`Calculuier C _ Rate
`based on avg
`cur re_n1
`_
`
`Obtam resuduul
`
`capacit
`(C_rute)
`
`
`
`
`
`
`
`92|
`
`Set
`REM..T|ME _ALARM
`
`Ciear
`REM .T!ME _ ALARM
`
`Calculate time==
`Average Time To
`
`Go to FIG. l9B
`
`Exhibit 1028, Page 026
`
`
`

`
`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 26 of 31
`
`5,710,501
`
`925
`
`From FIG. l9A
`
`F|G.l9B
`
`
`
`Clear
`alarming flag
`
`926
`
`Ala r minq
`flag
`clea-ed
`
`Decrement alarm
`
`broadcast timer
`
`930
`
`-Set alarming flag
`- Set alarm broadcast
`timer to zero
`-Alarm sent to host
`
`
`
`
`
`
`
`
`
`
`‘ larm broadcast
`time=0
`
`935
`
`'?
`
`Siadr := Host
`Comcade==Battery
`Data Adr 2=
`AL-STATUS..L
`
`
`
`
`
`
`945
`
`Send
`messo go
`
`94?
`
`-Reset broadcast
`timer = N..ALARM
`-Toggle alarm to
`host
`
`'
`
`940
`
`
`
`Siadr ==Charqer
`
`Send
`alarm to
`charger
`?
`
`943
`
`End alarm
`control
`
`N
`
`
`
`
`
`Exhibit 1028, Page 027
`
`
`

`
`US. Patent
`
`Jan. 20, 1993
`
`Sheet 27 of 31
`
`5,710,501
`
`
`
`
`Battery
`in system
`'?
`
`
`
`
`
`
`Just
`inserted
`
`Comcode ==CHAR.CURR
`7
`
`Data Adr == Charging-
`current- L
`
`370
`
`
`
`
`
`Clear
`Copocity..rnode
`bit and charger.
`mode bit
`
`
`
`-Message time =|
`- offline = G
`
`- Clear Cap_mode a -~
`
`charqermode bits
`
`
`
`
`87 2
`
`Set constant
`current
`
`charge variable
`
`874
`
`End
`charger control
`
`
`
`
`harger- mode
`
`bit cleared
`
`7
`Y 36l
`
`Decrement message
`timer
`
`
`
`
`
`
`-Reset message
`timer
`-Calculate charging
`current
`
`
`
`
`
`
`Message
`timer timed
`out
`'?
`
`
`
` Charging
`
`current= 0
`
`Exhibit 1028, Page 028
`
`
`

`
`U.S. Patent
`
`Jan. 20, 1993
`
`Sheet 23 of 31
`
`5,710,501
`
`FIG. ZIA
`
`945
`
`/
`
`Dam
`
`
`
`received
`'?
`
`957
`
`
`
`Transmit
`battery address
`
`(Command Code)
`
`To FIG. 228
`
`Exhibit 1028, Page 029
`
`
`

`
`U.S. Patent
`
`Jan. 20, 1993
`
`Sheet 29 of 31
`
`5,710,501
`
`From FIG. ZIA
`
`T
`
`965
`
`Frorr;ti;'|1DG.2IA
`960
`
`Date
`received
`
`
` Transmit ls‘
`
`byte of data
`
`
`
`Data
`
`received
`
`
`
`
`
`968
`
`969
`
`Transmit 2”‘
`byte of data
`
`Dam
`
`
`
`
`received
`
`Te rmingte_
`transmission
`
`message
`
`Exhibit 1028, Page 030
`
`
`

`
`U.S. Patent
`
`Jan. 20, 1998
`
`Sheet 30 of 31
`
`5,710,501
`
`FIG. 22A
`
`
`
`FIG. 22B
`
`
`
`Exhibit 1028, Page 031
`
`

`
`U.S. Patent
`
`Jan. 20, 1993
`
`Sheet 31 of 31
`
`5,710,501
`
`FIG. 22C
`
`95% soc
`
`
`
`CHARGEEFFICIENCY
`
`F|G.2 B
`
`
`
`voitoge
`
`Exhibit 1028, Page 032
`
`

`
`5,710,501
`
`1
`BATTERY PACK HAVING A PROCESSOR
`CONTROLLED BATTERY OPERATING
`SYSTEM
`
`CROSS-REFERENCE
`
`10
`
`25
`
`30
`
`35
`
`45
`
`50
`
`S5
`
`This application is a divisional of U.S. Ser. No. 08/336.
`945. filed Nov. 10. 1994.
`
`FIELD OF THE INVENTION
`
`The present invention relates generally to the art of
`rechargeable batteries and more specifically to a smart
`battery for use in an intelligent device having power man-
`agement capabilities. The invention is a smart battery appa-
`ratus for controlling the operation of rechargeable Nickel
`Metal Hydride (NiMH) or Nickel Cadmium (NiCad)
`batteries. and the like. to enable the reporting of accurate
`information to the intelligent device for power management
`and charge control specific to the battery’s state of charge
`and chemistry.
`
`DESCRIPTION OF THE PRIOR ART
`
`The advent of intelligent portable electronic devices such
`as notebook computers. video cameras. and cellular phones
`has enabled the development of smart rechargeable batteries
`that can communicate with the intelligent device to provide
`accurate information on the battery’s present state of charge.
`and how best to recharge the battery to maintain maximum
`battery life. thus enabling the highest number of charge-
`discharge cycles. A user of such intelligent portable devices
`utilizing such smart battm-ies will not only know how much
`charge is left in the battery. but battery run time at various
`rates of power consumption. This enables the user to select
`a mode of operation that will enable maximum service life
`on the remaining state of charge and. how long the device
`will continue to operate.
`Prior art rechargeable battery units have been provided
`with means for generating some desired information to their
`users. including for instance. a charge monitor and fuel
`gauge such as that disclosed in U.S. Pat. No. 5.315.228
`which discloses a method for calculating state of charge and
`reporting run time to empty to the host computer system.
`However. there is a need for a rechargeable power unit
`that will accurately maintain its own state of charge infor-
`mation even when nominally fully discharged such that a
`user will have instantaneous access thereof. Moreover. there
`is also a need for an intelligent rechargeable battery that can
`provide the user with an accurate prediction of its remaining
`operating time at various levels of power consumption. The
`user of such an intelligent device. such as a portable
`computer. can thus elect to power down a hard disk drive to
`extend the operation of the portable computer for a longer
`. period of time than would have been possible at the higher
`rate of power consumption.
`
`SUMMARY OF THE INVENTION
`
`Accordingly. it is an object of the present invention to
`provide a smart battery device for use with a rechargeable
`battery to be installed in a host computer that will optimize
`the performance of the rechargeable battery throughout its
`life cycle.
`It is another object of the instant invention to provide a
`smart battery device that includes a microprocessor for
`controlling a rechargeable battery that performs battery
`capacity calculations for communication to a host computa
`device or a smart battery charge device.
`
`2
`It is still another object of the instant invention to provide
`a smart battery device that includes a microprocessor for
`controlling a rechargeable battery and that provides intelli-
`gence in the form of present state of charge and battery
`charge parameters to a host device for communication to a
`smart charger.
`It is yet still a further object of the instant invention to
`provide a smart battery device that includes a microproces-
`sor for controlling a rechargeable battery that monitors
`battery operating parameters such as voltage. current. and
`temperature to thereby enable either a rapid charging rate or
`an optimal charging rate from any charged state.
`Still yet another object of the instant invention is to
`provide a smart battery device that includes a microproces-
`sor for cont:roll.ing a rechargeable battery that calculates
`predictive data such as the battery’s remaining life at the
`current rate of drain and at alternate rates of drain.
`
`It is still a further object of the instant invention to provide
`a smart battcry device that is an application specific inte-
`grated circuit (ASIC) having analog and digital components.
`Furthermore. another object of the present invention is to
`provide a smart battery device that includes an analog to
`digital (AID) converter for measuring battery charge param-
`eters such as voltage. current. and temperature.
`Yet still another object of the present invention is to
`provide a smart battery device having anAlD converter with
`a single positive power supply that is capable of bipolar
`operation for converting both positive and negative analog
`signals representing battery charge and discharge currents.
`respectively.
`Another object of the instant invention is to provide a
`smart battery device as above wherein the analog and digital
`components of the ASIC comprise CMOS semiconductor
`technology designed for improved accuracy. and high AID
`converter resolution with minimal power consumption.
`Still another object of the present invention is to provide
`a smart battery device having a microprocessor that. when
`nominally discharged. vtdll place itself in a sleep mode with
`virtually no power consumption.
`Yet a further object of the present invention is to provide
`a smart battery device that includes a microprocessor with
`RAM memory. and comprises means for retaining RAM
`memory contents when the device is in a sleep mode.
`Yet still a further object of the invention is to provide a
`smart battery device that comprises short circuit protection
`means for preserving RAM memory contents when battery
`is temporarily short circuited.
`Another object of the instant invention is to provide a
`smart battery device that includes a ROM memory that is
`manufactured by a process that facilitates the programming
`of ROM in an upper or respectively later produced layers.
`Yet furthermore. an object of the instant invention is to
`provide a smart battery device that includes a ROM memory
`device whereby the programming of the ROM is effected in
`a metal mask.
`
`invention is to
`Furthermore. an object of the instant
`provide a smart battery device having incorporated therein
`an error treatment algorithm. for taking into account mea-
`surement errors. interpolation from look-up tables. etc..
`wherein the errors are considered to be a function of time.
`It is contemplated that if a total error is larger than a
`predetermined value. certain operating modes are disabled.
`and. in particular, variables are substituted by default values
`to result in a smaller error. In case of displayed information.
`such as LED battery pack display. the error can be addi-
`
`Exhibit 1028, Page 033
`
`
`

`
`3
`
`5,710,501
`
`4
`
`tionally taken into account. for e.g.. a quantity of: capacity—
`total error in capacity. may be displayed. If an error that is
`too big is produced. the end criterion for determining end of
`charge condition may be changed. for e.g.. using a change in
`battery voltage instead of the error influenced criterion.
`These and other objects of the present invention are
`attained with a smart battery device which provides electri-
`cal power and which reports predefined battery parameters
`to an external device having a power management system.
`wherein the battery includes:
`(a) at least one rechargeable cell connected to a pair of
`terminals to provide electrical power to an external
`device during a discharge mode and to receive electri-
`cal power during a charge mode, as provided or deter-
`mined by said remote device.
`(b) a data bus for reporting predefined battery identifica-
`tion and charge parameters to the external device.
`(c) an analog means for generating analog signals repre-
`sentative of battery voltage and current at said
`terminals. and an analog signal representative of bat-
`tery temperature at said cell.
`(d) a hybrid integrated circuit (IC) having a microproces-
`sor for receiving the analog signals and converting
`them to digital signals representative of battery voltage.
`current and temperature. and calculating actual charge
`parameters over time from said digital signals. said
`calculations including one calculation according to the
`following algorithm:
`
`CAP.....=CAPrcr‘JaNrV1.M.+5£JcA*.
`
`wherein EC is a function of battery current and temperature;
`and I, is a function of battery temperature and CAP,-C.
`(c) a data memory defined within said hybrid IC for
`storing said predefined battery identification and actual
`charge parameters. even when nominally fully
`discharged. said charge parameters including at least
`full charge capacity and remaining capacity.
`(f) a bus controller defined within said hybrid IC for
`sending battery messages to said remote device over
`said data bus. said messages including said predefined
`battery identification and said actual charge parameters.
`Superimposed on this equation is reset logic.
`to be
`explained below. that self corrects the value of CAPFC with
`a capacity calculation at each full charge (EOC) and each
`end of full discharge.
`Further benefits and advantages of the invention will
`become apparent from a consideration of the following
`detailed description given with reference to the accompa-
`nying drawings. which specify and illustrate preferred
`embodiments of the invention.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1 is a diagrammatic block diagram of a smart battery
`device connected to a host computer and battery charging
`device.
`
`FIG. 2(a) is a simplified block diagram of the smart
`battery device and connector. including a pinout diagram of
`an Application Specific Integrated Circuit (hybrid IC) used
`in the present invention.
`FIG. 2(b) illustrates a simplified block diagram of the
`hybrid IC 32 that includes the microcontroller of the smart
`battery device of the instant invention.
`FIG. 3 is a general flow diagram illustrat:ing the primary
`functional features of an algorithm and method for control-
`ling the smart battery device of the instant invention.
`
`FIG. 4 illustrates a general schematic diagram of the A/D
`converter 60.
`
`FIG. 5(a) illustrates a schematic sketch of dc voltage
`shifting circuit arrangement.
`FIG. 5(b) illustrates a second embodiment of the dc
`voltage shifting circuit arrangement.
`FIG. 6 is a schematic sketch of the circuit arrangement in
`the A/D converter 60.
`
`FIG. 7 is a phase diagram in the operation of the A/D
`converter pursuant to FIG. 6.
`FIG. 8(a) illustrates the timing of the operating cycles
`under normal and sample mode operating conditions.
`FIG. 8(b) illustrates the approximate time durations for
`the various measurements per operating cycle.
`FIG. 9(a) illustrates a schematic sketch of a sample
`transition arrangement for the ROM included in the smart
`battery device; and
`FIG. 9(b) is a schematic sketch of the transistor arrange-
`ment of an ROM programmed pursuant to the prior art.
`FIG. 10 is a detailed schematic of the power-on reset 85
`and RAM de—latching circuit 85'.
`FIG. 11 illustrates a detailed schematic diagram of the
`comparator wake-up circuit 80.
`FIG. 12 is a flow diagram illustrating the IUT (current.
`voltage. and temperature) calculation program 200.
`FIGS. 13(a) and 13(b) are flow diagrams illustrating the
`sequential processes 151 programmed in the microprocessor
`for calculating the current capacity and the amount of
`battery self discharge for the smart battery of the instant
`invention.
`
`FIG. 13(0) illustrates the integration program 400 for
`calculating the amount of battery charge or discharge flow-
`ing into or out of its terminals.
`FIGS. 14(a) through l4(c) are flow diagrams illustrating
`the sequential processes 500 prog;rarnmed in the micropro-
`cessor for determining battery end conditions when the
`battery changing is in a capacity increasing state.
`FIG. 14(d) illustrates a flow diagram of the learn number
`of cells program 700.
`FIGS. l5(a) and 15(b) are logic flow diagrams illustrating
`the sequential processes 600 programmed in the micropro-
`cessor for determining battery end conditions when the
`battery is in a capacity decreasing state.
`FIG. 16 illustrates a logic flow diagram of the handle
`request routine that is invoked when there is communication
`between the smart battery and the host computer or battmy
`charger.
`FIG. 17 illustrates a detailed logic flow diagram of the
`write block routine for writing data to the smart battery.
`FIG. 18 illustrates a detailed logic flow diagram of the
`read block routine for reading data from the smart battay.
`FIGS. 19 illustrates a flow diagram describing the logic
`steps invoked by the smart battery system when broadcast-
`ing an alarm condition to an external device.
`FIG. 29 illustrates a logic flow diagram describing the
`steps invoked by the smart battery system when broadcast-
`ing a charge condition to a battery charger.
`FIG. 21 illustrates a logic flow diagram describing the
`steps invoked by the smart battery system when broadcast-
`ing a message.
`FIG. 22(a) is a three-dimensional graphic representation
`of look up tables that depict predicted residual capacity
`values as a function of discharging current and temperature.
`
`30
`
`35
`
`45
`
`50
`
`55
`
`Exhibit 1028, Page 034
`
`
`

`
`5,710,501
`
`5
`FIG. 22(b) is a three-dimensional graphic representation
`of look up tables that depict the amount of self-discharge
`current (vertical axis) as a function of relative battery state
`of charge and temperature.
`FIG. 22(c) is a three-dimensional graphic representation
`of charge efliciency look—up tables showing charge efli-
`ciency factors as a function of relative state of charge,
`charging current, and temperature.
`FIG. 23 illustrates two voltage versus time graphs, a and
`b. comparing calculated battery capacity characteristics at
`various discharging current rates for a six (6) cell battery
`pack.
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENT
`
`The smart battery device of the present invention is
`intended for use with an intelligent host device such as a
`portable computer. portable video camera or cellular tele-
`phone having a system management bus and a smart charger.
`or an intelligent host device having a system power manager
`that can receive and send data over a system management
`bus.
`
`Arepresentative example of such a system is fllustrated in
`FIG. 1. wherein the smart banery 10 is connected to a power
`plane 12 to supply and receive electrical energy over the
`power plane. and a system management bus 14. which is a
`bi-directional modified I2C data bus (communication
`interface) that communicates with a host device 16 which
`may be a portable computer. The host device 16 may be
`powered by the smart battery 10. or by the system power
`supply 18 and a conventional AC source 20. A system power
`supply or power management system also communicates
`with a smart charger 22 which may be used to determine the
`rate and duration of charge sent to the smart battery by the
`power supply. Smart charger 22 also communicates with the
`system management bus 14. and may receive a tempaature
`signal representative of battery cell temperature on a sepa-
`rate line 24. A detailed functional description of the system
`management bus 14 (bi-directional modified 12C data bus)
`can be found in the Intel Duracell System Management Bus
`Specification. Rev 0.95. (April 1994).
`The power management system 18 may supply or draw
`power to/from the smart battery 10 over power plane 12.
`depending upon the state of charge in smart battery 10. and
`depending upon the presence or absence of power at AC
`source 20.
`
`The smart charger 22 may periodically poll the smart
`battery 10 for charge characteristics. and adjust output to
`match a smart battery charge request. Optionally. and if
`selected by the user of the host device. the smart charger 22
`can override the smart battery's charge rate request and
`charge the smart battery at a higher or quick charge rate. The
`user of the host device does not necessarily need to override
`the smart battery’s request. As will be explained in greater
`detail below. the smart battery may periodically broadcast
`the desired charging current. or the smart charger 22 polls
`the smart battery for a charging current. The host or the
`charger need not comply with the smart bat1ery’s request and
`can provide a greater or lesser amount of power than
`requested.
`The host device 16 may communicate with the smart
`battery over the sy