`UNITED STATES PATENT AND TRADEMARK OFFICE
`
`____________________
`
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`____________________
`
`MICRON TECHNOLOGY, INC., AND MICRON MEMORY JAPAN, INC.,
`Petitioners
`
`v.
`
`MASSACHUSETTS INSTITUTE OF TECHNOLOGY
`Patent Owner
`____________________
`
`Case: IPR2015-01087
`U.S. Patent No. 6,057,221
`____________________
`
`PETITION FOR INTER PARTES REVIEW
`
`
`
`
`
`
`
`Mail Stop PATENT BOARD
`Patent Trial and Appeal Board
`U.S. Patent and Trademark Office
`P.O. Box 1450
`Alexandria, VA 22313-1450
`Submitted Electronically via the Patent Review Processing System
`
`

`

`Petition for Inter Partes Review of U.S. Patent No. 6,057,221
`
`
`IPR2015-01087
`
`I.
`
`II.
`III.
`IV.
`
`TABLE OF CONTENTS
`MANDATORY NOTICES UNDER 37 C.F.R. § 42.8(A)(1) ................................................ 1
`A.
`Related Matters under 37 C.F.R. § 42.8(b)(2) .........................................................1
`B.
`Real Party-In-Interest under 37 C.F.R. § 42.8(b)(1) ................................................1
`C.
`Counsel and Service Information .............................................................................2
`PAYMENT OF FEES — 37 C.F.R. § 42.103 ......................................................................... 2
`TECHNOLOGY BACKGROUND ......................................................................................... 2
`REQUIREMENTS FOR IPR UNDER 37 C.F.R. §§ 42.104 ................................................. 3
`A.
`Grounds for Standing Under 37 C.F.R. § 42.104(a) ................................................3
`B.
`Identification of Challenge Under 37 C.F.R. § 42.104(b) .......................................3
`C.
`Level of Ordinary Skill in the Art ............................................................................6
`D.
`Claim Construction under 37 C.F.R. §§ 42.104(b)(3) .............................................6
`SUMMARY OF THE ’221 PATENT ..................................................................................... 8
`V.
`THE CHALLENGED CLAIMS ............................................................................................ 10
`VI.
`PRIOR PROSECUTION ........................................................................................................ 12
`VII.
`VIII. HOW THE CHALLENGED CLAIMS ARE UNPATENTABLE ...................................... 14
`A.
`Ground 1: Claims 3-4, 6-8, 23, 25-26 and 28 Are Anticipated
`Under § 102(a) by Koyou ......................................................................................14
`1.
`The disclosure of Koyou ............................................................................14
`2.
`Koyou anticipates independent claim 3 .....................................................17
`3.
`Koyou anticipates dependent claims 4, 6-8, 23 and 25 ..............................26
`4.
`Koyou anticipates independent claim 26 and dependent
`claim 28 ......................................................................................................30
`Grounds 2 and 3: Claims 14-15 and 29 are Obvious under § 103(a)
`over Wada either in view of Lou (Ground 2) or in view Billig
`(Ground 3), Combined with General Knowledge in the Art .................................31
`1.
`The disclosure of Wada .............................................................................32
`2.
`The disclosure of Lou ................................................................................34
`3.
`The disclosure of Billig ..............................................................................36
`4.
`Wada and either of Lou or Billig, combined with general
`knowledge in the art, disclose every limitation of claim 14 ......................36
`
`B.
`
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`Petition for Inter Partes Review of U.S. Patent No. 6,057,221
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`IPR2015-01087
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`5.
`
`6.
`
`7.
`
`2.
`
`3.
`
`Wada and either of Lou or Billig, combined with general
`knowledge in the art, disclose every limitation of dependent
`claims 15 and 29 ........................................................................................41
`A person of ordinary skill in the art would have been
`motivated to combine the teachings of Wada, either of Lou
`or Billig, and the general knowledge in the art, thereby
`rendering claims 14, 15 and 29 obvious ....................................................42
`Patent Owner’s reexamination arguments do not overcome
`unpatentability over Wada, either of Lou or Billig, and the
`general knowledge in the art ......................................................................44
`Ground 4: Claims 3-4, 6-8, 23, 25-26 and 28 are Obvious under §
`103(a) over Koyou in View of Wada, Combined with General
`Knowledge in the Art .............................................................................................46
`1.
`Koyou and Wada, combined with general knowledge in the
`art, disclose every limitation of claims 3-4, 6-8, 23, 25-26,
`and 28 .........................................................................................................47
`Motivation to combine Koyou, Wada, and the general
`knowledge in the field is found in the references
`themselves and in the general prior art ......................................................50
`Patent Owner’s reexamination arguments do not overcome
`unpatentability over Koyou and Wada ......................................................52
`Grounds 5 and 6: Claims 13, 17-18, 21-22, 24, 27, and 30 are
`Obvious under § 103(a) over Koyou either in view of Lou (Ground
`5) or in view of Billig (Ground 6) ..........................................................................57
`Grounds 7 and 8: Claims 13, 17-18, 21-22, 24, 27, and 30 are
`Obvious under § 103(a) over Koyou in view of Wada and in
`further view of either Lou (Ground 7) or Billig (Ground 8),
`Combined with General Knowledge in the Art .....................................................59
`CONCLUSION ...................................................................................................................... 60
`
`C.
`
`D.
`
`E.
`
`IX.
`
`
`
`
`
`
`ii
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`TABLE OF EXHIBITS
`
`Exhibit #
`
`Exhibit Description
`(Citation is to page, column, or paragraph in original, except for
`Exhibits 1009, for which citation is to inserted page number)
`
`1001
`
`1002
`
`1003
`
`1004
`
`1005
`
`1006
`
`1007
`
`Declaration of Dr. Michael Thomas
`
`Curriculum Vitae of Dr. Michael Thomas
`
`U.S. Patent No. 6,057,221
`
`File History for U.S. Patent No. 6,057,221
`
`The New IEEE Standard Dictionary of Electrical and Electronic Terms, Fifth
`Ed., Institute of Electrical and Electronics Engineers, Inc., New York
`(1993)
`
`Japan Pat. Appl. Publ. No. 8-213465 to Koyou (including English
`translation and supporting declaration)
`
`Japan Pat. Appl. Publ. No. 6-244285 to Wada, et al. (including English
`translation and supporting declaration)
`
`1008
`
`U.S. Patent No. 5,729,042 to Lou et al.
`
`1009
`
`U.S. Patent Application No. 514,800 filed August 14, 1995 (to which
`U.S. Pat. No. 5,729,042 claims priority)
`
`1010
`
`U.S. Patent No. 5,025,300 to Billig et al.
`
`1011
`
`1012
`
`1013
`
`1014
`
`Ex Parte Reexamination Application No. 90/011,607, Request for Ex
`Parte Reexamination filed March 30, 2011
`
`Ex Parte Reexamination Application No. 90/011,607, Corrected Pre-
`amendment under 35 C.F.R. 1.530 filed April 14, 2011
`
`Ex Parte Reexamination Application No. 90/011,607, Order Granting
`Request for Ex Parte Reexamination filed June 23, 2011
`
`Ex Parte Reexamination Application No. 90/011,607, Non-Final Office
`Action of January 26, 2012
`
`iii
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`1015
`
`1016
`
`1017
`
`1018
`
`1019
`
`1020
`
`1021
`
`1022
`
`1023
`
`1024
`
`1025
`
`1026
`
`1027
`
`1028
`
`1029
`
`Ex Parte Reexamination Application No. 90/011,607, Request for
`Reconsideration filed March 26, 2012
`
`Ex Parte Reexamination Application No. 90/011,607, Declaration of Dr.
`Bernstein filed March 26, 2012 (including exhibits)
`
`Ex Parte Reexamination Application No. 90/011,607, Notice of Intent
`to Issue Ex Parte Reexamination Certificate of July 11, 2012
`
`“Thermal Conductivity of Metals,” The Engineering
`ToolBox, http://www.engineeringtoolbox.com/thermal-conductivity-
`metals-d_858.html (last visited April 1, 2015)
`
`Pierson, Handbook of Refractory Carbides and Nitrides: Properties,
`Characteristics, Processing, and Applications, Noyes Publications (1996)
`
`U.S. Patent No. 5,872,389 to Nishimura et al.
`
`U.S. Patent No. 5,675,174 to Nakajima
`
`U.S. Patent No. 5,538,924 to Chen
`
`U.S. Patent No. 5,300,461 to Ting
`
`U.S. Patent No. 5,729,041 to Yoo
`
`U.S. Patent No. 5,747,869 to Prall
`
`Wilson et al., Handbook of Multilevel Metallization For Integrated Circuits:
`Materials, Technology, and Applications, Noyes Publications (1993)
`
`Wolf, Silicon Processing for the VLSI ERA Volume 2: Process Integration,
`Lattice Press, Sunset CA (1990)
`
`Construction Analyses of the Samsung KM44C4000J-7 16 Megabit
`DRAM, published by Integrated Circuit Engineering, Scottsdale AZ,
`Report No. SCA 9311-3001 (available at
`http://smithsonianchips.si.edu/ice/cd/9311_300.pdf)
`
`Construction Analyses of the Lattice ispLSI2032-180L CPLD, published
`by Integrated Circuit Engineering, Scottsdale AZ, Report No. SCA
`9712-573 (available at
`http://smithsonianchips.si.edu/ice/cd/9712_573.pdf)
`
`iv
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`Petition for Inter Partes Review of U.S. Patent No. 6,057,221
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`1030
`
`1031
`
`1032
`
`1033
`
`1034
`
`1035
`
`1036
`
`1037
`
`1038
`
`Construction Analysis of the Intel Pentium Processor w/MMX,
`published by Integrated Circuit Engineering, Scottsdale AZ, Report No.
`SCA 9706-540 (available at
`http://smithsonianchips.si.edu/ice/cd/9706_540.pdf)
`
`“Intel Introduces The Pentium® Processor With MMX™ Technology,”
`http://www.intel.com/pressroom/archive/releases/1997/dp010897.ht
`m
`(last visited April 14, 2015)
`
`“Intel Microprocessor Quick Reference Guide,”
`http://www.intel.com/pressroom/kits/quickreffam.htm#pentium (last
`visited April 26, 2015)
`
`Construction Analyses of the Motorola PC603R Microprocessor,
`published by Integrated Circuit Engineering, Scottsdale AZ, Report No.
`SCA 9709-551 (available at
`http://smithsonianchips.si.edu/ice/cd/9709_551.pdf)
`
`Construction Analyses of the Toshiba TC5165165AFT-50 64 Mbit
`DRAM, published by Integrated Circuit Engineering, Scottsdale AZ,
`Report No. SCA 9702-524 (available at
`http://smithsonianchips.si.edu/ice/cd/9702_524.pdf)
`
`“Material: Stainless steel, bulk,”
`https://www.memsnet.org/material/stainlesssteelbulk/ (last visited
`April 14, 2015)
`
`“Material: Silicon Dioxide (SiO2), bulk,”
`https://www.memsnet.org/material/silicondioxidesio2bulk/ (last
`visited April 14, 2015)
`
`Osaka, et al. “Development of new electrolytic and electroless gold
`plating processes for electronics applications,” Science and Technology
`of Advanced Materials, vol. 7 (2006), pp. 425-437.
`
`Uttecht et al., "A four-level-metal fully planarized interconnect
`technology for dense high performance logic and SRAM applications,"
`VLSI Multilevel Interconnection Conference, 1991, Proceedings, Eighth
`International IEEE, June 11-12, 1991, pp. 20-26
`
`v
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`Petition for Inter Partes Review of U.S. Patent No. 6,057,221
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`
`IPR2015-01087
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`1039
`
`1040
`
`1041
`
`1042
`
`Ex Parte Reexamination Application No. 90/011,607, Patent Owner
`Statement filed August 12, 2011
`
`Seshan ed., Handbook of Thin-Film Deposition Processes and Techniques:
`Principles, Methods, Equipment and Applications, Second Ed., Noyes
`Publications, New York (2002)
`
`Vlassak, et al., “A new bulge test technique for the determination of
`Young’s modulus and Poisson’s ratio of thin films”, J. Mater. Res., Vol.
`7, No. 12, Dec 1992
`
`Ineos USA LLC v. Berry Plastics Corp., No 2014-1540, 2015 WL 1727013,
`(Fed. Cir. Apr. 16, 2015) (precedential)
`
`vi
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`Petition for Inter Partes Review of U.S. Patent No. 6,057,221
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`IPR2015-01087
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`Micron Technology, Inc. (“Micron”) and Micron Memory Japan, Inc. (“Micron
`
`Memory Japan” or “MMJ”) (collectively “Petitioners”) hereby petition under 35
`
`U.S.C. §§ 311-319 and 37 C.F.R., Part 42 for Inter Partes Review (“IPR”) of claims 3-4,
`
`6-8, 13-15, 17-18 and 21-30 (“the Challenged Claims”) of U.S. Patent No. 6,057,221
`
`(the “’221 patent”) (Ex. 1003), filed on April 3, 1997, as reexamined pursuant to
`
`Reexamination Request No. 90/011,607. The ’221 patent issued on May 2, 2000, to
`
`Joseph B. Bernstein and Zhihui Duan, and is assigned to the Massachusetts Institute
`
`of Technology (“MIT” or “Patent Owner”), according USPTO assignment records.
`
`The Reexamination Certificate issued on September 11, 2012. There is a reasonable
`
`likelihood that Petitioners will prevail with respect to at least one Challenged Claim.
`
`I. MANDATORY NOTICES UNDER 37 C.F.R. § 42.8(a)(1)
`A. Related Matters under 37 C.F.R. § 42.8(b)(2)
`The ’221 patent is currently asserted by MIT against Micron, Micron Memory
`
`Japan, Elpida Memory USA, Inc. (“Elpida USA”), Elpida Memory, Inc. (“EMI”)1,
`
`and Apple Inc. in the pending litigation, MIT v. Micron Tech., Inc. et al., Civil Action No.
`
`1:15-cv-10374, filed on February 12, 2015, in the U.S. District Court for the District
`
`of Massachusetts.
`
`B. Real Party-In-Interest under 37 C.F.R. § 42.8(b)(1)
`Petitioners Micron and Micron Memory Japan, along with Elpida USA, Micron
`
`
`1 EMI is a bankrupt Japanese entity, succeeded by and known as MMJ.
`
`1
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`Petition for Inter Partes Review of U.S. Patent No. 6,057,221
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`IPR2015-01087
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`Semiconductor Products, Inc., and the trustees reorganizing EMI in Tokyo district
`
`court, are the real parties-in-interest.
`
`C.
`
`Counsel and Service Information
`Lead Counsel
`
`Back-Up Counsel
`
`David J. Cooperberg (Reg. No. 63,250)
`
`Thomas R. Makin (tmakin@kenyon.com)
`
`dcooperberg@kenyon.com
`
`Rose Cordero Prey (rcordero@kenyon.com)
`
`Kenyon & Kenyon LLP
`
`Kenyon & Kenyon LLP
`
`One Broadway
`
`One Broadway
`
`New York, NY 10004
`
`New York, NY 10004
`
`T: (212)-908-6146; F: (212)-425-5288
`
`
`Petitioners consent to email service. Back-Up Counsel will seek authorization
`
`T: (212)-425-7200; F: (212)-425-5288
`
`to submit motions to appear pro hac vice before the Board on behalf of Petitioners.
`
`II.
`
`PAYMENT OF FEES — 37 C.F.R. § 42.103
`The U.S. Patent and Trademark Office is authorized to charge the filing fee,
`
`and any other required fees, to Deposit Account 11-0600 (Kenyon & Kenyon LLP).
`
`III. TECHNOLOGY BACKGROUND
`The ’221 patent relates to a prior-art technology commonly used in the
`
`integrated circuit (“IC”) industry, which involves embedding fuses during
`
`manufacturing. Ex. 1001, ¶¶ 20-22. ICs commonly include active elements (such as
`
`transistors) formed on silicon, to which electrical connections are made using a multi-
`
`level “interconnect” structure, each level containing electrically-conducting lines for
`
`2
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`Petition for Inter Partes Review of U.S. Patent No. 6,057,221
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`interconnecting circuit elements, and each separated by an electrically insulating layer.
`
`Id. The embedded fuses are commonly situated in one of the metal levels present in a
`
`multi-level interconnect structure. Id.
`
`Once an IC device containing such fuses has been fabricated, but typically
`
`before it has been packaged, the device is tested for operability. Id. at ¶ 23-25. If
`
`defects are detected, the fuses can be blown to disconnect the defective circuit
`
`components and, optionally, to make alternate connections to redundant circuitry. Id.
`
`This allows salvaging of otherwise inoperative devices, to boost overall manufacturing
`
`yield. Id. Selectively blowing embedded fuses can also be used to program logic
`
`devices. Id.
`
`One common fuse structure used for repair and programming in the prior art
`
`was the laser fuse, sometimes called a laser fuse-link, a laser cut-link, or simply a fuse-
`
`link or cut-link. Id. at ¶ 26. To “blow” this type of fuse, a conductive element in the
`
`IC is exposed to a focused laser beam for a length of time sufficient to evaporate or
`
`ablate the element, thereby creating an open circuit. Id.
`
`IV. REQUIREMENTS FOR IPR UNDER 37 C.F.R. §§ 42.104
`A. Grounds for Standing Under 37 C.F.R. § 42.104(a)
`Petitioners certify that the ’221 patent is available for IPR and that Petitioners
`
`are not barred or estopped from requesting IPR.
`
`B.
`Identification of Challenge Under 37 C.F.R. § 42.104(b)
`Petitioners request cancellation of all Challenged Claims (claims 3-4, 6-8, 13-15,
`
`3
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`17-18, and 21-30—i.e., the claims that survived Ex Parte Reexamination Request No.
`
`90/011,607), based on the following references and the Declaration of Dr. Michael
`
`Thomas (“Thomas Declaration” or “Thomas Decl.”) (Ex. 1001):
`
`1) Japan Pat. Appl. Publ. No. 8-213465 (“Koyou”) (Ex. 1006), published
`
`August 20, 1996, and qualifying as prior art under 35 U.S.C. §102(a);
`
`2) Japan Pat. Appl. Publ. No. 6-244285 (“Wada”) (Ex. 1007), published
`
`September 2, 1994, and qualifying as prior art under 35 U.S.C. §102(b);
`
`3) U.S. Patent No. 5,729,042 (“Lou”) (Ex. 1008), filed April 2, 1997, and
`
`claiming priority to U.S. Patent Appl. No. 514,800 (Ex. 1009), filed
`
`August 14, 1995, and qualifying as prior art under 35 U.S.C. § 102(e); and
`
`4) U.S. Patent No. 5,025,300 (“Billig”) (Ex. 1010), published on June 18,
`
`1991, and qualifying as prior art under 35 U.S.C. §102(b).
`
`Koyou, Wada and Lou were of record during the ex parte reexamination of
`
`the ’221 patent and formed the basis for initial rejections. Patent Owner overcame
`
`the rejections by amendments and arguments based on an (until now) uncontroverted
`
`declaration by patent co-inventor, Dr. Joseph Bernstein (“Bernstein Declaration” or
`
`“Bernstein Decl.”) (Ex. 1016).
`
`The specific statutory grounds of unpatentability are as follows:
`
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`Petition for Inter Partes Review of U.S. Patent No. 6,057,221
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`Ground
`
`’221 Patent Claims
`
`Basis for Challenge
`
`1
`
`3-4, 6-8, 23, 25-26, 28
`
`Anticipated under 35 U.S.C. §102(a) by
`
`Koyou
`
`2
`
`14-15, 29
`
`Obvious under §103(a) over Wada, Lou, and
`
`General Knowledge in the Art
`
`3
`
`4
`
`5
`
`6
`
`7
`
`8
`
`14-15, 29
`
`Obvious under §103(a) over Wada, Billig, and
`
`General Knowledge in the Art
`
`3-4, 6-8, 23, 25-26, 28
`
`Obvious under §103(a) over Koyou, Wada,
`
`and General Knowledge in the Art
`
`13, 17-18, 21-22, 24, 27, 30 Obvious under §103(a) over Koyou and Lou
`
`13, 17-18, 21-22, 24, 27, 30 Obvious under §103(a) over Koyou and Billig
`
`13, 17-18, 21-22, 24, 27, 30 Obvious under §103(a) over Koyou, Wada,
`
`Lou, and General Knowledge in the Art
`
`13, 17-18, 21-22, 24, 27, 30 Obvious under §103(a) over Koyou, Wada,
`
`Billig, and General Knowledge in the Art
`
`Each of these grounds is explained below and supported by the Thomas
`
`Declaration and the other exhibits. The Thomas Declaration explains how a person
`
`of ordinary skill in the art would have understood the scope and content of the prior
`
`art as well as the motivation to combine the prior art teachings. The Thomas
`
`Declaration also rebuts the Bernstein Declaration in detail.
`
`5
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`C.
`Level of Ordinary Skill in the Art
`As set forth in the Thomas Declaration, a person of ordinary skill in the art
`
`with respect to the technology described in the ’221 patent would be a person with a
`
`Bachelor of Science degree in electrical engineering, chemical engineering, materials
`
`science, chemistry or physics and at least 3-5 years of work experience designing
`
`devices and/or fabricating chips, or a person with a Master’s degree in the same areas
`
`and at least 2-3 years of the same work experience, or a person with a Ph.D. in the
`
`same areas with 1 year of such work experience. Ex. 1001, ¶¶ 46-47.
`
`D. Claim Construction under 37 C.F.R. §§ 42.104(b)(3)
`A claim subject to IPR is given its “broadest reasonable construction in light of
`
`the specification.” 37 C.F.R. § 42.100(b). Its terms are to be given their plain
`
`meaning unless inconsistent with the specification. See In re Zletz, 893 F.2d 319, 321
`
`(Fed. Cir. 1989). Petitioners submit, for this IPR, that the ’221 patent terms should be
`
`construed to have their plain and ordinary meaning in view of the specification.
`
`In particular, Petitioners submit that the meanings of the terms “cut-link
`
`(cutlink) pad” (all Challenged Claims); “substrate” (all Challenged Claims); and
`
`“harder than the substrate” (claims 14-15, 29-30) are as follows:
`
`1) “cut-link (cutlink) pad” is “an electrically-conductive segment of a circuit capable
`
`of being ablated in whole or in part when exposed to a laser beam”;
`
`2) “substrate” is “base structure, including overlying insulating layers”; and
`
`3) “harder than the substrate” is “harder than the layer of the substrate upon which
`
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`Petition for Inter Partes Review of U.S. Patent No. 6,057,221
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`the cut-link pad resides.”
`
`With respect to “cut-link pad” and “cutlink pad,” the proper construction is
`
`evident from Figures 1-11 of the ’221 patent and associated text, each depicting fuse
`
`elements, generally labeled “20,” which are designed to be removed by laser
`
`irradiation, and which the patent identifies as cut-link pads. See, e.g., Ex. 1003, 3:48-
`
`4:20, 4:36-38; 6:29-31 (“When a laser pulse is incident on the cut-link pad 20, the cut-
`
`link pad 20 is heated and expands.”), Figs. 1-11; Ex. 1001, ¶ 51.
`
`With respect to the term “substrate,” the ’221 patent consistently defines this
`
`term as including overlying insulating layers. See, e.g., Ex. 1003, 2:22-27 (“The
`
`electrical interconnect of this invention includes an insulating substrate upon which a
`
`pair of electrically-conductive lines are bonded to a cut-link pad . . .”), 6:45-57
`
`(“Typically, the substrate 34 of a chip includes a silicon wafer base upon which a
`
`dielectric material, such as a silicon oxide, is layered.”); see also Ex. 1005, 1306
`
`(“substrate (1) (integrated circuits). The supporting material upon or within which an
`
`integrated circuit is fabricated or to which an integrated circuit is attached.”); Ex.
`
`1001, ¶ 52. Likewise, the ’221 patent consistently uses the term “harder than the
`
`substrate” to refer to the layer of the substrate upon which the cut-link pad or fuse
`
`resides, and not to the base substrate or wafer:
`
`Typically, the substrate 34 of a chip includes a silicon wafer base
`upon which a dielectric material, such as a silicon oxide, is layered.
`The circuit is then imprinted onto the dielectric material. Because
`
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`silicon nitride is more brittle than silicon oxide, fracture initiation is
`biased toward the silicon nitride. By promoting fracture through the
`passivation layer 30, rather than through the substrate 34, the metal is
`more likely to be completely ablated from the chip, and the likelihood
`of forming a short through the substrate is reduced.
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`Ex. 1003, 6:45-56; see also Ex. 1001, ¶ 53.
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`These constructions relating to the “substrate” are confirmed by Patent
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`Owner’s statements in reexamination that the Lou reference fails to provide
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`motivation for using a passivation layer that is “harder than the substrate”:
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`Lou discloses a vertical fuse structure having a pedestal 10 of silicon
`oxide, resting on a layer 12 of the same material lying on the surface
`of a silicon substrate 11 . . . . Although Lou discloses a fuse having a
`pedestal 10 and two passivating layers 15, 16 covering the fuse, Lou is
`silent as to any hardness requirements for pedestal 10 (see the Bernstein
`Declaration, paragraph 73). Instead, Lou specifically discloses that
`the fuse structure will still operate successfully with any material that
`has relatively low thermal conductivity for the pedestal 10, without
`mention of hardness. . . .
`
`Ex. 1015, 31-32 (emphasis added)); see also Ex. 1001, ¶¶ 54-55.
`
`V.
`
`SUMMARY OF THE ’221 PATENT
`The ’221 patent, entitled “Laser-Induced Cutting of Metal Interconnect,” is
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`directed to methods for severing connections between electrical circuits using laser
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`cut-links having a particular structure. See, e.g., Ex. 1003, 1:10-21, 64-67, Figs. 3, 10;
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`Ex. 1001, ¶¶ 27-28. The patent explains that cut-links or fuses are commonly
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`included in semiconductor circuits to allow for the bypassing of portions of circuits
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`that contain defects associated with the manufacturing process (see, e.g., Ex. 1003 at
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`1:10-14, 27-32), and discloses a cut-link consisting of a cut-link pad electrically
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`connected between a pair of electrically-conductive lines formed on an insulating
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`substrate (id. at 2:22-27). To break the cut-link and bypass portions of circuitry, a
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`laser is directed upon the cut-link pad until it is ablated and the conductive link
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`between the electrically-conductive lines is broken. Id. at 3:1-3; Ex. 1001, ¶¶ 36-38.
`
`The ’221 patent discloses an embodiment in which the thermal resistance of
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`the cut-link pad is decreased, relative to co-planar connecting conductive lines, by
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`increasing the width of the pad relative to the connecting lines (Ex. 1003, 2:35-40,
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`Figs 3, 4), as well as an embodiment in which the thermal resistance of the cut-link
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`pad is decreased, relative to the connecting conductive lines, by constructing the pad
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`and lines out of materials having different thermal conductivity. Id. at 2:50-53. The
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`patent also discloses an embodiment in which the connecting lines extend downward
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`from the pad deeper into the insulating substrate to “provide a conductive link
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`between levels of the integrated circuit.” Id. at 8:25-30, Figs. 10-11; Ex. 1001, ¶¶ 32-
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`35. The patent explains that the disclosed cut-link pads can be more efficiently
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`ablated upon laser irradiation, because: (i) thermal energy accumulates in the pad and
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`is restricted (by geometry or material) from escaping through the connecting lines; (ii)
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`fracture toward the passivation layer is promoted through choice of materials; and (iii)
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`the larger pads, which more closely approximate the size of the laser beam, absorb
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`more laser energy and reduce damage to surrounding material. Ex. 1003 at 3:6-30,
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`5:24-26, 6:13-18, 9:19-41; Ex. 1001, ¶¶ 29-30, 38.
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`The patent also discloses covering the pad with a passivative coating to prevent
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`oxidation—a technique it admits is in the prior art—and further discloses passivative
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`coatings comprised of a brittle material that more easily fractures and allows for
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`expulsion of the pad metal during ablation. Ex. 1003 at 1:16-18, 3:25-29, 6:19-21; Ex.
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`1001, ¶ 31.
`
`VI. THE CHALLENGED CLAIMS
`All of the Challenged Claims are directed to methods of cutting links. of
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`particular design, between interconnected circuits, and each claim includes a cut-link
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`pad “having substantially less thermal resistance per unit length” than the electrically-
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`conductive lines connecting to the pad. Independent claims 3, 17 and 26 are directed
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`to cut-link fuse geometries in which “electrically-conductive lines” make contact with
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`an inner, or bottom, surface of a cut-link pad and extend “from the inner surface into
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`the substrate.” See, e.g., Ex. 1003, Figs. 10-11, claims 3, 17, 26. Claim 3 further recites
`
`that the cut-link pad be at least ten percent wider than the electrically-conductive
`
`connecting lines. Claim 17 yet further recites that the pad be covered with a
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`passivative layer. Claim 26 recites that the pad is formed of a material having a greater
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`thermal conductance than the material used for the connecting lines.
`
`Claims 4, 6-8, 13, 21-25, and 30 depend directly or indirectly from independent
`
`claim 3. Claim 4 recites that the laser beam extends across the entirety of the cut-link
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`pad. Claims 6 and 7 recite that the cut-link pad is 25% (claim 6) or 50% (claim 7)
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`wider than the electrically-conductive lines. Claim 8 depends from claim 7 and recites
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`that the pad and lines are comprised of substantially identical compositions. Claim 13
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`recites a passivative layer covering the pad. Claim 21 depends from claim 13 and
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`recites a pad comprised of material having a greater thermal conductivity than the
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`electrically-conductive line material. Claim 22 depends from claim 21 and recites an
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`aluminum pad. Claim 23 recites a pad having greater cross-sectional area than the
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`electrically conductive lines. Claim 24 depends from claim 13, and recites that the
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`passivative material layer is comprised of silicon nitride. Claim 25 depends from claim
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`4, and recites a cut-link pad having a length of 2-3 microns and electrically-conductive
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`connecting lines having a width of about 0.5 microns. Claim 30 depends from claim
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`13, and recites that the passivative layer is harder than the substrate.
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`Claim 18 depends from independent claim 17, and recites that the laser beam
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`extends across the entirety of the cut-link pad.
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`Claims 27 and 28 depend from independent claim 26. Claim 27 recites a
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`passivative silicon nitride layer covering the pad. Claim 28 recites an aluminum pad.
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`The structure recited in independent claim 14 differs from that described in the
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`other independent claims in that there is no limitation as to where the electrically-
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`conductive lines connect to the cut-link pad; therefore, it covers methods in which the
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`connecting lines and cut-link pad are coplanar. See, e.g., ’221 patent at Figs. 2-3. Claim
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`14 also recites a “passivative layer that is harder than the substrate.”
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`Claim 15 depends from claim 14 and recites that the passivation layer is silicon
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`nitride. Claim 29 also depends from claim 14 and recites a cut-link pad width that is
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`at least 50% wider than the electrically-conductive connecting lines.
`
`VII. PRIOR PROSECUTION
`The ’221 patent issued on May 2, 2000. On March 30, 2011, Patent Owner
`
`requested ex parte reexamination. Ex. 1011. Patent Owner filed a preliminary
`
`amendment on April 14, 2011, amending certain claims, cancelling claims 1-2, 5, 9-10,
`
`12, 16 and 20, and adding new claims 22-29. Ex. 1012. The request was granted on
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`June 23, 2011, Ex. 1013, and, in a non-final office action, Ex. 1014, all then-pending
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`claims were rejected as obvious over one or more of Koyou, Wada, and Lou. These
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`claims included all Challenged Claims except later-added dependent claim 30, which
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`recites a passivative layer harder than the substrate (as in initially rejected claim 14).
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`Patent Owner then submitted a declaration by named inventor Dr. Joseph
`
`Bernstein. Ex. 1016. As explained in detail below, this declaration contains
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`misstatements and omissions, including: (i) failure to address the full-scope of
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`Koyou’s disclosure of fuse dimensions and materials, (ii) inaccurate portrayal of the
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`scope and content of the prior art, including accepted silicon processing methods, (iii)
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`inaccurate portrayal of the level of knowledge of one of ordinary skill with respect to
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`generally known processing technology and thin film properties, and (iv)
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`inappropriate reliance on inapplicable process trends characterized in Moore’s Law.2
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`The examiner expressly relied on Dr. Bernstein’s deficient declaration in
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`subsequently allowing the Challenged Claims. Ex. 1017, 2-5.
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`As set forth below, Patent Owner’s Reexamination Request failed to identify—
`
`and the examiner failed to consider—critical disclosures in Koyou which, when
`
`properly considered, render claims 3-4, 6-8, 23, 25-26 and 28 unpatentable under §
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`102. These disclosure include: (i) Koyou’s disclosure of Figure 1 as a “plan view” of
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`Figure 3 (see Ex. 1006, Figs. 1-3, ¶¶ 0009, 0018, 0021) and (ii) Koyou’s disclosure of
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`titanium and titanium nitride, in addition to tungsten, for filling contact holes (Ex.
`
`1006, ¶ 0021) so as to form electrically-conductive lines for connecting to a cut-link
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`pad that have thermal resistivities several times higher than those made of tungsten.
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`Also, as set for