United States Patent [I91
`Nishimura et al.
`
`[54] SEMICONDUCTOR DEVICE HAVING A
`FUSE LAYER
`
`[75]
`
`Inventors: Yasumasa Nishimura; Keiko Ito;
`Hiroyuki Takeoka; Masanao Maruta;
`Masaharu Moriyasu, all of Hyogo,
`Japan
`
`[73] Assignee: Mitsubishi Denki Kabushiki Kaisha,
`Tokyo, Japan
`
`[21] Appl. No.: 672,867
`Jun. 28, 1996
`
`[22] Filed:
`P O I
`Foreign Application Priority Data
`Japan .................................... 8-012778
`Jan. 29, 1996
`[JP]
`[51] Int. C1.6 ............................. HOlL 27/10; HOlL 29100
`[52] U.S. C1. .......................... 2571529; 2571208; 2571209;
`2571630
`[58] Field of Search ..................................... 2571208, 209,
`2571529, 630
`
`~561
`
`4,853,758
`
`References Cited
`U.S. PATENT DOCUMENTS
`811989 Fischer .
`
`US005872389A
`[ill Patent Number:
`[45] Date of Patent:
`
`5,872,389
`Feb. 16,1999
`
`811993 Motonami et al. ..................... 2571529
`5,241,212
`611994 Usuda et al. ............................ 2571529
`5,321,300
`711994 Yukihiro .................................. 2571529
`5,331,195
`811995 Yoshizumi et al. ....................... 437160
`5,444,012
`5,578,861 1111996 Kinoshita et al. ...................... 2571529
`
`FOREIGN PATENT DOCUMENTS
`0 162 145 1111985 European Pat. Off. .
`Japan ..................................... 2571529
`6-104338 411994
`
`Primary Examiner-Valencia Wallace
`Attorney, Agent, or F i r m a c D e r m o t t , Will & Emery
`
`[571
`
`ABSTRACT
`Burst pressure P of an insulating layer positioned immedi-
`ately on a fuse layer is defined by using planar width W of
`fuse layer and thickness t of insulating layer. The value of
`the planar width W of fuse layer and the value of the
`thickness t of insulating layer are set such that the value of
`burst pressure P is at most about 1000 kg/cm2. The value of
`the thickness t and the value of the planar width W are set
`such that the value t/W is at least 0.45 and at most 0.91.
`Consequently, stable fuse blowing becomes possible while
`reducing manufacturing cost.
`
`8 Claims, 9 Drawing Sheets
`
`IPR2015-01087 - Ex. 1020
`Micron Technology, Inc., et al., Petitioners
`1
`
`

`
`U.S. Patent
`
`Feb. 16,1999
`
`Sheet 1 of 9
`
`FIG. I
`
`2
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`

`
`U.S. Patent
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`Feb. 16,1999
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`Sheet 2 of 9
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`3
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`

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`U.S. Patent
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`Feb. 16,1999
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`Sheet 3 of 9
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`FIG. 3
`
`FIG. 4
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`4
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`

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`U.S. Patent
`
`Feb. 16,1999
`
`Sheet 4 of 9
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`FIG. 5
`
`FIG. 6
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`2a
`
`5
`
`

`
`U.S. Patent
`
`Feb. 16,1999
`
`Sheet 5 of 9
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`FIG. 7
`
`FIG. 8
`
`6
`
`

`
`U.S. Patent
`
`Feb. 16,1999
`
`Sheet 6 of 9
`
`FIG. 9A
`
`FIG. 9B
`
`7
`
`

`
`U.S. Patent
`
`Feb. 16,1999
`
`Sheet 7 of 9
`
`FIG. 10
`
`8
`
`

`
`U.S. Patent
`
`Feb. 16,1999
`
`Sheet 8 of 9
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`9
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`

`
`U.S. Patent
`
`Feb. 16,1999
`
`Sheet 9 of 9
`
`FIG. 12
`
`FIG. 13
`
`10
`
`

`
`1
`SEMICONDUCTOR DEVICE HAVING A
`FUSE LAYER
`
`BACKGROUND OF THE INVENTION
`
`5
`
`10
`
`1. Field of the Invention
`The present invention relates to a semiconductor device
`having a fuse layer, and, more specifically, to a semicon-
`ductor device having a fuse layer in which an insulating
`layer positioned on the fuse layer is about 1 pm in thickness.
`2. Description of the Background Art
`A redundancy circuit provided for repairing defects of a
`semiconductor device has been known. Generally, a fuse
`layer is formed together with the redundancy circuit, and the
`fuse layer is disconnected appropriately so as to replace a
`defective circuit with a redundant circuit.
`FIG. 10 shows a specific structure of a DRAM (Dynamic
`Random Access Memory) as an example of a semiconductor
`device having a redundancy circuit. Referring to FIG. 10, a
`plurality of word lines WL extends in a row direction from 20
`respective row decoders 21 with word driver 22 interposed,
`in a memory cell array 20. Aplurality of bit lines BL extend
`in a column direction from respective column decoders 23.
`Word lines WL and bit lines BL are arranged to cross each
`other. Amemory cell MC is provided at each crossing point. 2s
`Outside the word lines WL, there is a spare word line
`SWL extending in the row direction from a spare decoder 24
`with a spare word driver 25 interposed. At crossing points
`between spare word line SWL and the bit lines BL, spare
`memory cells SMC are provided.
`Spare word line SWL, spare decoder 24 and spare word
`driver 25 constitute a so called redundancy circuit. A defec-
`tive address comparing circuit 26 is connected to spare
`decoder 24, and a fuse layer is formed in defective address
`comparing circuit 26. The redundancy circuit is controlled 35
`by the fuse layer. Arow address is input to defective address
`comparing circuit 26. FIG. 11 is a cross section showing the
`fuse layer portion and its periphery of the DRAM having
`such a structure. In FIG. 11, conductive layers other than the
`fuse layer 2 are not shown for the convenience of descrip- 40
`tion.
`Referring to FIG. 11, a fuse layer 2 is formed on a main
`surface of a semiconductor substrate 1 with an interlayer
`insulating layer 3a interposed. An insulating layer 3b of a
`silicon oxide, for example, is formed to cover fuse layer 2. 45
`A defective circuit is repaired by appropriately discon-
`necting the above described fuse layer 2. Generally, laser is
`used to disconnect fuse layer 2. The principle of discon-
`necting fuse layer 2 by laser will be described.
`Again referring to FIG. 11, fuse layer 2 is irradiated with
`laser 8. Consequently, laser is absorbed in fuse layer 2, and
`fuse layer 2 evaporates.
`Consequently, insulating layer 3b is pushed up by the
`evaporating pressure of fuse layer 2 as shown in FIG. 12. 55
`When the evaporating pressure of fuse layer 2 attains to a
`prescribed value or higher, a crack 9 is generated in insu-
`lating layer 3b, as shown in FIG. 12. As the evaporating
`pressure generated by the evaporation of fuse layer 2 is
`further acts on the insulating layer 3b, insulating layer 3b 60
`positioned on fuse layer 2 is blown off, as shown in FIG. 13.
`Fuse layer 2 is disconnected through these steps.
`As semiconductor devices has been miniaturized recently,
`planar width of the above described fuse layer 2 tends to be
`reduced. Therefore, there arises a problem that stable blow- 65
`ing of fuse layer 2 becomes difficult if the thickness t of
`insulating layer 3b on fuse layer 2 is as thick as about 1 pm.
`
`30
`
`50
`
`389
`
`2
`In view of the foregoing, U.S. Pat. No. 4,853,758 dis-
`closes a method for facilitating blowing of fuse layer 2.
`According to U.S. Pat. No. 4,853,758, there is formed a
`recess portion at the surface of insulating layer 3b immedi-
`ately on fuse layer 2, so as to reduce thickness of insulating
`layer 3b immediately above the fuse layer 2. This allows
`stable blowing of fuse layer 2.
`However, in order to form such a recess as described
`above at the surface of insulating layer 3b, a new process
`step such as selective etching of insulating layer 3b becomes
`necessary. This makes manufacturing process complicated,
`resulting in increased manufacturing cost.
`Alternatively, when the thickness of insulating layer 3b on
`fuse layer 2 is as thick as 1 pm or more, a method may be
`possible in which energy of the laser with which the fuse
`layer 2 is irradiated is increased. However, if the laser energy
`is set larger, there may possibly be a damage to the semi-
`conductor substrate, for example underlying the fuse layer 2.
`
`SUMMARY OF THE INVENTION
`The present invention was made to solve the above
`described problems. An object of the present invention is to
`provide a semiconductor device having a fuse layer which
`allows stable fuse blowing by laser and which allows
`reduction in manufacturing cost even when the thickness of
`insulating layer 3b on fuse layer 2 is as large as about 1 pm
`or more.
`Another object of the present invention is to provide a
`semiconductor device having a fuse layer which mitigates
`damage to the layer underlying the fuse layer caused by laser
`irradiation for fuse blowing, even when the thickness of
`insulating layer 3b on fuse layer 2 is as large as about 1 pm
`or more.
`According to one aspect, the semiconductor device hav-
`ing a fuse layer in accordance with the present invention
`includes a redundancy circuit, a fuse layer and an insulating
`layer. The fuse layer controls the redundancy circuit. The
`insulating layer is formed to cover the fuse layer and has a
`thickness of at least about 1 pm. In this device, when the
`thickness of the insulating layer is t and planar width of fuse
`layer is W, the value t/W is at least 0.45 and at most 0.91.
`As described above, according to one aspect, the planar
`width W of the fuse layer is defined with respect to the
`thickness t of the insulating layer such that the value t/W is
`at least 0.45 and at most 0.91. The inventors of the present
`invention have found that stable fuse blow is possible while
`the value t/W is within such a range. The reason why the
`value t/W is limited within the aforementioned range will be
`described. The inventors noted the evaporating pressure
`generated when the fuse layer evaporates at the time of laser
`irradiation in accordance with the fuse blowing mechanism
`described with reference to the conventional technique
`shown in FIGS. 11 to 13, and tried to define the evaporating
`pressure sufficient to burst the insulating layer on the fuse
`layer, that is, burst pressure for the insulating layer by some
`parameter. The inventors succeeded in defining by math-
`ematical expression of the burst pressure for the insulating
`layer by using the thickness t of the insulating layer and the
`planar width W of the fuse layer. FIG. 2 is a graph showing
`the results obtained by the mathematical expression. FIG. 2
`shows an example in which the insulating layer is an oxide
`film. However, similar tendency may be recognized when
`insulating layers other than the oxide film are used. Refer-
`ring to FIG. 2, while the value t/W is within the aforemen-
`tioned range, it can be recognized that the value of burst
`pressure P of insulating layer is relatively small (at most
`
`11
`
`

`
`5,872,389
`
`3
`4
`FIG. 6 is a plan view showing an example of arrangement
`about 1000 kg/cm2), and that inclination of the curve rep-
`of the fuse layer shown in FIG. 3.
`resenting burst pressure P is also small. Namely, if the value
`t/W is kept within the aforementioned range, the value of
`FIG. 7 is a plan view showing an example of arrangement
`burst Pressure P can be kept small, and change in burst
`of a modification of the fuse layer shown in FIG. 3 .
`pressure
`fuse
`can be
`FIG, 8 is a plan view showing a fuse layer in accordance
`Further, in the above described one aspect, it is not necessary
`with a third embodiment of the present invention,
`to form a recessed portion at the surface of the insulating
`9Ais a plan view
`a fuse layer in
`layer positioned immediately on the fuse layer, unlike U,S,
`with a fourth embodiment of the present invention.
`Pat. No. 4,853,758. Therefore, manufacturing cost can be
`FIG. 9B is a cross section taken along the line IXb-IXb
`reduced.
`of FIG. 9A.
`According to another aspect, the semiconductor device
`FIG. 10 is a block diagram showing a schematic structure
`having a fuse layer in accordance with the present invention
`of a conventional DRAM having a fuse layer.
`includes a redundancy circuit, a fuse layer and an insulating
`FIG. 11 is a partial cross section showing a conventional
`layer. The redundancy circuit controls the fuse layer. The
`insulating layer is formed to cover the fuse layer, and it has 15 semiconductor device having a fuse layer.
`a thickness of at least about 1 pm, where the thickness of the
`FIG, 12 is a cross section showing the manner of fuse
`insulating layer is t, maximum bending stress of the insu-
`blowing in the conventional semicon~uctor device having a
`lating layer is a,,,,
`planar width of the fuse layer is W and
`fuse layer,
`a coeficient changing in accordance with the ratio between
`FIG. 13 is a cross section showing the conventional
`width
`the length and
`of the fuse layer is a' the 20 semiconductor device having a fuse layer after fuse blowing.
`pressure P corresponding to the burst pressure of the insu-
`iating layer is represented by the following equation.
`
`lo
`
`DESCRIPTION OF THE PREFERRED
`EMBODIMENTS
`
`p=-
`
`om,tZ
`6aW
`
`(1)
`
`25
`
`Embodiments of the present invention will be described
`with reference to FIGS. 1 to 9.
`The planar width W of the fuse layer with respect to the
`(First Embodiment)
`thickness t of the insulating layer is determined to satisfy the
`First, referring to FIGS. 1 and 2, the first embodiment of
`relation as represented by the equation (1).
`the present invention will be described. FIG. 1 is a partial
`As described above, according to this aspect, the value of 30
`section of the semiconductor device having a fuse
`pressure P corresponding to the burst pressure of the insu-
`layer in accordance with the first embodiment.
`lating layer is defined by using the thickness t of the
`Referring to FIG. 1, on a main surface of semiconductor
`insulating layer and the planar width W of the fuse layer.
`substrate 1, fuse layer 2 is formed with interlayer insulating
` hi^ relation can be calculated by assuming that the insu-
`lating layer on the fuse layer is a flat plate and by defining, 35 layer 3a interposed. The material for fuse layer 2 may be
`tungsten silicide or the like. Planar width of fuse layer 2 is
`in terms of mathematical expression, maximum bending
`represented by W.
`stress when uniformly distributed load is applied to the
`bottom surface of the flat plate. Therefore, when a pressure
`Insulating layer 3b of, for example, silicon oxide is
`higher than the above described value of the pressure P is
`formed to cover fuse layer 2. Insulating layer 3b may be
`applied to the insulating layer on the fuse layer, it is possible 40 formed of an insulating layer other than silicon oxide.
`to blow off the insulating layer. In other words, the value of
`However, in the following, it is assumed that insulating layer
`3b is formed of silicon oxide. Further, in the present
`minimum pressure P necessary for blowing the fuse can be
`obtained. This means that it is possible to appropriately
`invention, it is assumed that the thickness t of insulating
`layer 3b positioned on fuse layer 2 is relatively large, that is,
`adjust the energy of the laser with which the fuse layer is
`irradiated, in accordance with the value of pressure P. As a 45 at least about 1 pm.
`1, order to stably blow the fuse layer 2 without perform-
`result, the damage to the material under the fuse layer caused
`by laser irradiation can be mitigated.
`ing any process to reduce thickness of insulating layer 3b
`The foregoing and other objects, features, aspects and
`when insulating layer 3b has relatively large thickness t of
`advantages of the present invention will b e ~ o m e more
`about 1 pm or more, the inventors of the present invention
`apparent from the following detailed description of the
`took consideration of the following,
`present invention when taken in conjunction with the
`In order to blow the fuse layer 2, it is necessary to blow
`accompanying drawings.
`insulating layer 3b immediately on fuse layer 2 as shown in
`FIG. 13, which was referred to above. Therefore, the inven-
`BRIEF DESCRIPTION OF THE DRAWINGS
`55 tors paid attention to the pressure necessary for blowing the
`FIG. 1 is a partial cross section of a semiconductor device
`insulating layer 3b (hereinafter referred to as: burst
`having a fuse layer in accordance with a first embodiment of
`pressure), and tried to find the burst pressure,
`the present invention.
`Then, the inventors conceived the following model.
`is a graph showing
`between each of burst
`Namely, it is assumed that insulating layer 3b immediately
`layer, planar width
`pressure
`for the
`of the fuse 60 on fuse layer 2 is a flat plate, and that uniformly distributed
`layer and the thickness t of the insulating layer.
`load is applied to the bottom surface of the flat plate. Silicon
`FIG. 3 is a plan view showing a fuse layer in accordance
`oxide is selected as the material of the flat plate. When
`with the second embodiment of the present invention.
`maximum bending moment of the assumed flat plate, here-
`FIG. 4 is a cross section taken along the line IV-IV
`inafter referred to as virtual flat plate, is represented by M,,
`FIG. 3 .
`65 and maximum bending stress is represented by a,,,, maxi-
`mum bending stress can be represented by the following
`FIG. 5 is a cross section showing the semiconductor
`equation.
`device of FIG. 4 after the fuse layer is blown.
`
`of
`
`12
`
`

`
`TABLE 1
`
`Coefficient: a
`
`0.0513
`0.0665
`0.0757
`0.0817
`0.0829
`0.0833
`
`1V
`
`1.00
`1.25
`1.50
`1.75
`2.00
`rn
`
`From the equations (2) and (3), the value P will be
`
`p=-
`
`omaxtz
`6aW
`
`5,872,389
`
`(2)
`
`M,,,=CYPW~
`
`(3)
`
`In equation (2) above, t represents thickness of the virtual 5
`flat plate, that is, the thickness corresponding to the thick-
`ness of the insulating layer 3b on fuse layer 2. The maximum
`bending moment is represented by the following.
`
`6
`In order to confirm the above conclusion, the inventors
`performed an experiment within a certain range.
`Specifically, the thickness t of insulating layer 3b was set
`from about 1 pm to about 1.6pm, and planar width W of fuse
`layer 2 was set to be about 1.6 pm to about 2.2 pm. Fuse
`blowing was actually carried out and satisfactory results
`could be obtained. Then, the data obtained through experi-
`ment was compared with the graph shown in FIG. 2, and
`- A
`reliability of the graph shown in FIG. 2 was appreciated. As
`already described, thevalue t/Wshouldpreferably be at least
`In the equation (3) above, the reference character
`about 0.45 and at most about 0.91. However, from the data
`represents uniformly distributed load applied to the bottom
`of experiment, it is considered that stable fuse blowing is
`surface of the virtual flat plate, W represents planar width of
`possible provided that the value t/W is at most about 1.
`fuse layer 2 and a is a
` hi^ a is a
`which changes in accordance with the ratio 1/W of the 1s As described above, in the first embodiment of the present
`length 1 and planar width W of fuse layer 2 when Poisson's
`invention, stable fuse blowing is possible without perform-
`ratio is 0.3. Table 1 below shows the value of this coefficient.
`ing any process to reduce thickness of the insulating layer 3b
`positioned directly on the fuse layer 2. Therefore, as com-
`pared with the technique disclosed in U.S. Pat. No. 4,853,
`20 758, manufacturing cost can be reduced.
`(Second Embodiment)
`The second embodiment of the present invention will be
`described with reference to FIGS. 3 to 7. FIG. 3 is a partial
`25 plan view of the fuse layer in accordance with the second
`embodiment of the present invention. FIG. 4 is a cross
`of FIG. 3 .
`section taken along the line IV-IV
`Referring to FIGS. 3 and 4, in the second embodiment,
`fuse layer 2 has a first portion 2a having relatively large
`(1) 30 planar width W 1 and a second portion 2b having relatively
`small planar width W 2 . A pair of second portions 2b are
`provided on both sides of the first portion 2a.
`that the
`It can be seen from equation ('1
`is repre-
`In order to blow the fuse layer 2 having such a stmcture,
`sented by using the thickness t of insulating layer 3b and
`the fuse layer 2 is irradiated with laser such that the first
`planar width W of fuse layer 2. It may be considered that the 35
`portion 2a is positioned in a laser spot 5, as shown in FIG.
`value P corresponds to the burst pressure of insulating layer
`3.
`the first portion 2a and
`laser is
`3b when fuse layer 2 evaporates as it is irradiated with laser,
`the second portion 2b near the first portion 2a. At this time,
`As the relation between each of the value P, the thickness
`since the planar width W 1 of the first portion 2a is larger
`t of insulating layer 3b and the planar width W of fuse layer
`2 is represented by a mathematical expression, it becomes 40 than the planar width W 2 of the second portion 2b, the burst
`Pressure P of insulating layer 3b on the first portion 2a
`possible to calculate minimum value P necessary for blow-
`ing the fuse layer 2. Accordingly, the energy of laser used for
`becomes relatively small, because of the relation shown in
`irradiating fuse layer 2 can be set at a minimum value, and
`FIG. 2.
`hence damage to the underlying layer below fuse layer 2
`More specifically, if the burst pressure P for insulating
`caused by laser can be mitigated.
`45 layer 3b on the first portion 2a is set to be about 1000
`FIG. 2 shows the results obtained by the equation (1)
`kgicm2, a burst pressure larger than 1000 kgicm2 is neces-
`above.
`shows the
`wh$n the thickness !f
`sary to burst the insulating layer 3b on the second portion 2b.
`layer 3b is from about 6000 A to about 163500
`A,
`Therefore, it is possible to blow the first portion 2a. Actually,
`with the length
`fuse layer being pm. Referring
`in some cases the second portion 2b may be partially blown
`2, the larger the planar width
`fuse layer 2, the
`so near the first portion 2a, However, most of the second
`the value of the burst pressure P, and the smaller the
`portion 2b would remain.
`inclination of the curve representing the burst pressure P. It
`FIG. 5 is a cross section of the semiconductor device after
`is understood that the smaller the value of burst pressure p,
`the first portion 2a is blown. Referring to FIGS. 3 and 5,
`the easier becomes fuse blowing, and the smaller the incli-
`nation of burst pressure p, the more stable becomes fuse 55 since mainly the first portion 2a is blown as described above,
`it becomes possible to reduce the maximum diameter D of
`blowing.
`making
`the length
`the first
`More specifically, if the burst pressure P is at most about
`portion 2a.
`1000 kg/cm2, fuse blowing can be performed stably and
`The relation between the planar width W 1 and the planar
`easily. More preferably, the burst pressure P is at most about
`60 width W 2 will be more specifically described. Table 2 below
`500 kg/cm2.
`shows values of planar widths W 1 and W 2 and the value of
`Further, the inventors studied the relation between the
`maximum diameter D of the blown hole. The value shown
`thickness t of insulating layer 3b and the planar width W of
`in Table 2 are calculated from the data of the experiment
`fuse layer 2 which could suppress burst pressure P to at most
`actually performed by the inventors and the graph shown in
`about 1000 kg/cm2. As a result, the inventors reached a
`conclusion that the burst pressure P could be suppressed to 65 FIG. 2. As for the conditions, laser energy was 0.6 pJ, the
`length L of the first portion 2a was about 4 pm and the spot
`at most about 1000 kgicm2 allowing stable fuse blowing if
`the value t/w was at least about 0.45 and at most about 0.91.
`diameter of laser was about 6 pm.
`
`13
`
`

`
`5,872,389
`
`7
`
`TABLE 2
`
`Planar width: WI (urn)
`Planar width: W2 (urn)
`Maxirnurn diameter of
`t = 1.6 (urn)
`blown hole:
`(urn)
`(urn)
`=
`
`2
`0.5
`12
`11,4
`
`2
`1
`12
`11,6
`
`1.5
`12.5
`12
`
`2
`13.2
`12,3
`
`8
`Referring to FIG. 9A, in the fourth embodiment, a reflec-
`tive film 4 is formed selectively on the surface of fuse layer
`2. More specifically, in order that a portion of fuse layer 2
`is used as a high absorbing portion 2c, reflective films 4 of
`5 Al'
`are formed 'paced from each other, On both
`sides of the high absorbing portion 2c. The reflective film 4
`should preferably be a film having a reflectance of at least
`about 50% when irradiated with laser.
`As shown in
`above, it is understood that the
`Referring to FIG. 9B, the fuse layer 2 in accordance with
`of the planar width W2 the
`the
`the lo the fourth embodiment is provided by selectively forming
`maximum diameter D of the blown hole. Specially when the
`reflective film on a layer 2e which is formed of a material
`value W l W 2 is 2 or more, the value of the maximum
`having relatively large laser absorption coefficient. In other
`of the blown hole is significantly reduced,
`diameter
`in accordance with the
`W0rdS2 the base of the fuse layer
`Therefore, by appropriately selecting the values of planar
`fourth embodiment is formed by a layer 2e of a material
`widths W1 and W2 to have such a ratio, the value of the
`large laser
`maximum diameter D of the blown hole can be effectively 1s having
`Because of the structure described above, it becomes
`reduced.
`possible to selectively blow the high absorbing portion 2c,
`example of arrangement of the fuse layer in actor-
`based on the same principle as the third embodiment.
`dance with the present embodiment will be described in the
`Further, by setting the length L of high absorbing portion 2c
`following. FIG. 6 is a plan view showing an example of
`arrangement of the fuse layer in accordance with the second 20 small, it becomes possible to reduce the maximum diameter
`D of the blown hole, as in the third embodiment above.
`embodiment.
`Referring to FIG. 6, three fuse layers 2 are formed
`Though insulating layer 3b is formed of silicon oxide in
`approximately parallel to each other in the longitudinal
`the above described embodiments, the concept of the present
`direction. The fuse layers 2 are arranged such that the first
`invention can be applied even when the insulating layer 3b
`portions 2a and the second portions 2b are positioned 25 is formed of other
`such as silicon nitride,
`alternately in the width direction of the fuse layer 2.
`dthough the present invention has been described and
`in which fuse
`with an
`Therefore, as
`illustrated in detail, it is clearly understood that the same is
`layers have uniform planar width, the 'pace between fuse
`by way of illustration and example only and is not to be
`layers 2 can be narrowed.
`taken by way of limitation, the spirit and scope of the present
`Amodification of fuse layer 2 and an example of arrange-
`invention being limited only by the terms of the appended
`ment of the modification will be described. FIG. 7 is a plan 30
`view showing an arrangement of the modified fuse layers 2.
`As shown in FIG. 7, the first portion 2ar is provided
`protruding in the width direction from one side of fuse layer
`2. By the provision of such first portion 2ar, the space
`between fuse layers 2 can be made narrower than shown in 35
`FIG. 6.
`(Third Embodiment)
`The third embodiment of the present invention will be
`described with reference to FIG. 8. FIG. 8 is a plan view
`showing a fuse layer in accordance with the third embodi- 40
`ment of the present invention.
`Referring to FIG. 8, in the third embodiment, the fuse
`layer 2 has a high absorbing portion 2c and a low absorbing
`portion 2d. Apair of low absorbing portions 2d are provided
`layer, Omaz is maxi-
`is thickness
`said
`on both sides of a high absorbing portion 2c, High absorbing 45 where
`portion 2c is formed of a material having relatively large
`is planar
`mum bending stress
`layer,
`said
`laser absorption coefficient, such as tungsten silicide or
`width of said fuse layer and a is a coefficient changing in
`titanium silicide, Low absorbing portion 2d is formed of a
`accordance with ratio between said planar width W and
`length of said fuse layer2 and
`material having relatively small laser absorption coefficient,
`such as amorphous silicon or polycrystalline silicon.
`the planar width W of said fuse layer is determined with
`In order to blow the fuse layer 2 having the above
`respect to the thickness t of said insulating layer to
`described structure, fuse layer 2 is irradiated with laser such
`satisfy the relation defined by said equation (1).
`2. The semiconductor device having a fuse layer accord-
`that high absorbing portion 2c is positioned within the laser
`wherein
`spot. Consequently, laser is efficiently absorbed at high
`ing
`the thickness t of said insulating layer and the planar
`absorbing portion 2c, and high absorbing portion 2c evapo- ss
`width W of said fuse layer are determined so that the
`rates with priority. Therefore, the high absorbing portion 2c
`value of said pressure P is at most 1000 kgicm2.
`can be selectively blown.
`3 . The semiconductor device having a fuse layer accord-
`Similar to the second embodiment described above, in the
`ing to claim 1, wherein
`third embodiment, the length L of the high absorbing portion
`said fuse layer includes a first portion having a first planar
`2c can be made smaller in order to reduce the maximum 60
`width, and a pair of second portions having a second
`diameter D of the blown hole.
`planar width smaller than the first planar width pro-
`(Fourth Embodiment)
`vided on both sides of said first portion, and
`Referring to FIGS. 9A and 9B, the fourth embodiment
`will be described. FIG. 9Ais a plan view showing fuse layer
`thickness of said insulating layer and said first planar
`2 in accordance with the fourth embodiment of the present 65
`width are determined such that burst pressure for said
`invention. FIG. 9B is a cross section taken along the line
`insulating layer on said first portion is at most 1000
`IXb-IXb
`of FIG. 9A.
`kg/cm2.
`
`a redundancy circuit;
`a fuse layer controlling said redundancy circuit; and
`an insulating layer having a thickness of at least about 1
`pm formed to cover said fuse layer; wherein
`pressure P corresponding to burst pressure for said insu-
`lating layer is represented as
`
`What is 'laimed is:
`A
`
`device having a fuse layer, cOm~ris-
`
`p=-
`
`om,tZ
`6 a W
`
`(1)
`
`14
`
`

`
`10
`
`4. A semiconductor device having a fuse layer, compris-
`a redundancy circuit;
`ing:
`a fuse layer controlling said redundancy circuit;
`a redundancy circuit;
`an insulating layer having a thickness of at least about 1
`-
`a fuse layer controlling said redundancy circuit; and
`pm formed to cover said fuse layer; and
`an insulating layer having a thickness of at least about 1 ' a reflective film comprising spaced apart portions selec-
`pm formed to cover said fuse layer; wherein
`tively formed on the surface of said fuse layer; whereby
`value t/W is at least 0.45 and at most 0.91 where t is
`layers including said fuse layer and said reflective film
`have a high absorbing portion having relatively large
`thickness of said insulating layer and W is planar width
`laser absorption coefficient and a low absorbing portion
`of said fuse layer, wherein
`having relatively small said absorption coefficient,
`a reflective film comprising spaced apart portions having
`wherein
`a reflectance of at least about 50% when irradiated with
`value tlw is at least 0.45 and at most 0.91 where t is
`a laser is selectively formed on the surface of said fuse
`layer.
`thickness of said insulating layer and w is planar width
`of said fuse layer.
`5. A semiconductor device having a fuse layer, which IS
`8. A semiconductor device having a fuse layer, which
`semiconductor device comprises:
`semiconductor device comprises:
`a redundancy circuit;
`a redundancy circuit;
`a fuse layer controlling said redundancy circuit;
`a fuse layer controlling said redundancy circuit;
`an insulating layer covering said fuse layer; and
`an insulating layer covering said fuse layer; and
`a reflective film comprising spaced apart portions having
`a reflective film comprising spaced apart portions selec-
`a reflectance of at least about 50% when irradiated with
`tively formed on the surface of said fuse layer; whereby
`a laser selectively formed on the surface of said fuse
`layers including said fuse layer and said reflective film
`layer.
`6. The semiconductor device according to claim 5, 25
`have a high absorbing portion having relatively large
`laser absorption coefficient and a low absorbing portion
`wherein said insulating layer has a thickness of at least about
`having relatively small said absorption coefficient.
`1 pm.
`7. A semiconductor device having a fuse layer, compris-
`ing:
`
`20
`
`15