Zz'iLabS Ina, Ltd v. Samsung Electronics Co. Ltd. 81‘ (1!; Case No. 2: 14-cv-00203-JRG-RSP
`
`-'
`T Disputed Tenn
`’
`'
`“memory management logic/unit”
`
`-' "
`
`constructions-f3 ';?_-fi'-;I.
`'
`‘
`.
`=
`'5‘")?
`“a hardware device or circuit that manages
`virtual memory and paging”
`
`..
`
`‘615 Patent: 3, 5, 6, 8;
`‘425 Patent: 6, 7, 10, 11
`
`“Virtualiz[es/ing]”
`
`‘615 Patent: 3;
`‘425 Patent: 6, 10, 11;
`
`‘615 Patent: 1
`
`“translat[es/ing] a larger logical address space
`onto a smaller physical address space and
`enahI[es/ing] the capability of swapping and
`paging”
`
`
`
`“texture memory management function”
`
`“functions related to virtual memory
`management and cache management” _
`
`
`
`‘061 Patent: 1, 2
`“manages page faulting of texture data”
`
`‘425 Patent: 1, 2
`
`“performs page faulting of said texture
`data”
`
`‘425 Patent: 6, 10, 11
`
`“dedicated graphics memory”
`
`‘615 Patent: 3 ;
`‘425 Patent: 2, 4’, 6, 10, 11
`
`“specialized graphics‘memory”
`
`‘615 Patent: 1
`
`“fetches a page of texture data and updates a
`page table when the page of texture data is in the
`second level of memory (the host’s physical
`memory)”
`
`Expressly reject the argument that a “TLB
`miss,” b itself, is a “ n_ae fault.”
`“fetches a page of texture data and updates a
`page table When the page of texture data is in the
`second level of memory (the host’s physical
`memory)”
`
`Expressly reject the argument that a “TLB
`miss,” b itself, is a,“
`“memory used primarily by a graphics processor
`for storing data associated with graphics
`processing”
`
`Expressly reject the argument that the memory
`can be on-chi memory.
`“memory used primarily by a graphics processor
`for storing data associated with graphics
`processing”
`
`Expressly reject the argument that the memory
`can be on—chip memory.
`
`
`
`Petitioner Apple Inc. - Exhibit 1016, p. 1
`
`
`
`-'
`T Disputed Tenn
`’
`'
`“memory management logic/unit”
`
`-' "
`
`constructions-f3 ';?_-fi'-;I.
`'
`‘
`.
`=
`'5‘")?
`“a hardware device or circuit that manages
`virtual memory and paging”
`
`..
`
`‘615 Patent: 3, 5, 6, 8;
`‘425 Patent: 6, 7, 10, 11
`
`“Virtualiz[es/ing]”
`
`‘615 Patent: 3;
`‘425 Patent: 6, 10, 11;
`
`‘615 Patent: 1
`
`“translat[es/ing] a larger logical address space
`onto a smaller physical address space and
`enahI[es/ing] the capability of swapping and
`paging”
`
`
`
`“texture memory management function”
`
`“functions related to virtual memory
`management and cache management” _
`
`
`
`‘061 Patent: 1, 2
`“manages page faulting of texture data”
`
`‘425 Patent: 1, 2
`
`“performs page faulting of said texture
`data”
`
`‘425 Patent: 6, 10, 11
`
`“dedicated graphics memory”
`
`‘615 Patent: 3 ;
`‘425 Patent: 2, 4’, 6, 10, 11
`
`“specialized graphics‘memory”
`
`‘615 Patent: 1
`
`“fetches a page of texture data and updates a
`page table when the page of texture data is in the
`second level of memory (the host’s physical
`memory)”
`
`Expressly reject the argument that a “TLB
`miss,” b itself, is a “ n_ae fault.”
`“fetches a page of texture data and updates a
`page table When the page of texture data is in the
`second level of memory (the host’s physical
`memory)”
`
`Expressly reject the argument that a “TLB
`miss,” b itself, is a,“
`“memory used primarily by a graphics processor
`for storing data associated with graphics
`processing”
`
`Expressly reject the argument that the memory
`can be on-chi memory.
`“memory used primarily by a graphics processor
`for storing data associated with graphics
`processing”
`
`Expressly reject the argument that the memory
`can be on—chip memory.
`
`
`
`Petitioner Apple Inc. - Exhibit 1016, p. 1
`
`
`
`ZiiLabs Ina, Ltd v. Samsung Electronics Co. Ltd. at a]; Case No. 2:14-ev-00203—JRG-RSP
`
`
`
` “normal texture memory”
`
`
`‘061 Patent: 1;
`
`‘425 Patent: 11
`
`
`“graphics processing chip”
`
`
`“memory used primarily by a graphics processor
`for storing data associated with graphics
`'
`processing”
`
`
`Expressly reject the argument that the memory
`can be on—chin memo
`.
`“an integrated circuit used to offload rendering
`and texture memory management'duties from
`the central Mroeessin unit”
`“without involvement of [the host processor/said
`
`‘061 Patent: 1
`“invisibly to [the host processor/said
`CPU]”
`
`CPU]”
`
`‘425 Patent: 1, 2;
`
`‘425 Patent: 6, 10,11
`“is logically asynchronous”
`
`“has a different rate of instruction processing”
`
`
`‘156 Patent: 1, 6,11,16
`“asynchronous operations thereof”
`
`
`
`“a different rate of instruction processing”
`
`
`‘ 156 Patent: 11
`“operating With a different rate of instruction
`“operating asynchronously to”
`processing”
`
`“alloWs a different rate of instruction
`
`‘156 Patent: 6
`
`“decouples operations”
`
`‘156 Patent: 1, 6
`“automatically transferring processing”
`
`‘ 156 Patent: 6
`“automatically transfers processing”
`
`‘156 Patent: 11
`
`“sequencer”
`
`‘156 Patent: 1, 6,11,16
`“graphics processor”
`
`‘383 Patent: 1—4, 69
`“graphics computational units”
`
`‘383 Patent: lw-7, 10—15, 18—23
`
`processing”
`
`“transferring processing based on the sequencer
`detecting a stall”
`
`“transfers processing based on the sequencer
`detecting a stall”
`
`“unit that performs flow control operations”
`
`“a processor that executes commands to create a
`display image”
`
`“computational units within a single graphics
`processor”
`
`
`
`
`
`
`Petitioner Apple Inc. - Exhibit 1016, p. 2
`
`
`
`ZiiLabs Inc, Ltd v. Samsung Electronics Co. Ltd. at al; Case No. 2:14ncv—00203-IRG-RSP
`
`
`
`
`
`
`“task allocation units programmed to
`“units programmed to avoid allocating tasks to
`bypass defective ones of said units”
`defective graphics computational units”
`
`
`‘383 Patent: 1
`Expressly reject Defendants’ software
`
`re- uirement
`
` “when interrupted”
`
`
`“when suspended”
`
`‘63? Patent: 1
`
`
`“interrupting processing by the graphics
`“suspending processing of 3D graphics request
`code”
`engine of the 3D graphics request code”
`
`
`
`
`
`“when the processing of 3D graphics
`“when the processing of 3D graphics request
`request code is interrupted”
`code is suspended”
`
`
`
`
`in the frame buffer” Governed by § 112 16!
`
`“means for storing the associated image
`
`
`Function: “storing the associated image in the
`
` ‘637 Patent: 6
`frame buffer”
`
`
`Structure: “a wide, high-speed bus, one or more
`resolvers, and framer buffer, and equivalents
`
`
`thereoi”
`'
` “3D graphics request code”
`
`
`“a request to perform a 3D graphics operation”
`
`‘637 Patent: 1, 3
`
`“graphics engine controller”
`Plain and ordinary meaning
`
`
`
`
`
`Expressiy reject Defendants’ requirement that
`the controller is located within the graphics
`
`engine.
`
`
`
`“span break”
`
`
`
`
`“mode for processing two-dimensional graphics”
`“2D mode”
`
`
`‘096 Patent: 5
`
`
`
`“character data”
`“data representing an individual letter, digit,
`punctuation mark, or symbol”
`
`
`‘096 Patent: 2, 5
`
`“said pixels of each said word being
`“texture pixels in a word whereby the texture
`
`grouped in said stored texture in a pattern
`pixels form a set that is more than one pixel wide
`
`
`which is more than one pixel wide and
`and more than one pixel high”
`
`
`more than one pixel high”
`
`
`“an interruptible point in a scan line and
`indicated by a span boundary”
`
`‘637 Patent: 1
`
`“637 Patent: 1
`
`‘637 Patent: 1, 2, 5
`
`‘637 Patent: 5
`
`
`
`Petitioner Apple Inc. - Exhibit 1016, p. 3
`
`
`
`ZiiLabs Ina, Ltd v. Samsung Electronics Co. Ltd. et al; Case No. 2: 14~cv—00203-JRG—RSP
`
`
`“said pixels ofeach said word being
`grouped in said stored texture in a pattern
`which extends over more than one pixel
`in multiple orthogOnal directions”
`
`“texture pixels in a word whereby the texture
`pixels form a set that is more than one pixel wide
`and more than one pixel high”
`
`
`
`
`
`
` ‘584 Patent: 4 '
`
`
`
`
`
`Petitioner Apple Inc. - Exhibit 1016, p. 4
`
`
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