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`Capella 2015
`Cisco v. Capella
`IPR2014-00894
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`Attorney Docket No. 3822.06-PV2
`Movaz Ref.: 200002
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`Provisional Patent Application
`Attorney Docket No.: 3822.06-PV2
`Movaz Docket No.: 2000-02
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`Title: High Frequency Pulse Width Modulation Driver, Particularly Useful for
`Actuating MEMS Array, ver. 2
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`Inventors:
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`Steven L. GARVERICK
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`Michael L. NAGY
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`Technical Description
`Several technologies have been proposed as a means to accomplish
`Wavelength Cross Connect (WXC) switching. Bubbles, crystals, fabrics, and
`micro electromechanical systems (MEMS). MEMS has several advantages.
`One configuration for the MEMS array is described in US Provisional Application
`60/234,683, filed 22 September 2000, incorporated herein by reference in its
`entirety. A slightly earlier version is described in US Provisionat Application __
`with title “High Frequency pulse Width Modulation Driver, Particularly Useful for
`Actuating MEMS Array,” filed 26 January 2001.
`The size and number of micro-mirrors in the MEMS array is determined by
`a number of optical parameters, as well as the tradeoff between chip size and
`manufacturing yield. An array size of 12 X 80 mirrors appears to be optimal for
`early implementation. Although micromirrors are the described embodiment, it is
`understood that the invention is applicable to driving a wider class of actuators
`Once an approximate actuator array size is determined, several
`actuation methods for MEMS, all well known to those skilled in the art, are
`available. Thermal actuators rely on the thermal expansion of materials when
`(relatively) large amounts of current are run through them. Although capable of
`fairly large forces, this actuation method is sensitive to changes in ambient
`temperature, consumes a great deal of electrical power when the entire array is
`considered, and suffers from aging, wear, and nonlinearity effects.
`It is also slow
`to respond. Electromagnetic actuators establish a magnetic field across the
`array and then run controlled amounts of current through each actuator.
`Although capable of bi—directional actuation and relatively precise, these
`actuators tend to be difficult to fabricate, require large size to accommodate large
`planar coils, and can dissipate large amounts of power — possibly creating
`enough heat to damage the system. Additionally, high field magnets are subject
`to aging and temperature effects. Piezoelectric actuators comprise structures
`made of a deposited piezoelectric thick- or thin—fi|m, typically PZT. This
`technology is difficult to fabricate, is not suitable for large displacements, and
`generally cannot accommodate the kinds of small feature sizes required for
`extremely tight pitch. The actuation technology of choice for an array of the
`required dimension is electrostatic.
`Imposing a voltage across two nodes creates
`an attractive, electrostatic force between them. Of all the options, electrostatic
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`Attorney Docket No. 3822.06-PV2
`Movaz Ref.: 2000-02
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`actuation features the lowest power consumption and hence the best thermal
`environment, does not require an external magnetic field, accommodates small
`device sizes, performs well over temperature and time, and has a high switching
`speed.
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`An example of a cell of an electrostatically controlled MEMS array is
`illustrated in the plan view of Figure 1.
`it includes a gimbal structure of an outer
`frame 10 twistably supported in the support structure 12 of the MEMS array
`through a first pair of torsion bars 14 extending along and twisting about a minor
`axis and a mirror plate 16 having a reflective surface twistably supported by the
`outer frame 10 through a second pair of torsion bars 18 arranged along a major
`axis perpendicular to the minor axis and twisting thereabout.
`In the favored
`MEMS fabrication technique, the illustrated structure is integrally formed in an
`epitaxial (epi) layer of crystalline silicon. The process has been disclosed in US
`Provisional Application, Serial No. 60/260,749, filed 10 January 2001,
`incorporated herein by reference in its entirety. The structure is controllably tilted
`in two dimensions by a pair of electrodes 20 under the mirror plate 16 and
`another pair of electrodes 22 under the frame. Air gaps 24, 26 are formed
`respectively between the frame 10 and the support structure 12 and between the
`mirror plate 16 and the frame 10 and oveny a cavity formed beneath the frame
`10 and mirror plate 16 so that they can rotate. The support structure 12, the
`frame 10, and the mirror plate 16 are held at a common node voltage and the
`frame 10 and mirror plate 16 form one set of plates for variable gap capacitors.
`The electrodes 18, 20 are at the bottom of the cavity so the cavity forms the gap
`of the two capacitors between the electrodes 18, 20 and the frame 10 and mirror
`plate 16.
`One drawback of electrostatic actuation is a phenomenon known as ‘snap
`down’. Because electrostatic force is inversely proportional to the distance
`between the electrodes, there comes a point at which the attractive force
`increases very rapidly with greater electrode proximity. Beyond this point, a
`small decrease in distance leads to an enormous increase in force, until the
`electronic control system cannot respond fast enough and the electrodes ‘snap’
`together. With an architecture such as ours, where the electrodes comprise a flat
`plate suspended over a cavity by small tethers, a rule of thumb states that the
`plate will begin to ‘snap down’ at a deflection corresponding to approximately four
`ninths the depth of the cavity. Hence, in order to achieve a deflection of x, the
`cavity must be approximately 2.25x deep. Optical constraints define the
`deflection distance requirement for the electrostatic micromirrorn actuator. The
`rms voltage level required to generate a given amount of deflection results from a
`combination of mirror size, tether spring constant, and cavity depth. The cavity
`depth required to avoid snapdown generally dictates high voltages, typically in
`excess of 40V, which is the upper limit for many standard IC processes. The
`generation of voltages in the 50V, 100V, 200V, and higher ranges requires an
`electronics system comprised of High Voltage (HV) semiconductor components,
`either off—the—shelf or customized, which are fabricated by specialized HV
`processes.
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`Attorney Docket No. 3822.06-PV2
`Movaz Ref.: 2000-02
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`The optical requirements on the system not only dictate a 12 x 80 array of
`minors, but they also require tilt in both directions along two axes. The ‘see-saw’
`MEMS architecture accomplishes tilt by placing two electrodes symmetrically
`about the central tether for each axis. Hence there are four electrodes per
`actuator, giving a total of 3840 independently controlled electrodes for the entire
`array. An optical technique called ‘interleaving’ allows us to split the array into
`two 12 x 40 chips, but even with this amelioration the i/o count at the MEMS chip
`is 1920 High Voltage inputs. While i/o counts of several thousand are
`commonplace in certain low voltage digital technologies such as memories, in
`our situation the inputs are analog and High Voltage. High analog i/o count
`brings about two packaging penalties:
`(1) interfacing the MEMS chip to the
`drivers, and (2) housing the drivers.
`Conventional methods for silicon chip i/o include wire bonding and die—to-
`substrate attachment known as ‘flip-chip‘. People skilled in the art know that wire
`bonding becomes impractical at about 800 i!o’s, due to the large chip perimeter
`required to contain the bond pads.
`lC’s with higher iio counts are typically
`attached to a substrate with solder bumping, a well known technology. However,
`in our case the substrate in question must ultimately route the MEMS chip's
`signals to 3840 independent High Voltage drivers. An array such as this built out
`of discrete components would require a large number of electronics cards, plus
`cabling, that would increase the total system size significantly. A far better
`solution is to put the HV drivers on an Application Specific Integrated Circuit
`(ASlC), and connect this ASIC to the MEMS chip by chip-on-chip solder
`bumping, frit bonding, or similar means. Besides containing the high voltage
`drivers, the ASIC can now demultipiex drive signals from the larger system. We
`are left with a Dual Chip Stack, with the High Voltage ASIC below the MEMS
`chip, leaving the upper (mirrored) surface of the MEMS chip exposed. The
`chips are precision aligned such that each MEMS actuator is positioned over its
`dedicated electrodes, which are fabricated in an upper metal layer of the ASIC.
`The single electrical connection to the MEMS actuators Common Node can be
`accomplished by eutectic bonding, polymer bonding, or wirebond(s) from the top
`side. The HV ASIC receives drive command signals from the outside world via a
`small number of wirebond pads on its periphery (typically several dozen), which
`are wirebonded to a standard patterned substrate carrier (ceramic or plastic
`carriers are typical). The HV ASlC‘s on—chip electronics multiplex the
`wirebonded command signals, convert them to high voltage, and send them
`through the bondpads to the MEMS chip. Perhaps an even more significant
`advantage of this arrangement is that the unwanted capacitance of a typical
`solder bu mp to ground (called “parasitic capacitance") is far lower than the
`parasitic capacitance associated with a wirebond plus long PWB track, allowing
`for smaller driver transistors and lower thermal dissipation.
`Figure 2 is a cross sectional sketch of one cell of the MEMS device showing the
`mirror plate 16 with a cavity 28 between it and the minor plate electrodes 20. The flame
`is not shown. . The relative dimensions are not to scale. The device has a large lower
`"substrate" region 30 and a thin upper "MEMS" region 32, separated by a thin insulating
`oxide layer 34. The tilting actuators are etched into the upper region, each actuator
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`Attorney Docket No. 3822.06-PV2
`Movaz Ref.: 2000-02
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`suspended over the cavity 28 by several tethers. The electrodes are patterened onto the
`substrate, which can be an ASIC, a ceramic, or a PWB.
`. All the actuators in the upper
`region form a single electrical node, called the "Common Node". Each actuator is
`suspended above four electrodes, each electrode being isolated from every other
`electrode. To cause the actuator to tilt in a given direction, we produce an electrostatic
`force between the actuator and one or more of its electrodes by imposing a potential
`difference between the Common node and the desired electrode. Note that each actuator
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`has two pairs of complementary electrodes - one causing tilt along the "Major Axis" and
`the other causing tilt along the "Minor Axis". Fabrication details are supplied in the
`aforementioned Provisional Application 60l260,749.
`This design includes an array of electrostatic microactuators that require high
`voltage drive, on the order of 100V - 300V rms. Each actuator has two perpendicular
`axes of tilt, called the Major Axis and the Minor Axis, shown in Figure 1. Each axis has
`a pair of electrodes. When a high voltage is applied to an electrode (with respect to the
`actuator node), the attractive force will cause the actuator to tilt in the desired direction.
`We wish to drive an array of 12 x 80 actuators, ultimately scaling to 24 x 80 actuators.
`To ease packaging constraints, minimize parasitic capacitances, and provide for a
`small system volume, we have adopted a chip-on-chip architecture, where the micro
`electro-mechanical system (MEMS) actuator array is bonded directly to our High Voltage
`(HV) application specific integrated circuit (ASIC). This bonding can be accomplished
`with flit bonding, eutectic bonding, soldering, polymer bonding, or other means known to
`those skilled in the art. This implies an ASIC that not only drives each actuator
`independently, but can also demultiplex those drive signals on-chip, thus minimizing ifo
`count for the system.
`Several factors constrain the HV ASIC design:
`1. Experiments have shown that imposing pure dc voltage across the MEMS
`actuator over long periods of time causes a residual static charge buildup, sufficient to
`inhibit future movement of the actuator. Therefore, any should be a bipolar ac signal,
`symmetric about ground potential, which still maintains the required 200Vrms potential
`difference across the actuator.
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`2. The drive signal‘s frequency must not be near the mechanical resonance
`frequency of the MEMS structure (currently estimated to be about 5 kHz}.
`3. The resolution of the control voltage must be - very precise, ideally better than
`0.1% of fiJ.ll scale tilt for desired angles.
`4. Total area of each driver cell in the array must be minimal. Typical value of
`area available for each cell is roughly 450 X 600 micron.
`5. High voltage devices with large die area, such as high voltage capacitors and
`high voltage field-effect transistors (FETS), should be avoided (due to constraint #4). HV
`FETS with high current output tend to be very large.
`The decision to go to a HV ASIC limits us to ASIC technologies that are
`capable of packing High Voltage CMOS into a very tight array area. The need to
`minimize physical size of drive transistors and on—chip multiplexing circuitry will
`inform all subsequent design.
`With the MEMS I HV ASIC Dual Chip Stack architecture defined, we now
`have a choice in the type of drive voltage used to tilt the Electrostatic MEMS
`actuators. Candidates include: (1) dc voltage, (2) single-ended ac voltage (i.e.
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`Attorney Docket No. 3822.06-PV2
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`voltage that alternates between ground and some High Voltage level +Vm), and
`(3) bipolar ac voltage (i.e. voltage that alternates between +Vm and —Vm).
`Internal experiments have shown, and MEMS Electrostatic Actuator literature
`suggests, that dc drive causes electrostatic charging of the MEMS electrodes,
`which over time causes force between electrodes to persist even after the
`externally imposed dc voltage has been removed. While the origins of this
`phenomenon are not well understood, it has been observed and well
`documented. A simple dc drive signal is thus not desired. Single-ended ac drive
`contains a significant dc component, and suffers from the same problem. Only a
`bipolar ac drive signal with zero mean voitage adequately eliminates force due to
`charge buildup. A square wave allows the simplest High Voltage circuitry to be
`employed, and delivers higher rms voltage than other waveforms, such as
`sinusoid. Since the electrostatic force is always attractive, both the V,.,, and —V,,..
`portions of the voltage period cause mechanical force in the same direction.
`Bipolar ac drive requires careful selection of a drive frequency. The
`MEMS mirroractuator has a mechanical resonance frequency, typically on the
`order of 5 kHz, which must not be excited for fear of vibrating the mirror
`excessively and degrading optical signal. Unwanted mechanical vibration due to
`the electronic signal is referred to as "mechanical ripple". We therefore must
`choose between a drive frequency that is much lower (about 0.1x) or much
`higher (about 10x) than the frequency of the mechanical resonance. Low
`frequency avails US of lower power, but there is a penalty associated with the
`zero crossings. Any real square wave has finite rise and fall times, and during
`these times, the force on the actuator will briefly dip to zero before recovering.
`riseffall times are too long, this clip will degrade the optical signal unacceptably.
`Reducing rise/fall time requires implementing drive transistors that can output
`high currents, and these tend to be large in area. Our choice to implement a
`chip—on—chip architecture with tight mirror pitch match thus favors the high
`frequency solution. Drive frequency is typically on the order of 50 kHz, about 10x
`that of the mechanical resonance. This frequency range is within the capability
`of HV CMOS technology using relatively small transistors. With the fundamentai
`driving frequency much higher than the mechanical resonance, longer rise/fall
`times become inconsequential.
`Electrostatic MEMS mirror arrays used as video display drivers operate at
`two voltage levels: zero and full snapdown. Our actuators, however, must tilt
`over a continuous range or over a set greater than 2 of ranges or angles. Now
`that we have established a voltage consisting of a high frequency square wave,
`we must decide on a means by which to adjust the rms voltage (and hence the
`actuator force). Two we|l—known modulation schemes are amplitude modulation
`(AM) and Pulse Width Modulation (PWM). AM circuitry is far more complicated,
`requiring a noise sensitive analog HVCMOS process, large hold capacitors, and
`power consuming op amps. The PWM scheme allows all digital circuitry, no
`capacitors, and is thus generally smaller and more amenable to available
`HVCMOS processes.
`To implement our electrostatic PWM drive signal and still satisfy our
`requirement for bipolar drive, one could ground one actuator electrode and
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`stimulate the other with a bipolar square wave that switches between Vm, ground,
`and — Vm. This simple scheme has two key drawbacks: (1) high peak—to—peak
`voltage, and; (2) a requirement for three-level switching. Actuator force depends
`on rrns voltage, so to obtain a given rms voltage V_m, we need a square wave
`amplitude of 2Vm peak—to—peak. Higher voltage means increasingly specialized
`HV CMOS processing and larger area devices. As for three—leve| switching,
`digital circuits can be designed which accomplish it, but the technology is
`generally much better suited to two-level switching (Vm and ground). We
`overcome single-sided drive’s shortcomings with an innovative “doub|e—sided
`drive". We drive one electrode of the actuator pair with a square wave, and drive
`the other with a phase-shifted (time delayed) version of the same square wave.
`The voltage seen across the electrodes is the difference between the square
`wave and its phase shifted counterpart.
`If each of the two waves is single-sided
`(varies between Vm and ground), their difference is a wave that varies between
`Vm, ground, and -\/m. Thus we achieve an rms voltage of V," and preserve
`bipoiarity, using a power supply ofjust Vm and binary switching.
`In the
`present MEMS design, all actuator electrode pairs in the array share a common
`node, and this allows us to drive that node with a single off-chip driver, further
`reducing ASIC die area and giving us a stable reference square wave from which
`to introduce phase shifts that correspond to desired tilt angle. Finally, the mean
`square voltage of a PWM wave varies linearly of the pulse width, as does
`actuation force. Thus we now have a straightforward relationship between pulse
`width to actuation force, making our drive somewhat more linear and possibly
`easier to control.
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`Having estabiished double-sided drive, we turn to the circuit itself, which
`must adjust pulse width for each electrode individually. An obvious means by
`which to accomplish this is to dedicate a high speed counter to each HV driver
`cell to set pulse width. Even if this counter is implemented using low voltage
`circuitry (with the final PWM wave level shifted to a simple HV driver), the
`transistor count and hence die area is large, there are many high frequency
`nodes leading to potential timing issues, and the resolution of the pulse width is
`constrained to be linear across the entire PWM period. A better solution is to
`implement the low voltage section of the ASIC as a sort of SRAM, with each cell
`containing a register that stores the value of the pulse width. A single high speed
`system clock, scrolling continuously, addresses all the registers simultaneously.
`When the clock reaches the value stored in a given register, it trips the signal to
`the high voltage node (via a level shifter) and switches the pulse. Such a
`memory operates as a Content Addressable Memory (CAM), a niche technology
`that has generally seen little application. Besides the area savings and reduced
`number of high frequency nodes, this arrangement frees the system designer
`from the need to separate pulse widths into equal increments across the entire
`period. Now bits of resolution can be distributed arbitrarily, giving the
`rnirroractuator more resolution in critical regions of its tilt angie, and less
`resolution at unused angles.
`Figure 3 depicts the electrical equivalent of a pair of electrode sets (each MEMS
`actuator has 4 electrode sets), which is simply a pair of variable-gap capacitors 40, 42
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`associated alternatively with the frame or with the mirror plate. It also illustrates at the
`top right the driving waveforms 44, 46 and the common mode voltage signal 48 applied
`to the electronics, and, at the bottom right the resultant voltages vml and vm2 across the
`two capacitors 40, 42. A drive signal 44 with phase shift 1, and its complement signal 46
`relative to the common mode signal 48. In the case illustrated, signal 44 results in a
`larger phase shift than signal 46, and so electrode vml provides greater attractive force
`than its counterpart electrode vm2. The period T is the inverse of the 50kI-lz drive
`frequency. In general, if vml has a duty factor ca between 0 and 1, m2 will have a duty
`factor of of (1-00.
`A proposed implementation of our overall system architecture is shown in the
`block diagram of Figure 4. This multichip system comprises the MEMS Actuator Array
`chip 50, the High Voltage ASIC 52, a microcontroller 54, and other electronics. A single
`high power, high voltage driver 56 drives the MEMS actuator array's Common Node.
`The HV ASIC drives the 1920 individual electrodes on its upper metal layer with phase
`shifted versions of the common node Sigria1_ {AS the actuators tilt, individual light beams
`are reflected off of each actuator, coupling the light path from an input to an output fiber.
`A respective photodetector 58 measures the light intensity on each output fiber 60.
`External electronics 62 digitize this information and feed it back to the microcontroller
`54. The microcontroller uses this information to generate a dataword which will allow
`the HVASIC to tilt the selected actuator to the desired angle.
`Each electrode pair or set in the array is accessed sequentially in order to
`update the deflection angle on each actuator's major and minor axes. The rnicrocontroller
`takes a power reading, looks for a command from the external system 66 for a coarse
`change, and determines the correct pulse width constant for the electrode pair. This pulse
`width constant is the ‘data' word that the microcontroller outputs to the I-IVASIC. The
`other output is the 'address' word, which specifies the row, column, and electrode pair
`currently being accessed. Note that all electrodes are being stimulated all the time by
`synchronous 50 kHz square waves, each electrode with aphase shift proportional to the
`last ‘data’ word that was written to it. The purpose of accessing each electrode pair is
`simply to update the pulse width constant.
`Figure 4 further depicts the general hardware implementation of an optical cross
`connect (OXC) system with optical power feedback. This is but one embodiment of any
`general MEMS microactuation system with feedback, and is used to illustrate the general
`concept. At the right of the figure, light enters the OXC box through fibers 68 in a one-
`or two-dimensional ‘input’ bundle. The light beam, which may or may not be diffracted
`into its component frequencies, is reflected oil" of a series of mirrors including the MEMS
`array 50 and out through the desired fiber 68 in the ‘output’ bundle. Note that although
`only one light beam is shown in the figure, in the actual system a plurality of light beams,
`each from a different fiber or of a different frequency component from a fiber or fiber
`array, will be reflected from separate mirrors. Also, although the figure only shows one
`MEMS mirror array element being illuminated, in the actual system the light beams can
`be reflected from a plurality of fixed and/or movable mirrors, and/or through a system of
`one or more lenses. In some embodiments of the system, there can even be multiple
`MEMS arrays from which the light is reflected.
`As the light beam exits through the desired output (or ‘drop') fiber 60, an
`optical splitter associated with the respective output fiber 60 splits the light beam,
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`with the main signal going out of the OXC to the network over the output fiber,
`and the diverted portion of the signal going to the photodetector 58. The physical
`location of the split can be inside the OXC box, outside the box, at the fiber, or in
`free space outside the fiber.
`In an actual system, there will typically be an array
`of photodetectors, multiplexed to detect optical power on all output fibers and
`wavelengths. The photodetector converts the diverted portion of the signal into a
`proportional voltage or current, which is then converted to digital (optical power
`data) and fed to the microcontroller 54. The microcontroller can then feed the
`optical power data on each fiber to an external control system, process the data
`by itself, or do both. Based on this output power data, the microcontroller can
`change the tilt angle on the micromirrors on the MEMS array 50.
`Each mirror of the MEMS array has two functions, coarse angular
`alignment for switching and fine angular alignment for coupled-signal power
`adjustment. Fine adjustment of the output coupled power allows, variously, for
`maximization of the transmitted signal (precision alignment), across-WDM
`spectrum power equalization (a desired WDM spectrum property) or non—equal
`programmed control of WDM output power spectrum for special purposes such
`as amplifier gain nonuniformity compensation or for precompensation of
`anticipated system loss nonuniformity.
`We envision a coarse pointing control loop in which each mirror is
`calibrated during power-up, and periodically during down times in the
`communication system and the coarse pointing constants stored in an EEPROM
`66. Calibration could be a simple scan in which the rms voltage is varied lineariy
`across the nominal range while the output from the photodetector is examined to
`identify the peak. Due to finite response time of the microactuator, there will be a
`time lag between rms voltage and micromirror position equal to 1/(a3o*Q), where
`(no is the resonant frequency and Q is the quality factor. This time lag must be
`considered when determining the rms voltage for maximum beam power.
`Each time that major axis calibration is performed, the optimum rms
`voltages for each actuator, for each wavelength, for each routing position, that is
`stored in the calibration EEPROMIRAM 66, should be updated. When a new
`routing position is commanded, these calibration settings can be accessed and
`used to quickly move mirrors to the new routing position.
`One embodiment of Figure 4 is that the fine-alignment control can be used
`to maximize the coupled power of the output beam of a desired fiber, which may
`be considered a fine adjustment. This can be accomplished by using the
`feedback loop to adjust the mirror’s fine position to place the output beam in a
`condition of perfect alignment with the center of the output fiber, thereby
`maximizing the amount power (percentage of light) entering the output fiber. The
`rms voltage driving the minor axis will be periodically updated to maintain a given
`power level on the output beam.
`in principle, the fine adjustment control loop is
`independent of the coarse adjustment control loop, i.e. a change in routing
`position does not necessarily dictate an adjustment to fine-tuning circuitry.
`Another embodiment of Figure 4 is that the fine adjustment can be used to
`equalize the power of an output beam of a desired fiber relative to the other
`output beams in the ‘output’ bundle. This can be accomplished by using the
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`feedback loop to adjust the mirror's fine position to place the output beam in a
`condition of misalignment with the center of the output fiber, thereby decreasing
`the amount of power (percentage of light) entering the output fiber or by using the
`feedback loop to adjust the actuator's fine tuning to place the output beam in a
`condition of alignment with the center of the output fiber, thereby increasing the
`amount power (percentage of light) entering the output fiber. The rms voltage
`driving the fine adjustment will be periodically updated to maintain a given power
`level on the output beam.
`Note that alignment and misalignment to affect power adjustments can be
`accomplished using other components including but not limited to a lens, mirror.
`concentrator or grating.
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`Figure 5 is a block diagram depiction of one cell of a typical HV Driver circuit.
`Although there are several circuit architectures that can produce the waveforms required
`for this invention, the one depicted in Figure 5 is the preferred mode for implementation
`as a mixed High Voltage I Low Voltage ASIC, providing the tight pitch match required
`for many l\/[EMS actuator arrays. A cell such as this one is dedicated to each actuator
`electrode pair, and an array of such cells comprises the entire driver circuit. Circuitry in
`the upper half of the diagram is implemented in a low voltage technology, preferably
`CMOS. Circuitry depicted in the lower half is implmented in a High Voltage process,
`preferably HV CMOS. The Low Voltage section is a register containing n Content
`Addressable Memory (CAM) cells and a single Random Access Memory (RAM) cell.
`Although any number of cells can be used, an 8-bit register is shown in the figure as an
`example.
`CAM is a technology known to those skilled in the art, but which has seen only
`limited use in various niche applications so far. The external microcontroller loads a
`dataword into an 8-bit CAM Register represented by 8 CAM bits via the “D" bus
`and its complementary “D*" bus, and supplies Reference Data on the “R" bus
`and its complementary “R*” bus. Data is initially loaded from the D buses in
`response to a load (Id) signal from a local address decoder. The loaded data
`corresponds to the desired pulse width (or phase offset) for this cell of the
`actuator array.
`in operation after loading, the “cmp” input initiates a comparison
`between the CAM Registers contents and the reference data on the R buses,
`which amounts to address data, , and the “match” output signals a match. The
`"|d" input enables an update of the Registers contents. The "D”’ bus, “R” bus,
`"cmp", and '‘Id’' are inputs that come from outside the array and are bussed to all
`CAM Registers in the array. Exemplary schematics for a CAM bit and a RAM bit
`are shown in FIG. 6.
`
`In our system, the microcontroller steps through the array sequentially and
`loads a value into each ce|l’s CAM register corresponding to the desired phase
`delay of that cell's output. An external system clock scrolls through values with
`incrementally changing Values on the “R" bus, and each time the “cmp” input is
`strobed to initiate a comparison. When the point in the clock cycle is reached for
`that cell to change its high voltage state, the clock's value ‘matches’ the CAM
`register’s value in all eight bits and the register output causes the RAM bit to
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`Attorney Docket No. 3822.06-PV2
`Movaz Ref.: 2000-02
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`change state and remain in that state for the duration of the cycle or half cycle.
`The low voltage output of the RAM bit drives the High Voltage section of the cell.
`Figure 6 shows typical internal construction of a CAM bit and a RAM bit
`(prior art).
`The high voltage section 82 contains a level shifter and two hig