Capella 2017
`JDS Uniphase v. Capella
`IPR2015-00731
`
`1
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`U.S. Patent
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`Apr. 8,2003
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`Sheet 1 of 14
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`Sheet 2 of 14
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`US 6,543,286 B2
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`1
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`HIGH FREQUENCY PULSE VVIDTH
`MODULATION DRIVER, PARTICULARLY
`USEFUL FOR ELECTROSTATICALLY
`ACTUATED MEMS ARRAY
`
`RELATED APPLICATIONS
`
`This application claims benefit of U.S. Provisional Appli-
`cations No. 60l’264,267, filed Jan. 26, 2001, and No. 603267,
`285, filed Feb. 7, 2001.
`
`10
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`FIELD OF THE INVENTION
`
`The invention relates to electrical driving circuits. In
`particular, the invention relates to electrical driving circuits
`configured to drive an array of electrostatic actuators, for
`example, micro electromechanical systems used for optical
`switches.
`
`BACKGROUND ART
`
`The technology of micro electromechanical systems
`(MEMS) originates from technology developed over
`decades for the fabrication of silicon integrated circuits.
`MEMS permits the fabrication of large arrays of microac-
`tuators that can serve as mirrors, valves, pumps, etc. for a
`variety of applications. Although the invention is not so
`limited, an important application is an array of liltable
`mirrors integrated in a single substrate and used for switch-
`ing of a large number of optical beams. Each mirror is part
`of a separately controlled actuator. These actuators are
`typically electrostatic in nature and require actuation volt-
`ages near 100V to operate.
`An example of one cell of an electrostatically controlled
`MEMS array is illustrated in plan view in FIG. 1 and in
`cross-sectional view in FIG. 2. The cell is one of many such
`cells arranged typically in a two-dimensional array in a
`bonded structure including multiple levels of silicon and
`oxide layers. The cell includes a girnbal structure of an outer
`frame 110 twistably supported in a support structure 112 of
`the MEMS array through a first pair of torsion beams 114
`extending along and twisting about a minor axis. The cell
`further includes a mirror plate 116 having a reflective
`surface 117 twistably supported on the outer frame 110
`through a second pair of torsion beams 118 arranged along
`a major axis perpendicular to the minor axis and twisting
`thereabout. In the favored MEMS fabrication technique, the
`illustrated structure is integrally formed in an epitaxial (epi)
`layer of crystalline silicon. The process has been disclosed
`in US Provisional Application, Serial No. 60;'260,749, filed
`Jan. 10, 2001,
`incorporated herein by reference in its
`entirety.
`The structure is controllably tilted in two independent
`dimensions by a pair of electrodes 120 under the mirror plate
`116 and another pair of electrodes 12 under the frame 110.
`The electrodes 120, 122 are symmetrically disposed as pairs
`across the axes of their respective torsion beams 18, 114. A
`pair of voltage signals VA, V5 are applied to the two mirror
`electrodes 120, and another pair of voltage signals are
`applied to the frame electrodes 122 while a common node
`voltage signal VC is applied to both the mirror plate 116 and
`the frame 110. The driving circuitry for these and similar
`voltage signals is the central focus of this invention.
`Horizontally extending air gaps 124, 126 are formed
`respectively between the frame 110 and the support structure
`112 and between the mirror plate 116 and the frame 110 and
`overlie a cavity or vertical gap 128 fon'ned beneath the frame
`110 and mirror plate 116 so that the two parts can rotate. The
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`support structure 112, the frame 110, and the mirror plate
`116 are driven by the common node voltage VC, and the
`frame 110 and mirror plate 116 form one set of plates for
`variable gap capacitors. Although FIG. 2 illustrates the
`common node voltage V5. being connected to the mirror
`plate 116, in practice the electrical contact is made in the
`support structure 112 and electrical leads are formed on top
`of the torsion beams 114, 118 to apply the common node
`voltage signal to both the frame 110 and the mirror plate 116,
`which act as top electrodes. The electrodes 118, 120 are
`formed at the bottom of the cavity 128 so the cavity forms
`the gap of the four capacitors,
`two between the bottom
`electrodes 118 and the frame 110, and two between the
`bottom electrode 120 and mirror plate 116.
`The torsion beams 114, 118 act as twist springs attempting
`to restore the outer frame 110 and the mirror plate 116 to
`neutral tilt positions. Any voltage applied across opposed
`electrodes exerts a positive force acting to overcome the
`torsion beams 114, 118 and to close the variable gap between
`the electrodes. The force is approximately linearly propor-
`tional to the magnitude of the applied voltage, but non-
`linearities exist for large deflections. If an AC drive signal is
`applied well above the resonant frequency of the mechanical
`elements, the force is approximately linearly proportional to
`the root mean square (RMS) value of the AC signal. In
`practice, the precise voltages needed to achieve a particular
`tilt are experimentally determined.
`Because the capacitors in the illustrated configuration are
`paired across the respective torsion beams 114, 118, the
`amount of tilt is determined by the difference of the RMS
`voltages applied to the two capacitors of the pair. The tilt can
`be controlled in either direction depending upon the sign of
`the difference between the two RMS voltages.
`As shown in FIG. 2, the device has a large lower substrate
`region 130 and a thin upper MEMS region 132, separated by
`a thin insulating oxide layer 134 but bonded together in a
`unitary structure. The tilting actuators are etched into the
`upper region, each actuator suspended over the cavity 128
`by several tethers. The electrodes are patterened onto the
`substrate, which can be an application specific integrated
`circuit (ASIC), a ceramic plate, a printed wiring board, or
`some other substrate with conductors patterned on its sur-
`face. The actuators in the upper region form a single
`electrical node called the “common node”. Each actuator is
`
`suspended above four electrodes, each electrode being iso-
`lated from every other electrode. To cause the actuator to tilt
`in a specific direction, an electrostatic force is applied
`between the actuator and one or more of its electrodes by
`imposing a potential difference between the common node
`and the desired electrode. Each actuator has two pairs of
`complementary electrodes, one causing tilt along the major
`axis and the other causing tilt along the minor axis. Fabri-
`cation details are supplied in the aforementioned Provisional
`Application No. 60f260,749.
`One drawback of electrostatic actuation used for this
`micromirror is a phenomenon known as “snapdown”.
`Because electrostatic force is inversely proportional to the
`distance between the electrodes, there comes an angle at
`which the attractive force increases very rapidly with greater
`electrode proximity. Beyond this angle, a small decrease in
`distance leads to an enormous increase in force, and the
`electronic control loop becomes unstable, causing the elec-
`trodes to snap together. With such an actuator in which the
`electrodes comprise a flat plate suspended over a cavity by
`small tethers, a rule of thumb states that the plate will begin
`to snap down at a deflection corresponding to approximately
`four ninths the depth of the cavity. Hence, in order to achieve
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`3
`a deflection of B at the end of the cantilever, the cavity must
`be approximately 2.25 6 deep. Electrostatic MEMS mirror
`arrays have been used as video display drivers, but they
`operated at two voltage levels, zero and full snap-down. In
`contrast, the mirrors described above must be nearly con-
`tinuously tiltable over a significant angular range.
`Optical constraints determine the deflection distance
`requirement for the electrostatic micromirror. The RMS
`voltage level required for a given amount of deflection
`results from a combination of actuator size, tether spring
`constant, and cavity depth. The cavity depth required to
`avoid snapdown generally dictates the use of relatively high
`voltages, typically in excess of 40V, the upper limit for many
`standard IC processes. The generation of such voltages
`requires an electronic system composed of high-voltage
`(HV) mrniconductor components, either olf-the-shelf or
`customized, which are fabricated by specialized HV
`processes, such as the HVCMOS process available from
`Supertex, Inc.
`The application for which the invention was developed
`requires a 12x40 array of micromirrors, and the mirrors must
`be independently tiltable in both directions along two axes.
`Each tilt axis requires its own actuator pair so the driver
`array is 24x40. The size of the array is dictated by the
`switching of 40 wavelength-separated channels in a wave-
`length division multiplexing (WDM) optical network being
`switched between 6 input fibers and 6 output fibers with a
`folding mirror optically coupling paired input and output
`mirrors. Switching is accomplished by selective tilting about
`a major axis; and, power tuning by selective tilting about a
`minor axis. The MEMS structure accomplishes
`bi-directional tilt using two electrodes that are symmetri-
`cally placed about the central tether of each axis. Hence,
`there are four electrodes per microactuator, for a total of
`3840 electrodes that must be independently controlled.
`Optical techniques such as “interleaving” may be used to
`split
`the array into two 12x40 chips, but even with this
`amelioration, each MEMS chip will have 1920 high-voltage
`inputs and outputs (U05). While U0 counts of several
`thousand are commonplace in certain low-voltage digital
`technologies such as memories. But, when the inputs here
`are high-voltage analog signals, as in the described mirror
`switching array, high IEO counts present a significant pack-
`aging problem.
`Conventional methods for silicon chip U0 include wire
`bonding and die-to-substrate attachment known as “flip-
`chip”. It is generally accepted that wire bonding becomes
`impractical at about 800 I,r‘0’s, due to the large chip perim-
`eter required to contain the bond pads. Integrated circuits
`with higher IEO counts are typically attached to a substrate
`with solder bumping, and signals are routed to discrete
`drivers that are flip-chip bonded to the same substrate, but
`this solution becomes diflicult in the intended application
`due to the very large number of high-voltage (I-IV) signals
`and the size of conventional HV circuitry.
`that
`MEMS actuators often exhibit a charging elfect
`builds up over time and, when the driving voltage is DC,
`eventually disables operation. Charging therefore dictates
`that the driving voltage has alternating polarity with zero DC
`bias. Also, MEMS microactuators may display significant
`operational variation from actuator to actuator or the opera-
`tion may depend upon environmental conditions.
`
`SUMMARY OF THE INVENTION
`
`The invention includes the method and circuitry for
`driving an electrostatic or other type of actuator, particularly
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`that used for a micro electromechanical system (MEMS). In
`an electrostatic actuator, a variable gap capacitor is formed
`between electrodes fixed on two mechanical elements, one
`of which is movable with respect to the other against a
`restoring force, such as a spring. The relative position of the
`two elements is controlled by pulse width modulation
`(PWM) in which the pulse width of a repetitive drive signal
`determines the RMS value of the applied voltage. The
`frequency of the drive signal is preferably at least ten times
`the mechanical resonant frequency of the mechanical ele-
`ments.
`
`Preferably, for electrostatic actuators, the drive signal is a
`bipolar signal having a zero DC component. Such a bipolar
`drive signal is achieved using digital circuitry by applying a
`first high-voltage signal synchronized to the drive frequency
`to one electrode and a second high-voltage signal to the
`other electrode at the same drive frequency but delayed from
`the first high-voltage signal.
`The MEMS element may be a tiltable plate symmetrically
`formed about the axis of a torsion beam supporting it with
`two variable gap capacitors formed on opposing sides of the
`beam axis. Advantageously, a first binary high-voltage sig-
`nal is applied to a first electrode spanning the beam axis, a
`delayed binary second high-voltage signal is applied to a
`second electrode opposed to one side of the first electrode,
`and a binary third high-voltage signal complementary to the
`second high-voltage signal
`is applied to third electrode
`opposed to the other side of the first electrode.
`Alternatively, the delayed high-voltage signal is applied
`to a selected one of the paired capacitors while a high-
`voltage clock signal is applied to the unselected one.
`The invention is advantageously applied to an array of
`MEMS actuators formed in top level of a bonded multi-level
`silicon structure. A control cell is associated with each
`
`actuator. Preferably, a high-voltage section, for example,
`having a power bus of 40 VDC or greater, of each control
`cell is positioned below the actuator it drives, and an array
`of such high-voltage sections are arranged on a same pitch
`as the actuators. The PWM control may be elfected using a
`low-voltage logic section, for example, having a power bus
`of no more than 5 VDC. The high-voltage and low-voltage
`sections are distinguished by a ratio of power supply volt-
`ages of at
`least 8. The low-voltage section supplies a
`low-voltage version of the delayed drive signal, which the
`associated high-voltage section converts to a high-voltage
`drive signal. The low-voltage sections may be disposed
`below its corresponding actuator or may be disposed on a
`side of an array of actuators and corresponding high-voltage
`sections.
`
`The control cell may be implemented as a counter driven
`by a master clock at a multiple of at least 8 of the drive clock
`to which the bipolar drive signal is locked and supplying its
`multi-bit output to many control cells. Each control cell
`includes a register for selectively storing a value correspond-
`ing to the desired delay. A multi-bit comparator compares
`the counter value with the register. When the two agree, a
`bipolar polarity signal oscillating at the drive frequency is
`latched until the corresponding time of the next half cycle.
`The latched signal is delayed from the drive frequency by
`the delay stored in the register. Data is stored in a selected
`one of the control cells by a multiplexing architecture
`including address decoders and a shared multi-bit data bus.
`Such logic is advantageously implemented in a content
`addressable memory (CAM) having multiple CAM bits,
`each of which both stores a bit and compares it to the counter
`bit. When the two agree, its output is combined with that
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`5
`register’s other CAM bit outputs in an AND circuit. This
`may be eifected by precharging a single line that is dis-
`charged by any of the CAM bits connected to it. That single
`line enables a latch to latch the current value of the drive
`clock.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1 is a plan view of a cell of an array of micro
`electromechanical actuators including a mirror tiltable in
`two perpendicular directions.
`FIG. 2 is a cross-sectional view of the cell of FIG. 1 taken
`
`along view line 2—2.
`FIG. 3 is a schematic diagram of a control system
`architecture for an array of MEMS mirrors.
`FIG. 4 is a timing diagram for pulse width modulated
`voltage driving signals combined with a schematic of the
`electrostatic actuator they are driving.
`FIG. 5 is a circuit diagram for the high-voltage drive
`circuit which translates logic level pulse width modulation
`(PWM) signals to high-voltage signals.
`FIG. 6 is a timing diagram illustrating the generation of
`the PWM signal.
`FIG. 7 is a block diagram of a logic driver circuit, which
`may be implemented in content addressable memory
`(CAM).
`FIG. 8 is a floor plan of a mixed high-voltage and
`low-voltage integrated circuit driving 480 two-axis mirrors.
`FIG. 9 is a floor plan of one logic column of the integrated
`circuit of FIG. 8.
`
`FIG. 10 is a schematic diagram of the addrem decoders
`controlling the CAM register.
`FIG. 11 is a circuit diagram of circuitry used to groom
`control signals used to control the CAM register.
`FIG. 12 is a timing diagram of signals in the grooming
`circuit of FIG. 11.
`
`FIG. 13 is a circuit diagram of the CAM register.
`FIGS. 14 and 15 are schematic diagrams respectively of
`the RAM bit cell and the CAM bit cell in the CAM register
`of FIG. 13.
`
`FIG. 16 is a block diagram illustrating alternative cir-
`cuitry for implementing the logic drive circuit of FIG. 7.
`FIG. 1'? is a block diagram of a modification of the
`circuitry of FIG. 16 usable when net force is applied to only
`one of two electrode pairs.
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENTS
`
`The drive circuitry of the invention is advantageously
`combined with other elements to form a micromirror switch
`array and control system illustrated schematically in FIG. 3.
`Although the invention most directly concerns the driver
`control circuitry and in particular its use of pulse width
`modulation, the invention is not limited to driving micro-
`mirrors. However, the mirror array as implemented in an
`optical switching system will be described first to provide
`specificity to the description of the control system. Further,
`some of the features of the micromirror array and its
`implementation in a bonded multi-level structure are advan-
`tageously combined with features of the control system.
`A micromirror array 140 of FIG. 3 includes a number of
`tiltable mirrors 142 fabricated as a micro electromechanical
`systems (MEMS) by techniques originally developed in the
`semiconductor industry but now further developed for very
`
`6
`small electrically controlled mechanical systems. The
`micromirror array 140 may be formed of a large number of
`cells illustrated in FIGS. 1 and 2 arranged on a regular pitch
`in two dimensions. The mirrors may have sizes of about 400
`5 pm arranged on perpendicular pitches of about 650 pm and
`1000 ram, allowing the entire 12x40 mirror array to be
`fabricated on a chip having dimensions of about 12 mm><26
`mm. Each of the mirrors 142 includes two microactuators,
`each driven by a respective driver 144 in a driver integrated
`circuit 146. The driver 144 applies a high-voltage (HV)
`signal to electrodes forming variable gap capacitors with the
`tiltable mirror and eifecting an electrostatic actuator (ESA).
`The figure indicates only a single drive for each mirror 142.
`However, the drive circuitry is easily extended to a two-axis
`tiltable mirror by including separate and independent drivers
`144 for the two axes.
`
`10
`
`Advantageously, the driver integrated circuit 146 is fab-
`ricated on an application specific integrated circuit (ASIC)
`fabricated by a process which, if desired, can accommodate
`both the HV drivers 144 and lower-voltage control circuitry
`for the HV drivers. The driver integrated circuit can be
`interfaced directly to bottom of the micromirror array 140 by
`chip-on-chip solder bumping, frit bonding, or similar means
`leaving the top surface including the mirrors 142 exposed.
`At least the high-voltage drivers 144 are preferably posi-
`tioned below the corresponding mirror microactuator 142
`and are directly and vertically connected to the correspond-
`ing electrodes. As a result, the high-voltage drivers 144 need
`to be small enough to be arranged on the same pitch as the
`mirrors 142. Typically, the mirror chip 140 is smaller than
`the driver chip 146 with bonding pads and perhaps the
`lower-voltage circuitry in the driver chip 146 being exposed
`to the side of the mirror chip 146. Alternatively, the low-
`voltage circuitry is formed in one or more chips connected
`by bonding wires or solder bumps to the high-voltage ASIC
`in a multi-chip module (MCM) configuration. The single
`electrical connection to the common node forming the top
`electrodes of the electrostatic microactuators can be accom-
`
`plished by eutectic bonding, polymer bonding, or wirebond-
`ing from the top side of the mirror chip 140.
`Low-voltage control circuitry is readily available for DC
`power supplies of 5 VDC although lower voltages are
`becoming prevalent
`in digital integrated circuits. On the
`other hand,
`the electrostatic actuation of MEMS devices
`usable as optical switches require much higher voltages,
`generally a minimum of 20 VDC, but at least 40 VDC is
`preferred, and at least 100 VDC eases the overall design.
`Accordingly, when high-voltage circuitry is distinguished
`from low-voltage circuitry, the DC power buses of the two
`circuits supply voltages differ by at least a factor of four and
`preferably by a factor of eight.
`The control system is a completely digital system based
`on a microprocessor 150 operating at a clock rate, approxi-
`mately 25.6 MHZ in the embodiment to be described later in
`detail, set by an oscillator 152. Other types of Inicrocon-
`trollers may also be utilized. Preferably, the microprocessor
`150 and oscillator 152 together with the assembled ESA
`array 140 and driver integrated circuit 144 and perhaps a
`separate low-voltage control integrated circuit are mounted
`on a standard substrate carrier, typically fonned of plastic or
`ceramic, with a small number of wire bonds connecting the
`microprocessor 150 and the periphery of the driver chip 146.
`The microprocessor 150 receives commands from the sys-
`tem controlling the optical switch and through a multiplex-
`ing sequence controls a large number of actuator cells
`through a small number of control lines. These commands
`include most importantly the desired positions ofthe minors
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`US 6,543,286 B2
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`7
`142, which elfect switching between optical ports of the
`system. For the 12x40 mirror array discussed above, each
`mirror needs to be positionable in the major direction at, for
`example, six gross tilt angles as well as at finer angular
`resolution corresponding to tuning around those positions
`and in the minor direction in a fine resolution providing
`power tuning.As a result, two actuators are required for each
`mirror 142. It is understood that the invention can be applied
`to a dilferent number of MEMS elements and is not limited
`to two-axis tilting.
`The overall system also includes equalization of energies
`between the wavelength channels, as disclosed in US Pro-
`visional Application No.
`l30f23-4,683, filed Sep. 22, 2000.
`The mirrors 142 redirect incident beams 160, only two of
`which are illustrated, into reflected beams 162 at angles
`determined by the mirror positions. The tilt of each mirror
`142, as controlled by the drive voltages, is selected to
`redirect the incident beam 160 originating from a fixed angle
`to the refiected beam 162 at a selected output angle. The
`angle can be mlected to correspond to different output ports
`or to tune the optical coupling to a particular output port,
`taking into account the unillustrated optics included within
`the system.
`A small fraction of the power in each reflected beam 162
`is detected in a respective optical detector 164. The larger
`fraction is coupled to unillustrated output ports of the
`switching system. A multiplexer 166 under control of the
`microprocessor 150 selects one of the detector outputs and
`an analog-to-digital (AID) converter 168 digitizes the
`detected optical intensity and supplies it to the micropro-
`cessor 150. Thereby, the microprocessor 150 monitors the
`optical intensity of the reflected beams. Thereby, the micro-
`processor 150 can instruct the tuning of the minors to either
`maximize the coupling or, more preferably, to equalize the
`intensity between multiple beams destined for the same
`WDM output fiber. Such equalization is important when the
`signals originate from difierent sources of uncertain power.
`In one preferred implementation, separate input and out-
`put mirrors are coupled through an intennediate folding
`mirror. Each time an input optical signal is routed to a new
`output fiber,
`the microprocessor 150 reads the optimum
`position settings for both axes of both the input and output
`mirrors associated with this routing combination and sets the
`mirror positions accordingly. Optimum mirror settings may
`have changed since this routing combination was last used
`due to changes in environmental conditions, such as
`vibration, thermal expansion, fiber stress, etc. so the micro-
`processor 150 will then need to hunt for a new maximum in
`measured power by making small adjustments to the mirror
`settings, using, for example, a gradient descent algorithm,
`until the positions of peak intensity are determined.
`Once the transmission coupling is optimized, the power of
`the output signals may be intentionally degraded to obtain
`equalization or other adjustment of power with the other
`output signals. Equalization may be achieved by reducing
`the angle on the minor axis until equalization is obtained
`following Newson’s method in which the new minor-axis
`angle is estimated by computing the change in power
`necessary to obtain equalization divided by the angular
`derivative of power. This method is repeated until equiliza-
`tion is obtained. The derivative of the output power with
`minor-axis position must be learned by the microprocessor.
`Each time a mirror is adjusted to a new position, the angular
`derivative is computed using the measured change in power
`divided by the commanded change in angle.
`Equalization is an ongoing process since environment
`conditions, including laser power, may change. The micro-
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`processor will routinely monitor all output power levels and,
`using its most recent knowledge of the power derivative,
`will adjust the minor-axis settings to maintain equalization.
`Likewise, it will make small adjustments to the major-axis
`settings to maintain optimum alignment despite changes in
`environmental conditions.
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`The microprocessor 150 controls a time multiplexed
`storage of position control in the actuator array ASIC 144.
`In the pulse width modulation control, the position control
`is dictated by a multi-bit duty cycle. The position data and
`a row and column address for which the data is to be applied
`are delivered to the actuator array 144 by the microprocessor
`150. A write enable signal WE causes the addressed cell of
`the actuator array 144 to store the position data. Thereby, all
`cells are sequentially stored with position data, and the
`position data of any one cell can be updated as desired. A
`compare enable signal CE from microprocessor causes all of
`the cells in the actuator array to be simultaneously PWM
`controlled according to position data stored in the respective
`cell with a timing referenced to a clock signal CLK supplied
`from the microprocessor 150 as derived from an oscillator
`152. In the described example, the electrostatic micnoactua-
`tors are subjected to a bipolar signal oscillating at 50 kHz
`and the CLK signal is 512 times greater, that is, 25.6 MHZ.
`This design is facilitated by drive circuitry having several
`characteristics. It should output RMS voltages as large as
`200V with zero DC bias to obtain adequate electrostatic
`mirror dellection while avoiding charging elfects. Any sub-
`stantial deviation from zero DC bias will require occasion-
`ally discharging the electrostatic actuator on time periods
`inconvenient for operation. Any AC component in the drive
`signal should be at a frequency that is at least ten times
`greater than the mechanical resonance of the MEMS
`structure, which for the illustrated structure of FIGS. 1 and
`2, is about 5 kHz, so that the mechanical inertia provides
`suflicient low-pass filtering of the drive current to prevent
`oscillation of the minor. The RMS values of the output
`voltages controls the tilt positions of the mirrors, which need
`to be controlled not only between the output ports but also
`to fine tune the positions for variations between actuators
`and to account for temporal and environmental variations. A
`resolution of eight bits (one part
`in 256) is considered
`adequate in a switching system with optimized optics
`although 4 bits (1 part in 64) may be sulficient in other
`applications. The total area of the high-voltage driver cell
`should be no greater than of the actuator cell, approximately
`650 ,umx1000 ,um so that devices such as high-voltage
`capacitors and field-efiect transistors should be eliminated or
`at least their number minimized. It would be desirable to
`include the low-power circuitry in the san:te area, but the
`low-power circuitry can be placed to the side of the actuator
`array if necessary.
`The drive circuitry described below achieves all of these
`objectives by a high-speed bipolar actuator signal having an
`RMS value controlled by pulse-width modulation
`The general bipolar PWM timing diagram is illustrated in
`FIG. 4 for the differential control of an electrostatic actuator
`including two paired variable-gap capacitors 180, 182, as
`illustrated in FIGS. 1 and 2, formed between either the two
`electrodes 120 and the mirror plate 116 or the two electrodes
`122 and the frame 110. The mirror plate 1.16 or frame 110,
`represented by one side of the two capacitors 180, 182, is
`drive by a common node signal VC, which is a binary,
`unipolar square-wave signal of 50% duty cycle oscillating
`between ground and a high voltage +V,, with a repetition
`period T, which is the inverse of the high-frequency fmmr,
`which is at least ten times greater than the MEMS resonant
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`9
`frequency. In the projected design of the actuators for a 50
`kHz drive signal, T is 20 its. The two electrodes are
`respectively driven by two complementary electrode signals
`V_,,, V: of the same waveform as the common node signal
`VG except that the first electrode signal is shifted in phase by
`a time 1:, which is variable between 0 and TR. Each of the
`signals VA, VB, V,_. is a square wave binary signal with 50%
`duty cycle having values of either 0 or +\/H of equal duration
`although it is appreciated that the ground point can be ofiset
`from zero with proper consideration of other grounding
`points.
`A voltage drive signal WA, W3 across the respective
`capacitor 180, 182 is the difierence between the electrode
`signal VA or VB and the common node signal VG. As
`illustrated, both drive signals WA, W3 are bipolar with a zero
`DC component, thereby avoiding charging of the electro-
`static actuator. The voltage drive signals W,,, W, can
`alternatively be characterized as ternary with values of 0 and
`:\/H with the finite components having equal duration. The
`switching of the common node signal V5. allows a high-
`voltage power supply at V” to produce bipolar signals WA,
`W