Fundamentals
`of Digital
`Systems Design
`
`COMPUTER APPLICATIONS IN ELECTRICAL ENGINEERING SERIES
`
`Franklin F. Kuo,
`Editor
`
`Page 1 of 11
`
`PETITIONER'S EXHIBIT 1013
`
`

`

`OF
`
`FUNDAMENTALS
`DIGITAL
`SYSTEMS
`DESIGN
`
`V. THOMAS RHYNE
`
`Department of Electrical Engineering
`Texas A&M University
`
`PRENTICE-HALL, INC., Eng[ewood Cliffs, New Jersey
`
`Page 2 of 11
`
`PETITIONER'S EXHIBIT 1013
`
`

`

`Library of Congress Cataloging in Publication Data
`
`RHYNE, V THOMAS,
`Fundamentals of digital systems design.
`(Prentice-Hall computer applications in electrical
`engineering series)
`
`Includes bibliographical references.
`1. Switching theory. I. Title.
`TK7868.S9R5 621.3815"37 72-6903
`ISBN 0-13-336156-X
`
`PRENTICE-HALL COMPUTER APPLICATIONS
`IN ELECTRICAL ENGINEERING SERIES
`
`Franklin F. Kuo, Editor
`
`(ÿ) 1973 by Prentice-Hall, Inc.
`Englewood Cliffs, New Jersey
`
`All rights reserved. No part of this book
`may be reproduced in any form or by any
`means without permission in writing from
`the publisher.
`
`10987654
`
`Printed in the United States of America
`
`PRENTICE-HALL INTERNATIONAL, INC., London
`PRENTICE-HALL OF AUSTRALIA, PTY. LTD., Sydney
`PRENTICE-HALL OF JAPAN, INC., Tokyo
`PRENTICE-HALL OF CANADA, LTD., Toronto
`PRENTICE-HALL OF INDIA PRIVATE LTD., New Delhi
`
`This book is dedicat
`VERNON T.
`
`Page 3 of 11
`
`PETITIONER'S EXHIBIT 1013
`
`

`

`11
`
`Analog/Digital
`Conversion
`
`11.0 Introduction
`
`The concept of a generalized digital system is introduced in Chapter 1 (see
`Fig. 1-0). The input and output signals that are received and/or generated
`by such a system are shown to be of two types: digital signals and analog
`signals. Some digital systems deal only with digital signals. Data-processing
`computers are a common example. Their input data come from punched
`cards, paper tape, digital magnetic tape, or some other digital media. Com-
`puted output data are printed or punched or recorded in some other digital
`fashion.
`In many digital systems, however, nondigital (analog) information must
`be received, processed, and returned to the user. Typical analog data include
`temperature, pressure, force, speed, or other continuous descriptors of real-
`world conditions. These types of signals are first converted into an appro-
`priate form by transducers. Electrical transducers that convert their input
`variable into a voltage or current are used in conjunction with electronic
`digital systems. Other types of transducers are in use, however, such as those
`having a pressure output that are used with fluidic digital systems.
`The output signals from the transducers are converted into digital form
`by analog-to-digital converters (ADCs). The digital code words that are
`produced by this conversion describe the input conditions to the digital sys-
`tem. These code words are processed by the system in order to produce
`the desired output data.
`In many situations output data must be converted back into a continuous
`form. Typical examples of this requirement are systems whose digital outputs
`
`532
`
`See. 11.1
`
`must actuate a servo
`a cathode-ray-tube di
`are called digital-to-an
`This chapter disct
`to-digital conversion.
`emphasis is upon the
`them in conjunction ÿi
`ters 1-7. The design ot:
`As a result, the section:
`considerations kept to
`sources are provided. :
`It is also significa
`available from commÿ
`logical circuitry alread
`may therefore be cons
`systems that must be
`the effect that the wide:
`devices has had uponI
`these devices is no lont
`
`11.1 Digital-to-Analoÿ
`
`Figure 11-0 is a generÿ
`word that is to be con
`
`Figure 11-0. A Voltage
`to-Analog Converter
`
`DAC. The internal cirÿ
`of the bits of the digi
`voltage, Vout.
`The output voltal
`random, linear, or non
`of the coded inputs an
`of this type of tabulaÿ
`constructed as shown
`a relay that connects t
`words are decoded by
`signals is buffered by al
`can be used if the DAI
`
`Page 4 of 11
`
`PETITIONER'S EXHIBIT 1013
`
`

`

`i;
`
`i
`!i
`
`Ii
`
`,
`:!
`i!i
`
`'ÿ!il
`
`i '
`
`11
`
`,ii: i
`
`II
`ii,ili
`
`i,I,
`
`Sec. 11.1 Digital-to-Analog Conversion 533
`
`must actuate a servo system, drive a meter or an X-Y recorder, or operate
`a cathode-ray-tube display unit. The devices that perform this conversion
`are called digital-to-analog converters (DACs).
`This chapter discusses the basic concepts of digital-to-analog and analog-
`to-digital conversion. Voltage-oriented converters are considered. The major
`emphasis is upon the logic aspects of operating these devices and of using
`them in conjunction with digital systems that have been designed ÿt la Chap-
`ters 1-7. The design of DACs is really more electronic than digital in nature.
`As a result, the section on digital-to-analog conversion is brief, with electronic
`considerations kept to a minimum. References to more detailed information
`sources are provided.
`It is also significant that a wide variety of DACs and ADCs are now
`available from commercial sources, with all the necessary electronics and
`logical circuitry already designed and conveniently packaged. These devices
`may therefore be considered as predesigned comPonents rather than as sub-
`systems that must be designed and constructed. This situation is similar to
`the effect that the widespread availability of flip-flops, gates, and other logical
`devices has had upon digital design, in that the component-level design of
`these devices is no longer required, or expected, of a digital systems designer.
`
`11.1 Digital-to-Analog Conversion
`
`Figure 11-0 is a general diagram of a voltage-output DAC. The digital code
`word that is to be converted into analog form is applied to the input of the
`
`Vout
`
`Figure 11-0. A Voltage-output Digital-
`to-Analog Converter
`
`DAC. The internal circuitry of the DAC interprets the TRUE/FALSE values
`of the bits of the digital code word and produces the appropriate output
`voltage, Vo,t.
`The output voltage can be related to the digital input in three ways:
`random, linear, or nonlinear. A random DAC must be defined by a tabulation
`of the coded inputs and the voltages that each should produce. An example
`of this type of tabulation is given in Table 11-0. A random DAC can be
`constructed as shown in Fig. 11-1. Each input code word is used to close
`a relay that connects the appropriate voltage to the DAC output. The code
`words are decoded by using normal combinational logic. Each of the logical
`signals is buffered by an appropriate relay driver circuit. Solid-state switching
`can be used if the DAC must operate at higher speeds.
`
`Chapter 1 (see
`nd/or generated
`nals and analog
`Data-processing
`from punched
`:al media. Com-
`me other digital
`
`formation must
`log data include
`criptors of real-
`into an appro-
`vert their input
`with electronic
`r, such as those
`ystems.
`nto digital form
`words that are
`the digital sys-
`rder to produce
`
`ato a continuous
`e digital outputs
`
`J
`
`Page 5 of 11
`
`PETITIONER'S EXHIBIT 1013
`
`

`

`534 Analog/Digital Conversion Chap. 11 Sec. 11.1
`
`A linear DAC ca1
`voltage increment, whic
`ing the digital input b3
`voltage can make; it i
`quantization voltage. ÿ[
`DAC receives at its inr
`If the unit voltage is rÿ
`of the DAC must be 2"i
`code words are allowec
`The voltage outpu
`Vmax ÿ< 2"v, or it can 1:'
`a positive upper limit.,
`in Table 11-1. The unit
`
`A linear DAC can
`a random DAC-in Fig. l
`code to represent the ir
`by using a voltage sum
`in generalized form, in
`
`IIIrI
`
`v
`
`Table 11-0: A Random DAC
`
`Digital Input Voltage Output (V)
`
`000 + 10.0
`001 --10.0
`010 +5.0
`011 --3.0
`100 --1.5
`101 +3.6
`110 +7.2
`111 0.0
`
`:: .ÿ- Vout
`
`Combinational
`Decoding
`Logic
`
`I I
`I I
`
`=!IIII
`
`Digital
`Input
`
`Relay Drivers O--J
`
`Figure 11-1. A Random DAC
`
`A random DAC having n input bits may require as many as 2" voltage
`sources and 2" switches or relays. As the number of input bits increases, this
`requirement increases exponentially.
`The random DAC may exhibit erratic behavior during the period just
`following a change in its digital input. An asynchronous change may cause
`the brief appearance of transition states at the input, and several relays or
`switches may be activated in rapid sequence. This will cause a rapid variation
`in Vout. Also, if two or more switches are closed at the same time, the short
`circuit that results may damage the switches or the voltage sources. Thus,
`the use of fully synchronous input changes or a unit-distance coding tech-
`nique is generally advisable with a random DAC.
`A linear DAC differs from the random DAC in that its output voltage is
`directly related to the magnitude represented by its digital input. Linear
`DACs can also be made to operate with signed numbers, with the polarity
`of the output voltage changing in accordance with the sign of the input code
`word.
`
`Page 6 of 11
`
`PETITIONER'S EXHIBIT 1013
`
`

`

`Chap. I1
`
`Sec. 11.1 Digital-to-Analog Conversion 535
`
`A linear DAC can be characterized by two parameters. One is the unit
`voltage increment, which is the change in voltage that corresponds to increas-
`ing the digital input by one unit. This is the smallest change that the output
`voltage can make; it is also called the step voltage, the unit voltage, or the
`quantization voltage. The second parameter is the number of bits that the
`DAC receives at its input. An n-bit DAC can receive 2" different code words.
`If the unit voltage is represented by v, then the range of the output voltage
`of the DAC must be 2"v or less. It will be less than this value if not all the 2"
`code words are allowed, as when BCD code is used as the input.
`The voltage output from a linear DAC can begin at 0 and increase to
`Vm,x __< 2"V, or it can be biased to work between a negative lower limit and
`a positive upper limit. A tabulation describing a typical linear DAC is given
`in Table 11-1. The unit voltage for this DAC is 0.1 V.
`
`Vout
`
`I
`
`ly as 2" voltage
`s increases, this
`
`the period just
`rage may cause
`everal relays or
`rapid variation
`time, the short
`sources. Thus,
`ce coding tech-
`
`utput voltage is
`1 input. Linear
`,ith the polarity
`the input code
`
`Table 11-1: A Three-Bit Binary DAC
`
`Binary Input Voltage Output (V)
`
`000 0.0
`001 0.1
`010 0.2
`011 0.3
`100 0.4
`101 0.5
`110 0.6
`111 0.7
`
`A linear DAC can be constructed according to the schematic given for
`a random DAC-in Fig. 1 I-1. A better approach, however, is to use a weighted
`code to represent the input quantity and to implement the DAC operation
`by using a voltage summing amplifier. This type of arrangement is shown,
`in generalized form, in Fig. 11-2. Only n switches, n + 1 fixed-gain voltage
`
`Vout=(alw]+azco2+--- +anWn+C)V
`
`Figure 11-2. A Linear DAC
`
`i'1
`i]
`;I
`:1 I
`
`i ,
`
`7
`
`i, i
`
`i,!
`
`i
`i:!
`:'I
`II
`!1
`
`li
`i
`
`i'
`
`Page 7 of 11
`
`PETITIONER'S EXHIBIT 1013
`
`

`

`536 Analog/Digital Conversion Chap. 11 Sec. 11.1
`
`amplifiers (one extra to allow for the bias constant, if the weighted code has
`one), and one voltage summing amplifier are required. Each TRUE bit of
`the input code word closes a switch, thereby applying a voltage that is pro-
`portional to the weight of that bit to the summing amplifier. Input bits that
`are FALSE leave their switches tied to 0. The summing amplifier adds the
`various voltages that it receives, including any fixed-bias voltage, and pro-
`duces the output voltage.
`
`EXAMPLE 11-0: Show a DAC that will operate with one digit of 8421 BCD
`code.
`
`Answer: See Fig. Ell-0.
`
`A
`
`v .ÿ-:
`
`c
`
`V
`
`(8a8+ 4a4 + 2a2+ al)V
`
`EXAMPLE 11-3 : Show tÿ
`8421 BCD code.
`
`Answers: see Fig.
`
`TENS [
`
`DIGIT
`
`V0
`
`-.---,,.-
`
`UNITSI
`DIGIT
`
`VI
`
`Figure Ell-0
`
`EXAMPLE 11-1: Show aDACfor usewith one digit of the 6, 3, 1, --1 code.
`
`Answer: See Fig. Ell-1.
`
`--oÿ iIÿv°ut = (6As+ 5A5 + A1 - A-1)V
`
`(a)
`
`VC--
`
`Figure Ell-1
`
`EXAMPLE 11-2: Show a DAC for use with one digit of the XS3 code.
`Answer: See Fig. Ell-2.
`
`A DAC of the type il
`any weighted code. The
`operational amplifier. The
`using a single voltage sou
`during the voltage summ
`differing input impedance
`summing amplifier.
`Also, special resistant
`and ladder decoder networ)
`voltage summing operatio
`DACs are given in Refs. [i
`
`J
`
`Page 8 of 11
`
`PETITIONER'S EXHIBIT 1013
`
`

`

`Chap. 11
`
`Sec. 11.1
`
`Digital-to-Analog Conversion 537
`
`ighted code has
`h TRUE bit of
`age that is pro-
`Input bits that
`plifier adds the
`dtage, and pro-
`
`Vouf
`
`3---%
`
`+4B+2C+D-3)V
`
`:it of 8421 BCD
`
`vo
`
`Figure Ell-2
`
`az+al)V
`
`EXAMPLE 11-3 :
`8421 BCD code.
`
`Show two ways to arrange a two-digit DAC for use with
`
`i" ,
`
`/i,
`
`:p 7
`i
`
`I
`
`il,
`
`lii
`i I:
`
`1
`
`i'i
`i
`
`;, 3, 1, -- 1 code.
`
`1 -A-1)V
`
`XS3 code.
`
`TENS f
`
`DIGIT
`
`UNITSf
`
`DIGIT
`
`---oÿ-ÿ- I!ÿ
`
`-'-Oÿ'-ÿ ,i:,
`
`ii,
`
`(a)
`
`Figure Ell-3a, b
`
`i'i
`(b) ::
`Ii
`
`A DAC of the type illustrated in Exs. 11-2 and 11-3 can be designed for
`any weighted code. The summing amplifier can be constructed from an
`operational amplifier. The various weighting voltages are then obtained by
`using a single voltage source and varying the gain that each input receives
`during the voltage summing process. This can be accomplished by using
`differing input impedances between the switched voltage sources and the
`summing amplifier.
`Also, special resistance networks, notably the weighted resistor network
`and ladder decoder networks, can be used to perform both the weighting and
`voltage summing operations. Details on all of these facets of the design of
`DACs are given in Refs. [2], [3], and [4].
`
`'i:l ,
`,i
`,!i
`
`,,1
`
`:ii,
`
`ii;
`
`Page 9 of 11
`
`PETITIONER'S EXHIBIT 1013
`
`

`

`538 Analog/Digital Conversion Chap. 11 See. 11.2
`
`Linear DACs can be made to operate with signed codes as well. Figure
`11-3 shows how an analog inversion amplifier (gain of --1) can be used to
`implement the conversion of a sign-and-magnitude number into its analog
`equivalent. The conversion of a sign-and-complement number is even easier,
`since the sign bit has a numerical weight just like the other bits. Figure 11-4
`shows a five-bit DAC that operates with 2's complement binary input. A simi-
`lar arrangement can be used with signed decimal numbers.
`
`Sign Bit
`
`Vdut
`
`Figure 11-3. A DAC for use with Sign-and-Magnitude
`Code
`
`Vout = (-24A5 + 23A 3 + 22A 2 + 21A 1 + 20Ao) V
`
`E '
`
`Figure 11-4. A 2's Complement DAC
`
`The nonlinear DAC generates an output voltage that is nonlinearly
`related to the magnitude of its digital input. Typical input/output relation-
`ships include logarithmic and square-root converters. These types of DACs
`are used in special-purpose situations. Their design is not discussed herein.
`Of major concern to the digital designer is the widening availability of
`DACs that are preengineered and packaged as complete conversion systems
`(Refs. [1] and [5]). These devices offer low cost and standardization. Most
`commercially available DACs are designed for use with binary or 8421
`BCD input. This may require some code conversion prior to the input to
`the DAC. The component parts of the DAC, e.g., the voltage switches,
`
`the weighting resistance 1
`able as predesigned comlÿ
`components into a "custÿ
`
`11.2 Analog-to-Digital C
`
`The analog-to-digital co
`digital-to-analog conversi:
`ponent part of their oper;
`is shown in Fig. 11-5. Thÿ
`
`Input ,',
`
`/.
`
`Figure 11-5. A Generalized
`
`the common jargon, is ar
`with the output from a Dt
`comparator, which is usua
`output, C, assumes one
`and assumes the other vol
`The logical control s5
`comparator to determine
`the DAC. This code is inc
`with the voltage input witt
`than the quantization uni
`require a more complex D
`conversion.
`The key to the opera
`logic seeks to find the dil
`voltage. There are severa
`between operational useful
`zation of each of these typ
`
`11.2.1. The RampAD
`in Fig. 11-6. The DAC is
`that is compatible with th
`counter being reset to 0. Th
`ter, with the counting col
`
`Page 10 of 11
`
`PETITIONER'S EXHIBIT 1013
`
`

`

`L!
`
`I ,
`
`!
`
`]:t:,'
`iiI,
`
`i
`
`Ji
`
`,
`il
`' j
`
`Chap. 11
`
`Sec. 11.2
`
`Analog-to-Digital Conversion 539
`
`s well. Figure
`an be used to
`ato its analog
`is even easier,
`:s. Figure 11-4
`input. A simi-
`
`the weighting resistance networks, or the summing amplifier, are also avail-
`able as predesigned components. Thus, a designer can assemble off-the-shelf
`components into a "customized" DAC.
`
`11.2 Analog-to-Digital Conversion
`
`The analog-to-digital conversion process is closely related to its inverse,
`digital-to-analog conversion. In fact, almost all ADCs use a DAC as a com-
`ponent part of their operational hardware. A general diagram for an ADC
`is shown in Fig. 11-5. The voltage that is to be converted, or digitized, to use
`Input ,Voltage
`
`"l DIGITAL }C
`-!
`VOLTAGE
`COMPARATOR
`CODE WORD [
`SELECTION
`LOGIC
`
`•I DACÿ ÿ'i I
` V0ut
`
`Vx I
`II
`
`II
`
`IIII
`
`I Ii
`
`i,ÿ
`,i I:
`
`iil
`
`!i
`
`='iili
`
`:I
`
`L,I
`ii
`
`Figure 11-5. A Generalized ADC
`
`Digital Output
`
`the common jargon, is applied to the ADC. This voltage, Vx, is compared
`with the output from a DAC, Vout. The comparison device is a digital voltage
`eomparator, which is usually a high-gain differential amplifier whose logical
`output, C, assumes one of the two logical voltage levels when V, < Vout
`and assumes the other voltage level when Vx > Vout.
`The logical control system of the ADC uses the output signal from the
`comparator to determine how to change the digital code word that is driving
`the DAC. This code is increased or decreased until the DAC output agrees
`with the voltage input within some tolerance. This tolerance can be no better
`than the quantization unit of the DAC. Thus, a more accurate ADC will
`require a more complex DAC and will probably take more time to make its
`conversion.
`The key to the operation of the ADC is the way in which its control
`logic seeks to find the digital code that most closely represents the input
`voltage. There are several common techniques, each offering a trade-off
`between operational usefulness and hardware complexity. The basic organi-
`zation of each of these types is that shown in Fig. 11-5.
`
`11.2.1. The Ramp ADC. The block diagram for a ramp ADC is shown
`in Fig. 11-6. The DAC is driven by an up-counter that counts in the code
`that is compatible with the DAC. The conversion process begins with the
`counter being reset to 0. The system clock is then used to increment the coun-
`ter, with the counting continuing until the output of the DAC becomes
`
`I + 2°Ao) V
`
`is nonlinearly
`utput relation-
`:ypes of DACs
`cussed herein.
`availability of
`rersion systems
`clization. Most
`finary or 8421
`:o the input to
`ltage switches,
`
`i!"
`
`) ::
`
`Page 11 of 11
`
`PETITIONER'S EXHIBIT 1013
`
`