EXHIBIT 1046
`
`U.S. PATENT NO. 4,681,440 TO BURKE et al.
`
`(“BURKE”)
`
`TRW Automotive U.S. LLC: EXHIBIT 1046
`PETITION FOR INTER PARTES REVIEW
`OF U.S. PATENT NUMBER 8,599,001
`IPR2015-00436
`
`

`
`United States Patent
`
`[19]
`
`[11] Patent Number:
`
`4,681,440
`
`Burke et al.
`
`[45] Date of Patent:
`
`Jul. 21, 1987
`
`[54] HIGH-SENSITIVITY CID
`PHOTOMETER/RADIOMETER
`
`[56]
`
`References Cited
`U_S_ PATENT DOCUMENTS
`
`[75]
`
`_
`Inventors: Hubert K. Burke, Scotia; Gerald J.
`Michon’ Waterford’ both of NY’
`
`Assignee: General Electric Company,
`Schenectady, NY.
`
`APPL N04 7999053
`
`Filed:
`
`Nov. 18, 1985
`
`Int. Cl.4 ....................... .. G01J 1/44; H01L 27/14
`U.S. C1. .............................. .. 356/218; 250/211 R;
`357/24; 357/30
`Field of Search .................. .. 356/218; 250/211 R,
`250/211 J; 357/30, 24 LR
`
`........ .. 357/30
`1/1974 Michon
`3,786,263
`9/1976 Kim .............................. .. 357/24 LR
`3,983,395
`Primary Examiner—R. A. Rosenberger
`Attorney, Agent, or Firm—Geoffrey H. Krauss; James C.
`Davis, Jr-; Ma1’ViI1 Snyder
`[57]
`ABSTRACT
`A high-sensitivity photometer/radiometer uses a single-
`pixel charge-injection-device (CID) light-sensitive sen-
`sor, and associated circuitry for: non-destructively read-
`ing-out the sensor charge level; for summing signals
`proportional to the charge level signal; and for then
`displaying the level. With cooling of the CID sensor,
`the sensitivity of the photometer can be sufficient to
`read incident flux levels on the order of several photons
`per second.
`
`26 Claims, 10 Drawing Fighres
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`DOUBLE
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`3/G/V/M5
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`1046-001
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`U. S. Patent
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`Jul. 21,1987
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`Sheetl of3
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`4,681,440
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`DOUBLE
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`.3/6/V/M5
`SEO!/E/VCEP
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`111152111
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`--Ii----’
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`XXIIIISI I
`I 11111111 0
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`11111111
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`--1-1111
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`E————————
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`P111111 1
`———————— _
`FXHI-—“
`———————— .
`P1111111
`11111111 0
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`U. S. Patent
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`Jul. 21, 1987
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`Sheet2 of3
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`4,681,440
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`U. S. Patent
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`Jul. 21,1987
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`Sheet3 of3
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`1
`
`HIGH-SENSITIVITY CID
`PHOTOMETER/RADIOMETER
`
`BACKGROUND OF THE INVENTION
`
`invention relates to optical radiation
`The present
`measurement apparatus commonly known as a photom-
`eter or radiometer and, more particularly, to a novel
`high-sensitivity photometer/radiometer utilizing a sin-
`gle-pixel chargeinjection-device (CID) and associated
`circuitry, for sensing optical radiation magnitudes less
`than 10E-l4 watts/cml.
`It is well known to provide optical radiation measure-
`ment apparatus utilizing a solid—state sensor, such as a
`silicon diode detector and the like, or a vacuum tube
`sensor, such as photomultiplier and the like. It is known
`that a silicon diode detector can measure irradiance
`levels as low as about 10E-9 watts/cm2, and that photo-
`multiplier systems can measure irradiance levels as low
`as about 10E-12 watts/cmz. A photometer using prior
`sensors and having a sensitivity of this order is not only
`expensive and complex, but will still also have a mini-
`mum sensed irradiance level which is equivalent
`to
`about 3E+7 photons per second per square centimeter.
`This minimum level is about 7 orders of magnitude
`greater than the desired ultimate sensitivity of a photo-
`metric device, i.e. a sensitivity approaching 1 photon
`per second per square centimeter is highly desirable.
`Thus, in the photonics field, wherein precise measure-
`ment of optical radiation is of great importance, even a
`one orderof-magnitude increase of sensitivity over the
`common photomultiplier sensitivity level of 10E-l2
`watts/cmz is not only significant, but highly desirable.
`BRIEF DESCRIPTION OF THE INVENTION
`
`15
`
`30
`
`In accordance with the present invention, a high-sen-
`sitivity charge-injection-device (CID) photometer/-
`radiometer apparatus uses: a single-pixel CID optical
`radiation sensor which has three surface-coupled con-
`ductorinsulator-semiconductor (CIS) capacitors and a
`gate region in electrical series connection, and wherein
`each capacitor comprises at least one narrow, elongated
`electrode; and associated circuitry for non-destruc-
`tively reading out the charge stored in the sensor at a
`selected sampling rate, for summing the sensor output
`signal samples over a predetermined time interval, and
`for converting the summed signal to a display of the
`magnitude of the radiant energy intercepted by the
`sensor. Relatively modest cooling of the sensor (as by a
`Peltier cooler; liquid nitrogen (LN2) or the like) is desir-
`able.
`
`In a presently preferred embodiment of our high-sen-
`sitivity photometer/radiometer apparatus,
`the CID
`optical radiation sensor utilizes one of the three MOS
`capacitors as a drain, both for removing charge after
`termination of each readout cycle, and also as a means
`for introducing a bias charge prior to the beginning of
`the next-subsequent sensing cycle; this bias charge in-
`troduction alleviates some of the sensitivity limitations
`caused by dark-current shot noise, interface states, and
`the like, when operating the sensing CID device at
`reduced temperatures. The remaining pair of MOS
`capacitors utilize electrodes having a plurality of inter-
`connected extended finger portions.
`According, it is an object of the present invention to
`provide novel high-sensitivity charge-injection device
`photometer-radiometer apparatus.
`
`60
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`2
`This and other objects of the present invention will
`become apparent upon reading the following detailed
`description of a presently-preferred embodiment of the
`invention, when considered in conjunction with the
`drawings.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1 is a schematic block diagram of one presently
`preferred embodiment of the photometer/radiometer
`apparatus of the present invention;
`FIG. 2 is a schematic plan view of the lightadmitting
`surface of one embodiment of the sensor, and useful in
`appreciating several characteristics of the sensor;
`FIGS. 2a—2f are three pair of plan/sectional views of
`the sensor, during various steps in the manufacture
`thereof, and are useful in appreciating construction of
`the sensor;
`FIG. 3 is a schematic sectional view through the
`sensor, conjunction with the associated circuitry for
`forming an output signal therefrom, and useful in appre-
`ciating sensor operation; and
`FIG. 3a is a graphic illustration of the sensorand-
`charge amplifier output signal waveform, also useful in
`appreciating certain operational characteristics of the
`apparatus.
`
`DETAILED DESCRIPTION OF THE
`INVENTION
`
`Referring initially to FIG. 1, a presently preferred
`embodiment of our high-sensitivity photometer/radi-
`ometer apparatus 10 utilizes a single-pixel light-sensitive
`charge injection device (CID) sensor 11, and associated
`electronic circuitry 12 for reading out from the sensor a
`signal proportional to the number of photons (CD) impin-
`gent upon a sensing surface 11a of the sensor 11. Sensor
`11 may be in contact with, or enclosed by, a cooling
`means 11+, such as a Peltier cooler, a dewar of liquid
`nitrogen and the like, for lowering the physical temper-
`ature of the sensor, to reduce dark current and the like
`deleterious signals in manner known to the art.
`Sensor 11 receives a drain D signal at a first input 11b,
`receives a row R signal at another input 11c, and re-
`ceives a gate G signal at a third input 11d. A column C
`signal is provided at an output lle of the sensor. The
`charge caused to flow in the C output is converted to a
`voltage by a charge amplifier means 14, having an oper-
`ational amplifier 14a receiving the column C output
`signal at a first, inverting input 14a-1 and receiving a
`reference voltage (e.g. voltage ~—V2) at a second, non-
`inverting input 14a-2. An integrating capacitor 14b, of
`magnitude C1,
`is connected between first input 14a-1
`and the operational amplifier output 14a-3. A resetting
`switch means 14c is connected across capacitor 14b.
`The amplifier 14 output signal voltage V0 is applied to
`the input 15a of a gain amplifier means 15, which pro-
`vides its output 15b signal to the input 16:1 of a correlat-
`ed-double-sample means 16. Means 16 operates, in man-
`ner known to the art, upon each pair of consecutive
`signals provided to input 16a to provide a correlated
`signal, at means output 161), in which: certain otherwise-
`deleterious noise phenomena are eliminated; apparatus
`dynamic range is increased; and like benefits are real-
`ized. The signal at output 16b is provided to the input
`17a of a sample and hold (S&H) means 17, which also
`receive a sample S signal at a sampling input 17b. Re-
`sponsive to the sample S signal being in a predetermined
`state, means output 17c has an analog signal provided
`thereat with the amplitude of the signal at input 17a at
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`the termination of the sample S signal at sampling input
`17b. This “held” analog signal sample is provided to the
`analog input 18a of an analog-to-digital converter
`(ADC) means 18. Responsive to a conversion C’ signal
`at a conversion control input 18b of the ADC means,
`the level of the analog signal then at analog input 18a is
`digitized, to appear as a parallel digital data word of M
`data bits at a digital output 18c. Typically, M= 14 paral-
`lel data bits may be utilized and ADC 18 may be a
`standard 16-bit unit (with the output having an over-
`range bit and a generally-unused polarity bit). Each
`M-bit-wide digital data word is provided to the digital
`data input 19:: of an accumulator means 19. The digital
`data word provided at an output 19b of the accumulator
`is the sum of the input digital data words provided after
`a zeroing signal Z has appeared at a first control input
`19c; each updating of the accumulator output 19b is
`carried out (after the associated preceding zero Z sig-
`nal) responsive to an accumulate A signal provided at a
`second control input 19:2’. The accumulated digital data
`output 19b provides a data word of N bits (with N
`typically being greater than 20 bits) to the data input
`20:1 of a data readout means 20. The data presently
`being provided to input 20a is provided in human-view-
`able form on the readout 20, except when a display
`blanking B signal is provided at a readout control input
`20b.
`
`A clock signals sequencer means 21 utilizes standard
`sequential logic and the like, to provide all of the re-
`quired drain D, row R, gate G, reset/zero Z, sample S,
`conversion C’, accumulator zero Z’ and add A, and
`display blanking B signals in accordance with some
`predetermined set of amplitude and timing characteris-
`tics. Means 21 has an input 21a for receiving a READ
`signal from an apparatus input 10:1, and thence provid-
`ing a multiplicity of sequential timing signals, including:
`the drain D signal at a first sequencer output 21b; the
`row R signal at a second sequencer output 21c (which
`row R signal may be buffered by an additional buffer
`amplifier means 22); the gate G signal at a third output
`21d (which gate G signal may be buffered by another
`buffer means 23); the charge amplifier integration ca-
`pacitance reset/zero Z signal at a fourth output 21a, to
`temporarily close switch means 14c at a required time
`and for a desired time interval; the sample S signal at a
`fifth output 21/? the conversion C’ signal at a sixth out-
`put 21g; the accumulate A signal at a seventh output
`21h; the accumulator zeroing Z’ signal at an eighth
`output 21i; and the readout blanking B signal at a se-
`quencer ninth output 21g. The general timing and am-
`plitude characteristics of these signals will become more
`apparent in the operational description of the system,
`hereinunder.
`__
`Referring now to all of FIGS. 2 and 2a—2fi the high-
`sensitivity CID photon sensor 11 is fabricated upon a 55
`substrate 30 (FIG. 2b) of a first-conductivity type of
`semiconductive material, such as P+ type silicon and
`the like. A lead 32 is provided for electrical connection
`to substrate 30. Upon a first major substrate surface 30a,
`to be positioned toward the source of photons <l>, an
`epitaxial layer 34 is fabricated of a second conductivity
`type of the semiconductor material, such as N type
`silicon. Lead means 36 is provided for electrical connec-
`tion to the epitaxial EPI layer; the layer-substrate junc-
`tion, at or adjacent to surface 30:1, will be reverse-biased
`when the sensor is in operation. The surface 34:1 of the
`epitaxial layer, furthest from the substrate layer surface
`30a, is levelled and a rectangular drain pattern of the
`
`4
`first conductivity-type of the semiconductor material,
`e.g. P+ silicon,
`is provided as a drain formation 38
`therein. The drain formation inner periphery 38:1 (best
`seen in FIG. 2:1) substantially defines the photon-col-
`lecting area of the one-pixel CID sensor 11; suitable
`pixel length L and pixel height H dimensions may be
`chosen to provide a predetermined total sensor active
`area related to the drain inner periphery area LxH.
`Drain lead means 40 is provided for electrical connec-
`tion to the drain electrode formation. It should be un-
`derstood that drain formation 38 need not be a continu-
`
`ous channel, implant or other region in the epitaxial
`layer, but may be temporarily broken at various loca-
`tions as necessary for placement of the other electrodes
`(to be described hereinbelow), but with the various
`pieces of the drain region being later electrically con-
`nected together, as by metallization and the like known
`means, to provide a peripheral region essentially-con-
`tinuously maintained at the drain potential, for defining
`the active photon—collection area of the sensor, Simi-
`larly, it should be understood that, while a rectangular
`sensor active region is illustrated,
`the active sensing
`region can be square, circular, triangular or of any gen-
`eral shape, in accordance with the particular require-
`ments of the photometer/radiometer apparatus 10 in
`which the sensor 11 is to be used. Thus drain region 38
`may have a substantially square aspect, as shown in
`broken line below the surface of insulative layer 42 in
`FIG. 2. After fabrication of drain portions 38 and at-
`tachment of lead means 40 thereto, a thin layer 42 of an
`insulative material, such as silicon dioxide SiO2 or the
`like, is formed upon the outer surface 40a of the semi-
`conductor. The insulative layer 42 itself has an outer
`surface 42a upon which additional portions of the sen-
`sor II will be fabricated.
`At least one gate electrode 44 (FIGS. 2, 2c and 2:1) is
`fabricated (typically of polysilicon) upon the insulative
`layer surface 42a. Gate electrode 44 may be a single
`elongated element, as shown in FIG. 2c, or may have a
`plurality of substantially parallel “finger” portions 44a-
`1, 440-2, .
`.
`.
`, 44:1-g, .
`.
`.
`, 44:1-8 as shown in FIG. 2. If
`more than one elongated gate finger portion 44a is uti-
`lized, a common electrode end portion 44b connects one
`end of each of the narrow fingers to a similarly situated
`end of all other gate fingers, and thence to -a gate elec-
`trode common connection portion 44c. A gate lead
`means 46 is connected to gate electrode portion 44c for
`coupling of gate signals to and from the date electrode.
`A row electrode 48 is provided in substantially the
`same plane as the gate electrode, and is, in manner simi-
`lar to the gate electrode, situated upon the surface 42:1
`of the thin insulative layer. The row electrode (also
`typically of polysilicon) is fabricated with a plurality of
`narrow elongated finger portions 48:: which are sub-
`stantially parallel: to one another; to the gate electrode
`finger portion(s); and to associated sides of the drain
`electrode 38. Row electrode 48 has one more finger
`portion than the number of finger portions in the illus-
`trated gate electrode; thus, in the single gate electrode
`embodiment of FIG. 2c, the row electrode has a pair of
`thin, elongated and substantially parallel finger portions
`48a-1 and 48:1-2. In the embodiment of FIG. 2, wherein
`the gate electrode has eight finger portions, the associ-
`ated row electrode finger portions 48:1-1, 48a-2,
`.
`.
`.
`,
`48:1-r, .
`.
`. 48a-9 are all substantially parallel to the gate
`electrode fingers portions of sensor 11’. Each of the
`plurality of row electrode finger portions 48a are con-
`nected at an associated end thereof, opposite to the
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`to the sensor output signal voltage V0. These charge
`carriers (as carriers 66, 68 or 70) are stored in, or trans-
`ferred into or out of, one or more of a plurality of poten-
`tial wells formed beneath the sensor electrodes. A first
`potential well 72 is formed beneath the column elec-
`trode 54, while another potential well 74 is formed
`beneath row electrode 48. While both wells 72 and 74
`
`5
`associate connected ends of the gate electrodes, by a
`common row electrode portion 48b. A row electrode
`connection portion 48c extends from end portion 48b, in
`a direction opposite to the direction in which the gate
`electrode connection portion 44c extends from end
`portion 44b. A row electrode lead means 50 is con-
`nected to row electrode extension portion 48c. The
`number of row electrode finger portions (and, there-
`fore, the number of gate electrode finger portions) is
`established by the row electrode spacing distance S, (see
`FIGS. 2 and 2c) which is selected to be as large as possi-
`ble, but consistent with the diffusion length of charge
`carriers, e.g. holes, in the semiconductor material being
`utilized. By maximizing the spacing S, between the
`elongated narrow electrodes, consistent with minority
`carrier diffusion length, a minimum amount of the pixel
`area is occluded by the electrodes, thereby maximizing
`apparatus photon sensitivity.
`A second insulative layer 52 is now provided upon all
`of the upper surface of the gate and row polysilicon
`electrodes and at least adjacent portions of the remain-
`ing first insulative layer upper surface 42a. Thereafter, a
`second formation of polysilicon is deposited (FIGS. 2e
`and 2f) to form a column electrode 54 upon the second
`insulative layer surface 52a. Column electrode 54 com-
`prises a plurality of narrow and elongated finger por-
`tions 54a extending substantially perpendicular to the
`elongated extension directions of the gate electrode
`finger portions 44a and the row electrode finger por-
`tions 48a. A first column electrode connection portion
`54b-1 connects all aligned first ends of the column elec-
`trode finger portions 54a and a second column elec-
`trode connection portion 54b-2 connects all aligned
`second ends of the same finger portions. Interconnec-
`tion of all first ends and interconnection of all second
`ends of the column electrode finger portions is highly
`desirable to minimize the distance that carriers must
`travel during collection in the readout process. The
`spacing between each adjacent pair of the plurality of
`column electrode finger portions 54a is a spacing dis-
`tance Sc again established by the charge carrier, e.g.
`hole, diffusion length at the sensor operating tempera-
`ture. It will be seen that the column electrode, as a
`minimum, will include a pair of finger portions 54a-1
`and 54a-2, as in the sensor of FIG. 2e, and can include
`a much larger number, illustratively 9, of column elec-
`trodes 54a-l, .
`.
`.
`, 54a-k, .
`.
`.
`, 54a-9, with the far ends
`thereof connected by a first connection portion 54b-1
`and the near ends connected by a different connection
`portion 54b-2. A column electrode connection 54c ex-
`tends from portion 54b-2. Lead means 56 is electrically
`connected to the column electrode connection portion
`54a. A thin insulative protective layer 58 is fabricated at
`least over the column electrode 54 portions and adja-
`cent areas of second insulative layer upper surface 52a.
`Referring now to FIGS. 3 and 3:1, in operation, sensor
`11 and the associated charge amplifier means 14 (which
`can be analyzed as if an output switch 14d allows the
`charge in an equivalent output element 60, of capaci-
`tance C2, to charge and thus charge the voltage V0’
`thereacross) operates as follows: Sensor 11 is so posi-
`tioned that incident photons <1) will travel through the
`insulative layers and the semitransparent polysilicon
`column, row and gate electrodes and enter the epitaxial
`layer 34 within the drain region, to form a pair of elec-
`trons 62 and holes 64 (i.e. oppositely-charged charge
`carriers). One of the types of carriers, here holes 64, are
`be collected and subsequently readout for contribution
`
`the
`the relationship of
`are continuously present,
`“depth” of each of these wells changes. Well 74 may be
`formed to a first, rather shallow depth 76 (indicated in
`chain line), as by application of a first potential (e.g.
`—V1), which depth is less than the depth of potential
`well 72, corresponding to the magnitude of another
`voltage (e.g., ——V2) applied to column electrode 54. A
`voltage —-V1 of about -3.5 volts and a voltage —V2 of
`about -8 volts may be utilized in a sensor having the
`illustrated polarity-type semiconductor substrate and
`epitaxial layers, with the epitaxial layer connection 36
`being held at about zero volts, and with the substrate
`lead 32 being held at a voltage (e.g. about -5 volts) to
`maintain a reverse bias across the substrate-epitaxial
`layer junction. During the time interval, e.g. time inter-
`val T,,, when the first voltage (—V1) is present on row
`electrode 48, the column potential well 72 has a greater
`depth than the depth of row potential well 76, whereby
`the positive charge 68 flows as shown by arrow 760,
`into column potential well 72, raising the level of charge
`66 therein to level 77. The transfer of charge into well
`72 is equivalent to causing a current I to flow through
`lead 56; this charge must come from the operational
`amplifier output 14a-3, through capacitor 14b, if reset
`switch 14c is open. Thus, a flow of charge from the
`relatively shallow row well 76 to the column well 72
`causes the amplitude of the voltage across capacitor 60
`(if switch 14d is closed), to increase during the “read”
`time Ta. During a storage time T1, (comprising the re-
`mainder of a row cycle time At), the row electrode 48 is
`held at a greater potential (e. g. due to the more negative
`voltage —V3) than the column electrode potential. The
`row storage voltage —V3 may have a value of -16
`volts in the illustrative example. As the potential well 74
`is now deeper than the column potential well level, the
`carrier holes 66 will now flow, as illustrated by arrow
`78:1, to the deeper (more negative) well 74 until charges
`70 have all been re-stored in the row potential well,
`raising the charge level thereof to a level 78. When the
`row well potential is again raised to —V1 volts, the
`bottom of this well is again raised to level 76, providing
`potential energy to the carriers for a next read cycle
`transition, along arrow 76a, into the column potential
`well 72. Since each of carriers 66/68/70 is provided
`responsive to the photon impinging upon the epitaxial
`layer 34, each additional carrier now present for trans-
`fer during the next read time interval causes the charge
`amplifier means output voltage V0’ to increase, if the
`reset switch 14c is open and the output—connect switch
`14a’ is closed.
`Drain region 38 has a very deep potential well 80
`provided therein by connection of a relatively large
`magnitude voltage —V5, e.g. about -18 volts DC in
`the illustrative embodiment. Typically, the drain poten-
`tial is operative as long as the sensor is in use. The col-
`umn and row potential wells 72 and 74 are separated
`from drain potential well 80 by a region in which a gate
`potential well 85 is provided responsive to the potential
`on gate electrode 44. During the normal store/read
`charge movement cycle in potential wells 72 and 74,
`gate electrode 44 receives a substantially zero magni-
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`tude potential, such that the gate potential well thereun-
`der is at a level 86 substantially equal to the potential,
`e.g. zero volts, placed upon epitaxial layer 34. Respon-
`sive to this substantially zero magnitude potential, the
`substantially-zero depth of potential well 85 forms a 5
`barrier between wells 72/74 and drain well 80, such that
`carriers 66, 68 or 70 cannot be drawn into well 80. After
`a number, typically predetermined, of store/read cy-
`cles, the stored charges are moved and drained by pro-
`viding a potential of magnitude —V4, greater than the
`greatest magnitude row potential (—V3) but less than
`the drain potential (——V5), to reduced the bottom level
`87 of gate well 85 to a level less than the bottom level of
`column well 72 and greater than drain well 80. Thus,
`when the level in row well 74 is raised to the “upper" 15
`level 76, most of electrons 68 travel, as shown by arrow
`76a, into column well 72, are then drawn, as shown by
`arrow 87a, into the somewhat deeper gate well 85, and
`then are typically drawn, as shown by arrow 80a, into
`drain region 80 and then conducted out drain lead 40. A 20
`number of row well cycles, between upper and lower
`levels 76 and 78 can be used to conduct substantially all
`of the photon-responsive charges out of the substrate.
`The drain time interval ends when the voltage on gate
`electrode 44 again rises to substantially zero volts (at
`time t1) and the potential 85 returns to the substantially
`zero depth level 86, removing the opportunity for
`charges 66 to travel from well 72 to drain 80. The depth
`of well 85 can be so arranged as to leave some small
`portion of the carriers in well 72 to provide a net posi- 30
`tive charge therein at the cessation of the drain time
`interval (between time to and time t1) which small net
`positive charge is preselected to keep interface states
`charged and substantially zero-out deleterious charge
`phenomena (dark current and the like) expected during
`the store/readout cycles until the next drain interval
`occurs.
`
`The complete time sequence for apparatus 10 thus has
`a cycle commencing at time to, when the gate G signal
`falls from its normally-low value (e. g. about zero volts)
`to a relatively high potential amplitude (the — V4 condi-
`tion, e.g. about -17 volts) to commence the charge
`removal, or drain, state. In the drain state time interval
`from time to through time t1, e.g. about 12 milliseconds
`in one embodiment, a relatively large number of the
`periodic storage/read cycles (having a typical
`time
`interval At of about 100 microseconds) of the row signal
`occur. During each read time interval ta, an opportunity
`is furnished for charge 68 to flow out of row well 76,
`through column well 72 and gate well 85, into drain 80
`' and are thence removed from the sensor. As best seen in
`FIG. 3a the number of charge carriers abruptly de-
`creases, as shown by the abrupt rising portion 90a of the
`output voltage V0’ curve, at the beginning time to of the
`drain interval. Substantially all of the carriers have
`drained from wells 72 and 74 at the end of drain portion
`92a, at time t1. Only the pre-bias charges are now left.
`At this time, the gate potential returns to the first gate
`potential level (e.g. about zero volts) and any carriers
`trapped in well 85 divide between column well 72 and
`the drain, as the gate well level returns to the substan-
`tially zero level 86; the charge amplifier output voltage
`Vo’ therefore responds with an increasing amplitude
`portion e.g. negative-going portion 94a. The actual
`measurement time interval TM commences at time t1
`and lasts until the time to’, at which time the next reset-
`ting drain interval commences with rising portion 90b.
`During the measurement time interval, i.e. between the
`
`8
`rising edge of a first gate signal pulse and the falling
`edge of the next gate pulse, a multiplicity of store/read
`charge transfer time intervals At occur. Typically, the
`measurement time interval TM is one second, where
`l0E+4 cycles of the lOE—4 second duration store/-
`read cycle of the row signal waveform occur therein.
`The charge amplifer output voltage V0’ amplitude will
`change by an amount AV which is equal to an integer
`number n, where n equals 0,
`l, 2, 3,
`.
`.
`.
`, times the
`voltage increment provided by a
`single photon-
`generated carrier (e.g., a hole) being intercepted by the
`single pixel of the sensor and converted into a charge
`stored and subsequently readout from wells 72 and 74.
`In the measurement interval TMin the left-hand portion
`of FIG. 3a,
`the staircase-like charge amplifier output
`signal waveform portion 96a illustrates the effect of a
`relatively large incident photon flux, wherein the out-
`put signal change AV occurs in each of the multiplicity
`of read-store cycle time intervals AT, such that the
`portiorL96a hits a maximum amplitude saturation por-
`tion 98a, at an output voltage of —V5A rat a time ts prior
`to the end of the measurement interval. The saturation
`of the system, responsive to the relatively high incident
`flux, continues until the time to’ at which the next reset-
`ting-drain/cycle occurs. As seen in the second cycle,
`the measurement time interval TM’ beginning at time t1.’
`at the end of charge removal portion 9217, includes a
`staircase portion 96b in which reception of a lesser
`photon flux occurs, so that it is only a plurality of the
`read/store cycles, e.g. in a time interval kAt (where k is
`an integer much greater than 1, for the illustrated situa-
`tion) that the minimum staircase portion voltage change
`AV occurs. The slower change in output voltage V0’
`allows a non-saturation minimum voltage, at a point 97,
`to be reached at the commencement time to” of a next-
`subsequent operation cycle. With the accumulator zero-
`ing Z signal and display blanking B signal occurring
`during the drain portion pulse, from time to to ti, and the
`train of sequencer outputs 21f—21h pulses (including the
`sampling S pulse, followed by the conversion C’ pulse
`and the accumulation A pulse) all occurring in sequence
`in selected ones of the storage time intervals T1,, the
`total number of photons irradiating the sensor in the
`measurement period TM, TM’, .
`.
`.
`, is thus displayed at
`the end of each measurement interval.
`Our novel high-sensitivity charge-injection-device
`photometer/radiometer has been described with re-
`spect to one presently preferred embodiment. Many
`modifications and variations will now become apparent
`to those skilled in the art. For example,
`the N-type
`epitaxial
`layer of the illustrated embodiment can be
`modified to N-type bulk semiconductor material; rever-
`sal of impurity types, e.g. P+ to N+ and N to P, can be
`equally as well utilized with either structure. It is our
`intent, therefore, to be limited only by the scope of the
`appending claims, and not by way the specific details
`and instrumentalities presented by way of explanation
`of the one presently preferred design, described herein.
`What we claim is:
`
`1. Apparatus for sensing at least the amplitude of
`incident optical radiation, comprising:
`a charge-injection device (CID) sensor having a sin-
`gle pixel, including (1) a drain potential well delim-
`iting a photon-responsive area from which charge
`carriers, formed responsive to impingent photons
`of said optical radiation, can be collected, (2) a
`column potential well in which said carriers are
`collected, (3) a row potential well, and (4) a gate
`
`1046-008
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`1046-008
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`4,681,440
`
`9
`electrode positioned between said drain well and
`said column and row wells for respectively con-
`necting and disconnecting said drain well and said
`column potential well responsive to respective first
`and second states of a gate signal to respectively 5
`allow and prevent removal of said charge carriers
`to said drain well from at least said column well;
`means for reducing the operating temperature of said
`CID sensor;
`'
`sequencer means for
`first permanently removing
`charge carriers from said column and row potential
`wells at least via said drain well, in a charge re-
`moval time interval at the commencement of each
`of at least one optical radiation sensing time inter-
`val, and for then causing, for a predetermined num-
`ber, on the order of 10,000, of cycles in each sens-
`ing time interval, charge carriers present in said
`column and row wells during each of said cycles to
`repeatedly and non-destructively move between
`said column and row wells in a predetermined
`manner; and
`means for converting a charge current, resulting from
`each of said charge carrier movement cycles, toa
`human-viewable display of the amplitude of said
`optical radiation incident upon said sensor, with a
`sensitivity of at least 10E-14 Watts/cmz, and com-
`prising:
`(a) charge amplifier means for converting the
`charge current to the amplitude of a signal repre-
`sentative of the total charge then in said sensor
`pixel;
`(b) correlated double sampling means for providing
`an output signal in which is cancelled from the
`amplitude thereof contributions by portions of 35
`the total charge in said pixel not responsive to
`photons of said inciden