Élan™SC400 and ÉlanSC410
`Single-Chip, Low-Power,
`PC/AT-Compatible Microcontrollers
`
`DISTINCTIVE CHARACTERISTICS
`Élan™SC400 and ÉlanSC410
`Microcontrollers
`n E86TM family of x86 embedded processors
`– Offers improved time-to-market, software
`migration, and field-proven development tools
`n Highly integrated single-chip CPU with a complete
`set of common peripherals
`– Accelerates time-to-market with simplified
`hardware
`– Low-power 0.35-micron process technology
`– Single chip delivers smallest system form factor
`– 33-MHz, 66-MHz, and 100-MHz operating
`frequencies
`n Am486® CPU core
`– Robust Microsoft® Windows® compatible CPU
`– 8-Kbyte write-back cache for enhanced
`performance
`– Fully static design with System Management
`Mode (SMM) for power savings
`n Comprehensive power management unit
`– Seven modes of operation allow fine-tuning of
`power requirements for maximum battery life
`– Provides a superset of APM 1.2 features
`n Glueless burst-mode
`ROM/Flash memory/SRAM interface
`– Reduces system cost by allowing mask ROM and
`Flash memory at the same time with three ROM/
`Flash memory/SRAM chip selects
`n Glueless DRAM controller
`– Allows mixed DRAM types on a per-bank basis to
`reduce system cost
`n VESA Local (VL) bus and ISA bus interface
`– Reduces time-to-market with a wide variety of off-
`the-shelf companion chips
`
`n Standard PC/AT system logic
`(PICs, DMACs, timer, RTC)
`– DOS, ROM-DOS, Windows, and industry-
`standard BIOS support
`– Leverages the benefits of desktop computing
`environment at embedded price points
`n Bidirectional parallel port with Enhanced
`Parallel Port (EPP) mode
`n 16550-compatible UART
`n Infrared port for wireless communication
`– Standard and high-speed
`n Keyboard interface
`– Matrix keyboard support with up to 15 rows and 8
`columns
`– SCP-emulation mode for PC/AT and XT
`keyboard support
`ÉlanSC400 Microcontroller Only
`The ÉlanSC400 microcontroller includes the following
`additional features designed specifically for mobile
`computing applications. The ÉlanSC410 microcontrol-
`ler does not include these features.
`
`n Dual PC Card (PCMCIA Version 2.1) controller
`supports 8- or 16-bit data bus
`– End-user (after-market) system expansion
`– ExCA-compliant, 82365-register set compatible
`– Leverages off-the-shelf card and socket services
`– Supports DMA transfers between I/O PC cards
`and system DRAM
`n LCD graphics controller
`– Supports monochrome and 4-bit color Super
`Twisted Nematic (STN) LCDs
`– Unified Memory Architecture (UMA) eliminates
`separate video memory
`
`© Copyright 1998 Advanced Micro Devices, Inc. All Rights Reserved.
`Advanced Micro Devices, Inc. (“AMD”) reserves the right to discontinue its products, or make changes in its products, at any time without notice.
`The information in this publication is believed to be accurate at the time of publication, but AMD makes no representations or warranties with respect to the accuracy or completeness of the
`contents of this publication or the information contained herein, and reserves the right to make changes at any time, without notice. AMD disclaims responsibility for any consequences resulting
`from the use of the information included in this publication.
`This publication neither states nor implies any representations or warranties of any kind, including but not limited to, any implied warranty of merchantability or fitness for a particular purpose.
`AMD’s products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other applications intended to support
`or sustain life, or in any other application in which the failure of AMD’s product could create a situation where personal injury,
`death, or severe property or environmental damage may occur. AMD assumes no liability whatsoever for claims associated with
`the sale or use (including the use of engineering samples) of AMD products except as provided in AMD’s Terms and Conditions
`of Sale for such product.
`
`Publication# 21028 Rev: B Amendment/0
`Issue Date: December 1998
`
`SCEA Ex. 1051 Page 1
`
`

`
`GENERAL DESCRIPTION
`The Élan™SC400 and ÉlanSC410 microcontrollers
`are the among the latest in a series of E86™ family
`microcontrollers, which integrate proven x86 CPU
`cores with a comprehensive set of on-chip peripherals
`in a 0.35-micron process.
`
`The ÉlanSC400 and ÉlanSC410 microcontrollers
`combine a 32-bit, low-voltage Am486 CPU with a
`complete set of PC/AT-compatible peripherals, along
`with the power management features required for
`battery operation.
`
`Leveraging the benefits of the x86 desktop computing
`environment, the ÉlanSC400 and ÉlanSC410 microcon-
`trollers integrate all of the common logic and I/O func-
`tionality associated with a PC/AT computing system into
`a single device, eliminating the need for multiple periph-
`eral chips. Fully integrated PC/AT-compatible peripher-
`als include two 8259A-compatible programmable
`interrupt controllers (PICs), two 8237A-compatible DMA
`controllers, an 8254-compatible timer, a 16550 UART,
`an IrDA controller, VL-bus and ISA bus controllers, a
`real-time clock (RTC), and Enhanced Parallel Port
`(EPP) mode for the parallel port.
`
`With its low-voltage Am486® CPU core and ultra-small
`form factor, the ÉlanSC400 microcontroller is highly op-
`timized for mobile computing applications. The
`ÉlanSC410 microcontroller is targeted specifically for
`embedded systems.
`
`A feature comparison of the two microcontrollers is
`shown in Table 1 on page 3.
`
`The ÉlanSC400 and ÉlanSC410 microcontrollers use
`the industry-standard 486 microprocessor instruction
`set. All software written for the x86 architecture family
`is compatible with the ÉlanSC400 and ÉlanSC410
`microcontrollers.
`
`The ÉlanSC400 and ÉlanSC410 microcontrollers are
`based on a fully static design and include an advanced
`power management unit. Operating voltages are
`2.7 V–3.3 V with 5-V-tolerant I/O pads. Orderable in
`both 33-MHz, 66-MHz, and 100-MHz peak processor
`speeds, the product is available in the ultra-small
`292 ball grid array (BGA) package.
`
`ORDERING INFORMATION
`AMD standard products are available in several packages and operating ranges. The order number (Valid
`Combination) is formed by a combination of the elements below.
`
`ELANSC400
`
`–33
`
`A
`
`C
`
`TEMPERATURE RANGE
`C = Commercial
`For 33 and 66 MHz: TCASE = 0(cid:176) C to +95(cid:176) C
`For 100 MHz: TCASE = 0(cid:176) C to +85(cid:176) C
`
`I = Industrial
`For 33 and 66 MHz, TCASE = – 40(cid:176) C to +95(cid:176) C
`PACKAGE TYPE
`A = 292-pin BGA (Ball Grid Array)
`
`SPEED OPTION
`–33 = 33 MHz
`–66 = 66 MHz
`–100 = 100 MHz
`
`DEVICE NUMBER/DESCRIPTION
`ÉlanSC400 microcontroller
`ÉlanSC410 microcontroller
`
`Valid Combinations
`Valid Combinations list configurations planned to be
`supported in volume for this device. Consult the local
`AMD sales office to confirm availability of specific valid
`combinations and to check on newly released
`combinations.
`
`Valid Combinations
`ELANSC400–33
`AC, AI
`ELANSC400–66
`ELANSC400–100
`ELANSC410–33
`ELANSC410–66
`ELANSC410–100
`
`AC
`AC, AI
`
`AC
`
`2
`
`Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
`
`SCEA Ex. 1051 Page 2
`
`

`
`Table 1. Product Comparison—ÉlanSC400 and ÉlanSC410 Microcontrollers
`ÉlanSC410
`ÉlanSC400
`Am486 CPU
`Am486 CPU
`8-Kbyte Write-Back
`8-Kbyte Write-Back
`Yes
`Yes
`No
`No
`16, 32 bit
`16, 32 bit
`8, 16 bit
`8, 16 bit
`No
`No
`32 bit
`32 bit
`No
`No
`Yes
`Yes
`Yes
`Yes
`Yes
`Yes
`Yes
`Yes
`Yes
`Yes
`
`8, 16, 32 bit
`3 x 64 Mbyte
`3
`Yes
`Yes
`
`4
`16, 32 bit
`64 Mbyte
`Yes
`ROM-mappable
`
`Yes
`Yes
`Yes
`2
`8, 16 bit
`
`7228
`
`8, 16, 32 bit
`3 x 64 Mbyte
`3
`Yes
`Yes
`
`4
`16, 32 bit
`64 Mbyte
`Yes
`ROM-mappable
`
`Yes
`Yes
`Yes
`2
`8, 16 bit
`
`7228
`
`Yes
`16550-compatible
`
`Yes
`16550-compatible
`
`Yes
`Yes
`Yes
`32
`Yes
`No
`
`No
`
`Yes
`292 BGA
` 2.7–3.3 V
` 3.3 V
`5 V
`33, 66, 100 MHz
`
`Yes
`Yes
`Yes
`32
`Yes
`Yes
`2
`Yes
`Yes
`Yes
`Yes
`Yes
`Yes
`292 BGA
` 2.7–3.3 V
` 3.3 V
`5 V
`33, 66, 100 MHz
`
`Feature
`Core CPU
`L1 Cache
`System management mode (SMM)
`Floating-point unit
`Data Bus
`ISA Interface
`ISA bus mastering
`VESA Local Bus
`VL bus mastering
`Power Management
`Mode timers
`Activity detection
`SMI/NMI generation
`Battery monitoring
`On-Chip ROM Interface
`Width
`Size (total ROM space)
`ROM chip selects
`Burst-mode support
`Support for SRAM as ROM address space
`On-Chip DRAM Controller
`Banks
`Width
`Size (total of all banks)
`EDO support
`Support for SRAM as main memory
`Integrated PC/AT-Compatible Peripherals
`Programmable timer (8254-compatible)
`Real-time clock (146818A-compatible)
`Port B and Port 92h I/O registers
`Cascaded DMA Controllers (8237A)
`Width
`Total number of channels
`External channels
`Cascaded Interrupt Controllers (8259)
`External IRQ signals
`Bidirectional Parallel Port with EPP Mode
`Serial Port (UART)
`Keyboard Interface
`Support for external 8042 SCP
`XT interface
`Matrix scanned with SCP emulation
`General-Purpose Input/Output Signals
`Infrared (IrDA) Port
`PC Card Controller
`Sockets
`PCMCIA 2.1-compliant
`82365-compatible
`LCD Graphics Controller
`Programmable clock frequency
`Unified memory architecture (UMA)
`JTAG Support
`Pin Count and Package
`VCC: CPU core
`On-chip peripheral logic
`I/O tolerance (designated pins)
`Processor Clock Rate
`
`
`
`Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
`
`3
`
`SCEA Ex. 1051 Page 3
`
`

`
`BLOCK DIAGRAM—ÉlanSC400 MICROCONTROLLER
`
`ÉlanSC400 Microcontroller
`
`Addr
`
`Data
`
`Memory
`Management
`Unit
`
`Am486®
`CPU
`
`Addr
`
`Dual DMA
`Controllers
`8237
`
`Power
`Management
`Unit
`
`GPIOs
`
`Clock
`Generation
`
`Real-Time
`Clock
`
`Boundary
`Scan
`
`AT Port
`Logic
`
`Timer
`8254
`
`Dual Interrupt
`Controllers
`8259
`
`PC Card
`Controller
`
`Address
`Decoder
`
`Data
`Steering
`
`LCD
`Graphics
`Controller
`
`Local Bus
`Controller
`
`Internal
`Bus
`
`System
`Arbiter
`
`Memory
`Controller
`
`GPIOs
`
`GPIOs
`
`EPP
`Parallel
`Port
`
`UART
`16550
`
`Keyboard
`Interface:
`Matrix/XT/SCP
`
`ISA Bus
`Controller
`
`Clock I/O
`
`32-kHz Crystal
`
`Socket A Ctrl
`
`GPIOs or
`Parallel Port or
`PC Card Socket B
`
`Serial Port
`
`Infrared
`
`Infrared
`Port
`
`GPIOs
`
`4
`
`Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
`
`System Address Bus
`
`Data Bus
`
`Graphics or
`Local Bus Controller
`
`GPIOs
`
`DRAM Control
`
`ROM Control
`
`DRAM Control or
`Keyboard Rows
`
`GPIOs or
`Keyboard Rows
`Columns or
`XT Keyboard
`ISA Control or
`Keyboard Rows
`ISA Control
`
`ISA Control or
`GPIOs
`
`SCEA Ex. 1051 Page 4
`
`

`
`BLOCK DIAGRAM—ÉlanSC410 MICROCONTROLLER
`
`ÉlanSC410 Microcontroller
`
`Addr
`
`Data
`
`Addr
`
`Am486®
`CPU
`
`Dual DMA
`Controllers
`8237
`
`Power
`Management
`Unit
`
`GPIOs
`
`Clock
`Generation
`
`Real-Time
`Clock
`
`Boundary
`Scan
`
`AT Port
`Logic
`
`Timer
`8254
`
`Dual Interrupt
`Controllers
`8259
`
`Clock I/O
`
`32-kHz Crystal
`
`System Address Bus
`
`Memory
`Management
`Unit
`
`Address
`Decoder
`
`Data
`Steering
`
`Data Bus
`
`Internal
`Bus
`
`Local Bus
`Controller
`
`Local Bus Controller
`
`System
`Arbiter
`
`Memory
`Controller
`
`GPIOs
`
`DRAM Control
`
`ROM Control
`
`DRAM Control or
`Keyboard Rows
`
`GPIOs or
`Keyboard Rows
`Columns or
`XT Keyboard
`
`ISA Control or
`Keyboard Rows
`ISA Control
`
`ISA Control or
`GPIOs
`
`GPIOs or
`Parallel Port
`
`Serial Port
`
`GPIOs
`
`GPIOs
`
`EPP
`Parallel
`Port
`
`UART
`16550
`
`Infrared
`
`Infrared
`Port
`
`GPIOs
`
`Keyboard
`Interface:
`Matrix/XT/SCP
`
`ISA Bus
`Controller
`
`
`
`Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
`
`5
`
`SCEA Ex. 1051 Page 5
`
`

`
`LOGIC SYMBOL—ÉlanSC400 MICROCONTROLLER
`LCDD7 [VL_BE3]
`LCDD6 [VL_LDEV]
`LCDD5 [VL_D/C]
`LCDD4 [VL_LRDY]
`LCDD3 [VL_M/IO]
`LCDD2 [VL_W/R]
`LCDD1 [VL_ADS]
`LCDD0 [VL_RST]
`M [VL_BE2]
`LC [VL_BE1]
`SCK [VL_BE0]
`FRM [VL_LCLK]
`LVEE [VL_BRDY]
`LVDD [VL_BLAST]
`
`LCD Graphics
`Controller or
`VESA Local Bus
`
`8-Pin Serial Port
`
`Infrared Interface
`
`Power
`Management
`Interface
`
`GPIOs
`
`GPIO/External
`Buffer Control
`
`GPIO/ISA
`Interface
`
`GPIO/PC Card
`Power Control
`
`Scan Keyboard
`Columns/IRQs/XT
`Keyboard Interface
`
`Scan Keyboard
`Rows/ISA Interface
`
`Scan Keyboard
`Rows/DRAM
`Interface
`
`ÉlanSC400
`Microcontroller
`292 BGA
`
`DTR, RTS, SOUT
`CTS, DCD, DSR
`RIN, SIN
`
`SIROUT
`SIRIN
`ACIN
`BL2–BL1
`BL0 [CLK_IO]
`
`GPIO_CS0
`GPIO_CS1
`
`GPIO_CS2 [[DBUFRDL]]
`
`GPIO_CS3 [[DBUFRDH]]
`GPIO_CS4 [[DBUFOE]]
`
`GPIO_CS5 [IOCS16]
`GPIO_CS6 [IOCHRDY]
`GPIO_CS7 [PIRQ1]
`GPIO_CS8 [PIRQ0]
`GPIO_CS9 [TC]
`GPIO_CS10 [AEN]
`GPIO_CS11 [PDACK0]
`GPIO_CS12 [PDRQ0]
`
`GPIO_CS13 [PCMA_VCC]
`GPIO_CS14 [PCMA_VPP1]
`GPIO15 [PCMA_VPP2]
`GPIO16 [PCMB_VCC]
`GPIO17 [PCMB_VPP1]
`GPIO18 [PCMB_VPP2]
`GPIO19 [LBL2]
`GPIO20 [CD_A2]
`
`KBD_COL7
`KBD_COL6-2 / PIRQ7-3
`KBD COL1-0 [XT_CLK/DATA]
`
`SUS_RES / KBD_ROW14
`KBD_ROW13 [[R32BFOE]]
`KBD_ROW12 [MCS16]
`
`KBD_ROW11 [SBHE]
`KBD_ROW10 [BALE]
`KBD_ROW9 [PIRQ2]
`KBD_ROW8 [PDRQ1]
`KBD_ROW7 [PDACK1]
`
`KBD_ROW6 [MA12]
`
`KBD_ROW5 [RAS3]
`
`KBD_ROW4 [RAS2]
`KBD_ROW3 [CASH3]
`KBD_ROW2 [CASH2]
`KBD_ROW1 [CASL3]
`KBD_ROW0 [CASL2]
`
`MWE
`
`CASL/H1–CASL/H0
`
`RAS1–RAS0
`MA11–MA5
`MA4
`MA3 {CFG3}
`MA2 {CFG2}
`MA1 {CFG1}
`MA0 {CFG0}
`
`D15–D0
`
`SD15–SD0 [D31–D16]
`
`SA25–SA0
`
`ROMCS1–ROMCS0
`ROMRD
`ROMWR
`
`IOR
`
`IOW
`MEMR
`MEMW
`RSTDRV
`
`MCEL_A [[BNDSCN_TCK]]
`
`MCEH_A [[BNDSCN_TMS]]
`
`RST_A [[BNDSCN_TDI]]
`REG_A [[BNDSCN_TDO]]
`
`CD_A
`RDY_A
`BVD1_A, BVD2_A
`WP_A
`WAIT_AB
`OE
`WE
`ICDIR
`
`GPIO31 [STRB] [MCEL_B]
`
`GPIO30 [AFDT] [MCEH_B]
`
`GPIO29 [SLCTIN] [RST_B]
`GPIO28 [INIT] [REG_B]
`
`GPIO27 [ERROR] [CD_B]
`
`GPIO26 [PE] [RDY_B]
`
`GPIO25 [ACK] [BVD1_B]
`
`GPIO24 [BUSY] [BVD2_B]
`
`GPIO23 [SLCT] [WP_B]
`
`GPIO22 [PPOEN]
`
`GPIO21 [PPDWE]
`
`DRAM Interface
`and Feature
`Configuration Pins
`
`DRAM, VL, ROM, ISA
`and PC Card Data
`
`VL, ROM, ISA, and
`PC Card Address
`
`ROM/Flash Memory
`Control
`
`PC Card Command
`ISA Bus Command
`and Reset
`
`Dedicated Single
`Slot PC Card and
`Boundary Scan
`Interface
`
`Parallel Port or
`Second PC Card or
`GPIOs
`
`32KXTAL1, 32KXTAL2
`
`LF_INT, LF_LS
`
`LF_VID, LF_HS
`
`32-kHz Crystal
`
`Loop Filters
`
`RESET
`
`VCC_RTC
`BBATSEN
`
`Reset
`
`RTC
`
`SPKR
`
`Speaker
`
`BNDSCN_EN
`
`Boundary Scan
`Enable
`
`Notes:
` / =Two functions available on the pin at the same time. { } = Function during hardware reset. [ ] = Alternative function selected by
`firmware configuration. [[ ]] = Alternate function selected by a hardware configuration pin state at power-on reset. This does not apply
`to [[BNDSCN_TCK]], [[BNDSCN_TMS]], [[BNDSCN_TDI]], and [[BNDSCN_TDO]]. These alternate functions are enabled by the
`BNDSCN_EN signal.
`6
`
`Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
`
`SCEA Ex. 1051 Page 6
`
`

`
`LOGIC SYMBOL—ÉLANSC410 MICROCONTROLLER
`VL_BE3
`VL_LDEV
`VL_D/C
`VL_LRDY
`VL_M/IO
`VL_W/R
`VL_ADS
`VL_RST
`VL_BE2
`VL_BE1
`VL_BE0
`VL_LCLK
`VL_BRDY
`VL_BLAST
`
`VESA Local Bus
`
`ÉlanSC410
`Microcontroller
`292 BGA
`
`8-Pin Serial Port
`
`Infrared Interface
`
`Power
`Management
`Interface
`
`GPIOs
`
`GPIO/External
`Buffer Control
`
`GPIO/ISA
`Interface
`
`GPIO/
`Power Control
`
`Scan Keyboard
`Columns/IRQs/XT
`Keyboard Interface
`
`Scan Keyboard
`Rows/ISA Interface
`
`DTR, RTS, SOUT
`CTS, DCD, DSR
`RIN, SIN
`
`SIROUT
`SIRIN
`ACIN
`BL2–BL1
`BL0 [CLK_IO]
`
`GPIO_CS0
`GPIO_CS1
`
`GPIO_CS2 [[DBUFRDL]]
`
`GPIO_CS3 [[DBUFRDH]]
`GPIO_CS4 [[DBUFOE]]
`
`GPIO_CS5 [IOCS16]
`GPIO_CS6 [IOCHRDY]
`GPIO_CS7 [PIRQ1]
`GPIO_CS8 [PIRQ0]
`GPIO_CS9 [TC]
`GPIO_CS10 [AEN]
`GPIO_CS11 [PDACK0]
`GPIO_CS12 [PDRQ0]
`
`GPIO_CS13
`GPIO_CS14
`GPIO15
`GPIO16
`GPIO17
`GPIO18
`GPIO19 [LBL2]
`
`GPIO20
`
`KBD_COL7
`KBD_COL6-2 / PIRQ7-3
`KBD COL1-0 [XT_CLK/DATA]
`
`SUS_RES / KBD_ROW14
`KBD_ROW13 [[R32BFOE]]
`KBD_ROW12 [MCS16]
`
`KBD_ROW11 [SBHE]
`KBD_ROW10 [BALE]
`KBD_ROW9 [PIRQ2]
`KBD_ROW8 [PDRQ1]
`KBD_ROW7 [PDACK1]
`
`KBD_ROW6 [MA12]
`
`KBD_ROW5 [RAS3]
`
`DRAM Interface
`and Feature
`Configuration Pins
`
`DRAM, VL, ROM,
`and ISA Data
`
`VL, ROM, and ISA
`Address
`
`ROM/Flash Memory
`Control
`
`ISA Bus Command
`and Reset
`
`Boundary Scan
`Interface
`
`Parallel Port or
`GPIOs
`
`MWE
`
`CASL/H1–CASL/H0
`
`RAS1–RAS0
`MA11–MA5
`MA4
`MA3 {CFG3}
`MA2
`MA1 {CFG1}
`MA0 {CFG0}
`
`D15–D0
`
`SD15–SD0 [D31–D16]
`
`SA25–SA0
`
`ROMCS1–ROMCS0
`ROMRD
`ROMWR
`
`IOR
`IOW
`MEMR
`MEMW
`RSTDRV
`
`[[BNDSCN_TCK]]
`
`[[BNDSCN_TMS]]
`
`[[BNDSCN_TDI]]
`[[BNDSCN_TDO]]
`
`GPIO31 [STRB]
`
`GPIO30 [AFDT]
`
`GPIO29 [SLCTIN]
`GPIO28 [INIT]
`
`GPIO27 [ERROR]
`
`GPIO26 [PE]
`
`GPIO25 [ACK]
`
`GPIO24 [BUSY]
`
`GPIO23 [SLCT]
`
`GPIO22 [PPOEN]
`
`GPIO21 [PPDWE]
`
`32KXTAL1, 32KXTAL2
`
`LF_INT, LF_LS
`
`LF_HS
`
`RESET
`
`VCC_RTC
`BBATSEN
`
`32-kHz Crystal
`
`Loop Filters
`
`Reset
`
`RTC
`
`Scan Keyboard
`Rows/DRAM
`Interface
`
`SPKR
`
`Speaker
`
`KBD_ROW4 [RAS2]
`KBD_ROW3 [CASH3]
`KBD_ROW2 [CASH2]
`KBD_ROW1 [CASL3]
`KBD_ROW0 [CASL2]
`Notes:
` / =Two functions available on the pin at the same time. { } = Function during hardware reset. [ ] = Alternative function selected
`by firmware configuration. [[ ]] = Alternate function selected by a hardware configuration pin state at power-on reset. This does not
`apply to [[BNDSCN_TCK]], [[BNDSCN_TMS]], [[BNDSCN_TDI]], and [[BNDSCN_TDO]]. These functions are enabled by the
`BNDSCN_EN signal.
`
`BNDSCN_EN
`
`Boundary Scan
`Enable
`
`
`
`Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
`
`7
`
`SCEA Ex. 1051 Page 7
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`TABLE OF CONTENTS
`Distinctive Characteristics ............................................................................................................ 1
`Élan™SC400 and ÉlanSC410 Microcontrollers ...................................................................... 1
`ÉlanSC400 Microcontroller Only ............................................................................................. 1
`General Description ..................................................................................................................... 2
`Block Diagram—ÉlanSC400 Microcontroller .............................................................................. 4
`Block Diagram—ÉlanSC410 Microcontroller .............................................................................. 5
`Logic Symbol—ÉlanSC400 Microcontroller ................................................................................. 6
`Logic Symbol—ÉlanSC410 Microcontroller ................................................................................. 7
`Related AMD Products .............................................................................................................. 12
`E86™ Family Devices ........................................................................................................... 12
`Related Documents ............................................................................................................... 12
`Élan™SC400 Microcontroller Evaluation Board ................................................................... 13
`Third-Party Development Support Products ...................................................................................13
`Customer Service .................................................................................................................. 13
`Architectural Overview ............................................................................................................... 13
`Low-Voltage Am486 CPU Core ............................................................................................ 14
`Power Management .............................................................................................................. 14
`Clock Generation .................................................................................................................. 14
`ROM/Flash Memory Interface ............................................................................................... 15
`DRAM Controller ................................................................................................................... 15
`Integrated Standard PC/AT Peripherals ................................................................................ 15
`PC/AT Support Features ....................................................................................................... 16
`Bidirectional Enhanced Parallel Port (EPP) .......................................................................... 16
`Serial Port .............................................................................................................................. 17
`Keyboard Interfaces .............................................................................................................. 17
`Programmable General-Purpose Inputs and Outputs ........................................................... 17
`Infrared Port for Wireless Communication ............................................................................ 17
`Dual PC Card Controller (ÉlanSC400 Microcontroller Only) ................................................. 17
`Graphics Controller for CGA-Compatible Text and Graphics (ÉlanSC400 Microcontroller Only) .. 17
`JTAG Test Features .............................................................................................................. 18
`System Interfaces ................................................................................................................. 18
`System Considerations .............................................................................................................. 20
`Connection Diagram—ÉlanSC400 and ÉlanSC410 Microcontrollers ........................................ 24
`Pin Designations ........................................................................................................................ 25
`Pin Naming ............................................................................................................................ 25
`Pin Changes for the ÉlanSC410 Microcontroller ....................................................................... 25
`Pin Designations (Pin Number)—ÉlanSC400 Microcontroller ................................................... 26
`Pin Designations (Pin Name)—ÉlanSC400 Microcontroller ...................................................... 29
`Pin Designations (Pin Number)—ÉlanSC410 Microcontroller ................................................... 33
`Pin Designations (Pin Name)—ÉlanSC410 Microcontroller ...................................................... 36
`Pin State Tables ........................................................................................................................ 40
`Pin Characteristics ................................................................................................................ 40
`Using the Pin State Tables .................................................................................................... 41
`Signal Descriptions .................................................................................................................... 62
`Multiplexed Pin Function Options .......................................................................................... 70
`Using the Configuration Pins to Select Pin Functions............................................................ 74
`Clocking ..................................................................................................................................... 76
`Clock Generation .................................................................................................................. 76
`Integrated Peripheral Clock Sources .................................................................................... 77
`32-kHz Crystal Oscillator ....................................................................................................... 79
`Loop Filters ........................................................................................................................... 79
`Intermediate and Low-Speed PLLs ....................................................................................... 79
`Graphics Dot Clock PLL (ÉlanSC400 Microcontroller Only) ................................................. 80
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`Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
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`SCEA Ex. 1051 Page 8
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`High-Speed PLL .................................................................................................................... 81
`Band Gap Block .................................................................................................................... 81
`RTC Voltage Monitor ............................................................................................................. 81
`Clock Specifications .............................................................................................................. 83
`Absolute Maximum Ratings ....................................................................................................... 86
`Operating Ranges ...................................................................................................................... 86
`DC Characteristics Over Commercial and Industrial Operating Ranges .................................... 86
`Capacitance ............................................................................................................................... 87
`Typical Power Numbers ............................................................................................................. 88
`Power Requirements Under Different Power Management Modes ...................................... 88
`Derating Curves ......................................................................................................................... 89
`AC Switching Characteristics and Waveforms .......................................................................... 91
`Key to Switching Waveforms ................................................................................................ 91
`AC Switching Test Waveforms .................................................................................................. 91
`AC Switching Characteristics over Commercial and Industrial Operating Ranges ............... 92
`Thermal Characteristics ........................................................................................................... 130
`Physical Dimensions—BGA 292—Plastic Ball Grid Array ...................................................... 131
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`LIST OF FIGURES
`Figure 1.
`Typical Mobile Terminal Design ............................................................................. 21
`Figure 2.
`System Diagram with Trade-offs—ÉlanSC400 Microcontroller ............................. 22
`Figure 3.
`System Design with Trade-offs—ÉlanSC410 Microcontroller ............................... 23
`Figure 4.
`Clock Generation Block Diagram ........................................................................... 76
`Figure 5.
`Clock Source Block Diagram ................................................................................. 78
`Figure 6.
`32-kHz Crystal Circuit ............................................................................................ 79
`Figure 7.
`32-kHz Oscillator Circuit ........................................................................................ 79
`Figure 8.
`Intermediate and Low-Speed PLLs Block Diagram ............................................... 80
`Figure 9.
`Graphics Dot Clock PLL Block Diagram ................................................................ 81
`Figure 10. High-Speed PLL Block Diagram ............................................................................ 82
`Figure 11. RTC Voltage Monitor Circuit .................................................................................. 82
`Figure 12. Timing Diagram for RTC-On Power-Down Sequence ........................................... 83
`Figure 13. PLL Enabling Timing Sequence ............................................................................ 85
`Figure 14. 3.3-V I/O Drive Type A Rise Time ......................................................................... 89
`Figure 15. 3.3-V I/O Drive Type A Fall Time ........................................................................... 89
`Figure 16. 3.3-V I/O Drive Type B Rise Time ......................................................................... 89
`Figure 17. 3.3-V I/O Drive Type B Fall Time ........................................................................... 89
`Figure 18. 3.3-V I/O Drive Type C Rise Time ......................................................................... 90
`Figure 19. 3.3-V I/O Drive Type C Fall Time ........................................................................... 90
`Figure 20. 3.3-V I/O Drive Type D Rise Time ......................................................................... 90
`Figure 21. 3.3-V I/O Drive Type D Fall Time ........................................................................... 90
`Figure 22. 3.3-V I/O Drive Type E Rise Time ......................................................................... 90
`Figure 23. 3.3-V I/O Drive Type E Fall Time ........................................................................... 90
`Figure 24. Power-Up Timing Sequence .................................................................................. 92
`Figure 25. Fast Mode 8-/16-/32-Bit ROM/Flash Memory Read Cycle .................................... 94
`Figure 26.
`Fast Mode CPU Read of Three Consecutive Bytes from 8-Bit ROM/Flash Memory .. 95
`Figure 27. Fast Mode 8-/16-/32-Bit Flash Memory Write Cycles ............................................ 95
`Figure 28. Fast Mode 16-Bit Burst ROM Read Cycles ........................................................... 96
`Figure 29. Fast Mode CPU Burst Read from 32-Bit Burst Mode ROM/Flash Memory ........... 96
`Figure 30. Normal Mode 8-/16-Bit ROM/Flash Memory Read Cycles .................................... 97
`Figure 31. Normal Mode 8-/16-Bit Flash Memory Write Cycles .............................................. 97
`Figure 32. DRAM Page Hit Read, Interleaved ........................................................................ 99
`Figure 33. DRAM Page Hit Write, Interleaved ........................................................................ 99
`Figure 34. DRAM Page Miss Read, Interleaved ................................................................... 100
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`Élan™SC400 and ÉlanSC410 Microcontrollers Data Sheet
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`SCEA Ex. 1051 Page 9
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`Figure 35. DRAM Page Hit Read, Non-Interleaved .............................................................. 100
`Figure 36. DRAM Page Hit Write, Non-Interleaved .............................................................. 101
`Figure 37. DRAM Page Miss Read, Non-Interleaved ........................................................... 101
`Figure 38. EDO DRAM Page Hit Read, Non-Interleaved ..................................................... 102
`Figure 39. EDO DRAM Page Miss Read, Non-Interleaved .................................................. 102
`Figure 40. DRAM CAS-Before-RAS Refresh ........................................................................ 103
`Figure 41. DRAM Self-Refresh ............................................................................................. 103
`Figure 42. DRAM Slow Refresh ............................................................................................ 104
`Figure 43. 8-Bit ISA Bus Cycles ............................................................................................ 107
`Figure 44. 16-Bit ISA Bus Cycles .......................................................................................... 108
`Figure 45.
`ISA DMA Read Cycle .......................................................................................... 109
`Figure 46.
`ISA DMA Write Cycle ........................................................................................... 110
`Figure 47. VESA Local Bus Cycles ....................................................................................... 112
`Figure 48. EPP Parallel Port Write Cycle .............................................................................. 114
`Figure 49. EPP Parallel Port Read Cycle ............................................................................. 115
`Figure 50.
`I/O Decode (R/W), Address Decode Only ........................................................... 116
`Figure 51.
`I/O Decode (R/W), Command Qualified .............................................................. 116
`I/O Decode (R/W), GPIO_CSx as 8042CS Timing .............................................. 117
`Figure 52.
`Figure 53. Memory CS Decode (R/W), Address Decode Only ............................................. 117
`Figure 54. Memory CS Decode (R/W), Command Qualified ................................................ 118
`Figure 55. PC Card Attribute Memory Read Cycle (ÉlanSC400 Microcontroller Only) ........ 120
`Figure 56. PC Card Attribute Memory Write Cycle (ÉlanSC400 Microcontroller Only) ......... 121
`Figure 57. PC Card Common Memory Read Cycle (ÉlanSC400 Microcontroller Only) ....... 122
`Figure 58. PC Card Common Memory Write Cycle (ÉlanSC400 Microcontroller Only) ....... 123
`Figure 59. PC Card I/O Read Cycle ...................................................................................... 124
`Figure 60. PC Card I/O Write Cycle ...................................................................................... 125
`Figure 61. PC Card DMA Read Cycle (Memory Read to I/O Write) ..................................... 126
`Figure 62. PC Card DMA Write Cycle (I/O Read to Memory Write) ..................................... 127
`Figure 63. Graphics Panel Interface Timing (ÉlanSC400 Microcontroller Only) ................... 128
`Figure 64. Graphics Panel Power Sequencing (ÉlanSC400 Microcontroller Only) .............