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`6,128,290
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`1
`PERSONAL DATA NETWORK
`
`CROSS REFERENCE TO RELATED
`APPLICATION
`
`This application is a continuation—in—part of application
`Ser. No. U8;‘6l1,695 filed on Mar. 6, 1996 now U.S. Pat. No.
`5,699,357.
`
`BACKGROUND OF THE INVENTION
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`The present invention relates to a data network and more
`particularly to a data network which can effect bidirectional
`wireless data communications between a microcomputer
`unit and a plurality of peripheral units, all of which are
`adapted to be carried on the person of the user.
`The size and power consumption of digital electronic
`devices has been progressively reduced so that personal
`computers have evolved from lap tops through so-called
`notebooks, into hand held or belt carriable devices. com-
`monly re ferred to as personal digital assistants (PDAs). One '
`area which has remained troublesome however. is the cou-
`pling of peripheral devices or accessories to the main
`processing unit. With rare exception, such coupling has
`typically been provided by means of connecting cables
`which place such restrictions on the handling of the units —
`that many of the advantages of small size and light weight
`are lost.
`
`While it has been proposed to link a keyboard or a mouse
`to a main processing unit using infrared or radio frequency
`(RF) communications, such systems have been typically
`limited to a single peripheral unit with a dedicated channel
`of low capacity.
`Among the several objects of the present invention may
`be noted the provision of a novel data network which will
`provide wireless communication between a host or server
`microcomputer unit and a plurality of peripheral units; the
`provision of a data network which provides highly reliable
`bidirectional data communication between the peripheral
`units and the server; the provision of such a data network
`which requires extremely low power consumption, particu-
`larly for the peripheral units; the provision of such a network
`system which avoids interference from nearby similar sys-
`tems; and the provision of such a data network system which
`is highly reliable and which is of relatively simple and
`inexpensive construction. Other objects and features will be
`in part apparent and in part pointed out hereinafter.
`
`SUMMARY OF THE. PRESENT INVENTION
`
`The data network of the present invention utilizes the fact
`that the server microcomputer unit and the several peripheral
`units which are to be linked are all
`in close physical
`proximity, e.g., within twenty meters, to establish, with very
`high accuracy, at common time base or synchronization. The
`short distances involved means that accuracy of synchroni-
`zation is not appreciably aflected by transit
`time delays.
`Using the common time base, code sequences are generated
`which control the operation of the several transmitters in a
`low duty cycle pulsed mode of operation. The low duty cycle
`pulsed operation both substantially reduces power consump-
`tion and facilitates the rejection of interfering signals.
`In addition to conventional peripheral devices such as a
`keyboard or mouse, it should be understood that data com-
`munications in accordance with the present invention will
`also be useful
`for a wide variety of less conventional
`peripheral systems which can augment the uselulness of a
`microcomputer such as a PDA. For example. displays are
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`being developed which project a private image directly into
`an user’s eye using a device which is mounted on a head-
`band or eyeglasses. These displays are useful, for example,
`for providing combat information to military personnel and
`for realistic games. Likewise, so called virtual keyboards are
`being developed which use inertial or magnetic sensors
`attached to a users fingers in the manner of rings. Further,
`apart from more usual business type computer applications,
`the data network system of the present invention may also be
`useful for applications such as physiological monitoring
`where the peripheral units may be physiological sensors
`such as temperature, heartbeat and respiration rate sensors.
`As will be understood, such peripheral units may be useful
`for outpatient monitoring, monitoring for sudden infant
`death syndrome, and for fitness training. It is convenient in
`the context of this present description to refer to such
`conventional and inconventional peripheral units collec-
`tively as personal electronic accessories (PEAS).
`Briefly stated, a data network system according to the
`present invention effects. coordinating operation of a plural-
`ity of electronic devices carried on the person of the user.
`These devices include a server microcomputer and a plu-
`rality of peripheral units which are battery powered and
`portable and which provide input information from the user
`or output information to the user. The server microcomputer
`incorporates an RF transmitter for sending commands and
`synchronizing information to the peripheral units. The
`peripheral units,
`in turn, each include an RF receiver for
`detecting those commands and synchronizing information
`and include also respective RF transmitters for sending
`information from the peripheral unit to the server micro-
`computer. The server microcomputer includes a receiver for
`receiving that information transmitted from the peripheral
`units.
`
`The server and peripheral unit transmitters are energized
`in low duty cycle pulses at intervals which are determined by
`a code sequence which is timed in relation to the synchro-
`nizing information initially transmitted from the server
`microcomputer.
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1 is an overall block diagram of a wireless data
`network system linking a personal digital assistant or server
`microcomputer with a plurality of peripheral units;
`FIG. 2 is a block diagram of a modem circuitry employed
`in one of the peripheral units of FIG. 1;
`FIG. 3 is a block diagram of a modem circuitry employed
`in the server microcomputer of FIG. 1;
`FIG. 4 is a block diagram of the transmitter circuitry
`employed in the modem of FIG. 2;
`FIG. Sis a circuit diagram of receiver circuitry employed
`in the modern of FIG. 2; and
`FIG. 6 is a diagram illustrating timing of RF signals which
`are transmitted between the server microcomputer and the
`various peripheral units;
`FIG. '7 is a block diagram of the controller employed in
`the PEA modem; and
`FIG. 8 is a block diagram of the digital matched filter
`employed in the PEA controller; and
`Corresponding reference characters indicate correspond-
`ing parts throughout the several view of the drawings.
`DESCRIPTION OF TIIE PREFERRED
`EMBODIMENT
`
`Referring now to FIG. 1, a server microcomputer of the
`type characterized as a personal digital assistant (PDA) is
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`designated generally be reference character 11. The PDA
`may also be considered to be :1 MOST processor and the
`HUB of the local network. The PDA is powered by a battery
`12 and may be adapted to be carried on the person of the
`user, e.g. in his hand or on a belt hook. Such PDAs typically
`accept options which are physically configured as an indus-
`try standard PCMCIA card. In accordance with the present
`invention such a card, designated by reference character 13
`is implemented which includes a PCMCIA interface and
`FDA modem.
`
`As is described in greater detail hereinafter, the network
`system of the present
`invention establishes wireless com-
`munication between PDA 11 and a plurality of peripheral
`units or PEAs designated generally by reference characters
`21-29. A FDA and a collection of PEAs associated with it
`are referred to herein as an “ensemble". The present inven-
`tion allows the creation of a data network linking such an
`ensemble of elements with minimal likelihood of interfer-
`ence from similar ensembles located nearby. Each of the
`peripheral units is powered by a respective battery 30 and
`incorporates a PEA modem 31. Further, each peripheral unit
`can incorporate a sensor 33, which responds to input from
`the user or an actuator 37 which provides output to the user.
`Some peripheral units might also employ both sensors and
`actuators. As illustrated, each PEA modem preferably incor-
`porates two antenna’s, a dipole antenna 38 for reception and
`a loop antenna 39 for transmitting. The use of separate
`antennas for transmitting and receiving facilitates the utili-
`zation of impedance matching networks which in turn
`facilitates the operation at very low power.
`Referring now to FIG. 2, the FDA modem illustrated there
`comprises five major components,
`a
`transmitter 40,
`a
`receiver 41, a local oscillator 42 which is shared by the
`transmitter and the receiver, a controller 43 which times and
`coordinates the operations of
`the transmitter,
`receiver,
`microprocessor and,
`finally, a voltage controlled crystal
`oscillator oscillator 44 which is utilized in maintaining a
`common time base with the host microcomputer. The oscil-
`lator 44 utilizes a crystal which operates at 4 Mhz.
`As is described in greater detail hereinafter, the controller
`43 sequences the operations necessary in establishing syn-
`chroni'r.ation with the host system, adjusting the oscillator
`44, acquiring from the host appropriate code sequences to be
`used in data communications, in coupling received infor-
`mation from receiver 41 to a sensortactuator interface,
`designated by reference character 46, and in transmitting
`data from the interface 46 back to the host through trans-
`mitter 40. The controller in one embodiment is partitioned
`into a commercially available general purpose microproces-
`sor such as the PICl6C64, together with a special purpose
`logic integrated circuit {IC). The special purpose IC imple-
`ments those functions which cannot be cfficicntly executed
`on the general purpose microprocessor. For example, the
`clock to the PlCl6C64 is sourced by the special purpose IC
`because even in the microprocessor’s so-called “sleep"
`mode, its power consumption is higher than acceptible.
`As is explained in greater detail hereinafter, the general
`scheme of data transmission and reception is a form of time
`division multiple access (TDMA). This TDMA access is
`characterized by a frame interval, common to the host and
`all PEAs of 32.768 milliseconds, segmented into 16,384
`time slots. Each time slot is further partitioned into four data
`bit intervals during which the RF carrier is modulated either
`above the the nominal for a binary “one" or below the carrier
`for a binary "zero". The basic modulation scheme is fre-
`quency shift keying (FSK), well known to those skilled in
`digital
`radio transmission. However, as is explained in
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`greater detail hereinafter, the FSK tones are transmitted in
`only those slots indicated by a TDMA program. Both the
`host and all PEAS share a common TDMA program at one
`time. For each slot, this TDMAprogram indicates that a PEA
`or host is to transmit, or not, and whether it will receive, or
`not. In the intervals between slots in which a PEA is to
`transmit or receive, all receive and transmit circuits are
`powered down.
`Referring now to FIG. 3, the PEA modem illustrated there
`comprises five major components, a transmitter 15,
`a
`receiver 17, a local oscillator 16 which is shared by the
`transmitter and the receiver, a controller 14 which times and
`coordinates the operations of the transmitter, receiver, and
`PCMCIA interface and, finally, a crystal oscillator 18 which
`is utilized in maintaining the network time base. The oscil-
`lator 18 utilizes a crystal which operates at 4 Mhz. There are
`no differences between the receiver,
`local oscillator, and
`transmitter in both the PEA and PDA modems. PDA con-
`troller 14 differs from the PEA modem in three ways. First
`it contains no synhronization capability as it serves as the
`network master. Secondly. it includes a PCMCIA interface
`rather than a sensorttransduecr interface. Only the PEA
`modem is described in detail herein since it is includes all
`the novel capabilities of the FDA modern.
`Referring now to FIG. 4, transmission is effected using the
`local oscillator 45 to drive the transmit antenna arrtplilier 50
`whose output drives transmit antenna 51. The local oscillator
`45 is coupled to a tuning network 48 including a plurality of
`frequence adjusting varactors VR1—VR3. Operation of the
`varactors is controlled by switch pairs 52 and 53. 500
`nanoseconds before the start of transmission,
`the local
`oscillator 45 is powered up. During this period and during all
`receive intervals, frequency selection varactor switches 52
`and 53 are opened and closed respectively. This frequency
`selection state is employed for all periods except those in
`which the local oscillator is used to drive the antenna
`amplifier. To transmit a “one”. both switches 52 and 53 are
`opened. This causes the oscillator to oscillate above its
`nominal value. To transmit a ‘‘zero’', both switches 52 and 53
`are closed. This causes the oscillator to oscillate below its
`nominal value. The local oscillator output then drives ampli-
`fier 5|]. in the preferred embodiment, the transmit antenna 51
`is loop of wire two centimeters in diameter. During short
`periods in which data is not being received nor is being
`transmitted, the oscillator is powered and the varactor con-
`trol voltage Vc is adjusted such that the oscillator frequency
`equals the carrier frequency.
`from the
`the input signal
`Referring now to FIG. 5,
`receiving antenna 38 is applied,
`through an impedance
`matching network 61 to a low noise amplifier 62 and
`bandpass filter 63. The received and amplified signal
`is
`combined with the local oscillator shifted 45 degrees in
`phase in mixer 65 to produce signal Im and combined with
`the local oscillator shifted -45 degrees in phase in mixer 66
`to produce signal Om. Im and Qm are the so-called “in-
`phase" and “quadrature-phase" signals commonly known to
`radio engineers. Both Im and Om are centered at zero hertz
`rather than at an intermediate frequency. This scheme is
`commonly referred to as "direct conversion" because a
`direct conversion to baseband is elfectecl rather than con-
`version to an intermediate frequency which is then con-
`verted to baseband. Direct conversion reduces power
`consumption, as no intermediate frequency circuits are
`employed and it allows use of low pass filters to elIect
`selectivity. Lowpass filters 67 and 68, preferably of the
`linear phase type, remove the unwanted mixing products and
`provide selectivity of signals lm and Qm respectively.
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`The filtered output signals If and Qf passed through
`blocking amplifiers 69 and 70 to form signals I and Q. The
`supply currents of amplifiers 69 and 70 are adjusted so that
`the parasitic output capacitance of these amplifiers effec-
`tively form a bandpass filter with gain. These amplifiers
`block frequencies below 100 KHZ and above two Mllz. 'l'his
`filtering adds to the overall selectivity and blocks any
`unwanted DC mixer byproduct common to direct conversion
`schemes.
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`Some conventional frequency discriminators create the
`signal V-I*dQldt—O*dIidt. When the frequency of the
`received signal is above the local oscillator frequency, V is
`greater than zero. Correspondingly, when the frequency of
`the received signal is below the local oscillator frequency, V
`is less than zero. This scheme has the advantages of being
`totally insensitive to both amplitude and phase errors
`between I and Q mixer stages. Its disadvantage is that
`it
`requires the creation of the time derivatives of I and Q. As
`is well known, precise derivative fonrting circuits and and
`dillicult to implement and power consumptive.
`To circumvent the disadvantages of derivative forming
`networks and still keep the advantages of the frequency
`discrimination scheme, the receiver employs all pass phase
`shifters 71, 72, 73 and 74 to create the signals Ia, Qa, Qb and
`Qc respectively. Multipliers 75 and 76 together with adder *
`77 then t'onTi the signal U=Ia*Qb-Ib*Qa. The advantage is
`that U has the same desirable properties of a discriminator
`based on I*dQi’dt—Q*dI,I‘dt without requiring differentiation.
`It is only required that la and lb be separated by 90 degrees
`and that Qa and Ob be separated by 90 degrees. As is well
`known, all pass networks consisting of a resistor and capaci-
`tor can be used to effect
`this phase separation. These
`networks produce an accurate 90 degree phase separation
`over a frequency range well
`in excess of the blocking
`amplifier bandpass and consume extremely low power con-
`sumption.
`Limiter 78 then amplifies U to form signal Lim. Limiter
`circuits which can generate these signals are well known and
`have been integrated into integrated receiver chips for many
`years. Limiter output Lim is utilized by the controller 43 in
`both establishing the common time base and in recovering
`the data transmitted as described in greater detail hereinafter.
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`FRAME STRUCTURE
`
`As indicated previously, the basic scheme for allowing
`multiple Personal Electronic Assessocies (l’EAs) to com-
`municate with the oommon server microcomputer (PDA)
`may be characterized as a fonrt of time division multiple
`access (TDMA). Asingle virtual channel can be established
`between the PDA and any one PEAby assigning one or more
`slots within the 32368 millisecond frame. In the preferred
`embodiment, four data bits. are transmitted during each slot
`interval with the designation of a binary one or zero encoded
`by means of frequency modulation of the RI’ carrier as
`described previously. In slots where a PEA neither transmits
`nor receives, essentially all of the modern circuits are
`powered oil, thus effecting a substantial power reduction. As
`is described in greater detail hereinafter, some slots are used
`to establish synchronization between PEA and PDA and
`others are used to implement a control channel. These slots
`are not assigned to a particular PEA but are rather shared
`amongst all PEAs.
`In normal operation, each virtual channel is half duplex,
`transfering data either from PEA to PDA or from PDA to
`PEA. Assignment of a single slot per frame results in a
`virtual channel bandwidth of 122 bits per second. Virtual
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`channels requiring larger bandwidths are assigned a multi-
`plicity of slots. For example, when ten slots are assigned, the
`virtual channel bandwidth is increased to 1220 hits per
`second. More than one virtual channel can be established
`
`is
`between the FDA and a single PEA. If one channel
`is
`outgoing from PDA to PEA while the other channel
`incoming from the PEA to the PDA, an effectively full
`duplex communication link is constructed. It is possible for
`each virtual channel
`to dilferentiate bandwidths. Another
`possible operational mode is for the data transfer direction of
`a single virtual channel to be changed dynamically. Acontrol
`channel can be employed whose sole purpose is to indicate
`the data flow direction on the data channel. Changeover
`from one direction to another is typically affected at
`the
`frame boundary.
`A single virtual channel may be shared amongst several
`PEAs under control of the PD/\. In this operational mode, a
`control virtual channel
`is employed to indicate to the
`ensemble of PE/ts sharing the channel which is to transmit
`at any given time. Still another operational mode occurs
`when a single virtual channel is used to broadcast informa-
`tion from PDA to multiple PEAs. While it is possible to
`establish virtual channels between two PEAS, the increased
`worst case separation possible from one PEA to another PEA
`may preclude establishment of a reliable radio link. ‘there-
`fore PEA to PEA link»; are not present
`in the preferred
`embodiment. While all
`these operational modes appear
`different, they are essentially well known variants to the
`underlying time division multiple access technique.
`TDMA allows an ensemble of PEAs and PDA to establish
`a wide assortment of nonconfiicting, error free, virtual
`channels between PEAs and PDA. When two dilfercnt
`ensembles of l’l:lAs and FDA happen by chance to employ
`the same carrier frequency, it is possible for the RF bursts of
`one ensemble to overlap those of the other ensemble. This
`overlap can cause errors. If during a particular bit period,
`two RF bursts are being simultaneously received, one from
`a transmitter in the home ensemble and the other from a
`foreign ensemble, the receiver will “capture’ only the data
`received from the stronger of two transmitters. This well
`known aspect of FM modulation, results in an error free
`channel when the stronger transmitter is part of the home
`ensemble and can result in errors when the stronger trans-
`mitter is part of a foreign ensemble. While it
`is very likely
`that the stonger transmitter is pan of the home ensemble,
`there are circumstances in normal operation where the
`stonger transmitter will part of a foreign ensemble. Note that
`even when a foreign transmitter is of much greater power
`than the home transmitter, if the foreign RF bursts and home
`RF burst do not overlap, no error occurs.
`As is well known, many channel errors can be corrected
`by employing Error Correction Codes {ECC).
`In this
`technique, data to be sent over a channel is segmented into
`words of length M. A checksum of length C is computed as
`the word is being transmitted and also sent across the
`channel. For the M bits of data, a total of N=M+C bits of
`channel bandwidth are utilized. For a fixed word length, as
`the number of error bits which can be corrected increases,
`the channel efficiency decreases. As a general rule, as the
`channel’s error rate increase, the channel bandwdith efiiw
`ciency [needed to achieve a certain corrected error rate)
`decreases and the minimum wordsize increases. In one of
`the simplest error correction schemes, called majority
`coding, where data bit is transmitted three time (M=1, C=2),
`channel bandwidth is reduced to 33%.
`
`In channels where errors occur in bursts, single error
`correction codes, even though they have high channel
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`6,128,290
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`7
`elliciency, will yield poor after correction error rates. In
`interleaving, a well known scheme to handle burst errors,
`data is segmented into words which are then interleaved
`onto the channel. If the maximum error burst consists cffour
`consecutive errors. then interleaving four words results in
`each burst occuring in a separate codeword. Since each
`codeword now has only one error after interleaving, it can be
`corrected.
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`Yet another means for correcting errors is to packetine the
`data and retransmit on detection of a checksum error. For
`virtual channels not requiring low latency, the highest chan-
`nel efficiencies are possible. Ilybrid schemes where error
`correction codes are employed together with retransmission
`of packets on checksum errors are also possible.
`Error
`rates caused by the interference of RF bursts
`between two different ensembles can be significantly
`reduced by judicious assignment of sloLs in each ensemble.
`One assignment scheme that has desirable properties
`employs majority encoding and the use of so-called Opti-
`cally Orthogonal Codes (OOCs}. In this scheme, the 15384
`slots are equally segmented into 256 intervals called sectors.
`A maximum of three RF bursts can occur in each section.
`The position of each burst is dictated by a one in an OOC
`codeword. Codewords have unity auto-correlation and
`cross-correlation with respect
`to rotation by an arbitrary *
`number of slot positions within a sector. The codes are
`mostly zeros with three scattered ones representing the
`locations of the slots in which RF bursts are to be transmitted
`or received. There are ten OOC codewords with a sector
`length of 64 slots. In general, a sector can be assigned any
`one of the ten codewords with a rotation of from zero to 63
`slot positions.
`To assign slots in an ensemble, one of 640 di.lIererlt
`combinations of codeword and rotations is selected for the
`first sector. A eoclewordirotation combination is selected for
`the second section such that 1) the last Rt’ burst postion of
`the last sector codeword and the two RF burst postions of the
`new codeword do not form a codeword and 2) the last two
`RF burst positions of the last sector codeword and the first
`RF burst position of the new codeword do not
`form a
`codewords, and 3]
`the codeword!rotation has not been
`selected before. Each sector consists of three identical RF
`bursts (i.e a majority error correcting code is chosen).
`At any instant of time,
`the frame stnictures of two
`ensembles will in general not be aligned. However, with
`their uncorrelated separate time bases, the frame structures
`will slip past one another and will become aligned. Every
`possible correlation between the two frames will thus even-
`tually occur. Assuming each ensemble is using 100% of its
`bandwidth,
`then it
`is highly likely that at some time a
`codeword in each ensemble will be aligned. When code-
`words from separate ensembles are aligned. a receiver
`captures data from the stronger transmitter. In this case, the
`error correction coding serves no value since it perfectly
`corrects the data of the foreign transmitter. When this
`condition occurs, the probability that another sector is also
`aligned is about 0.002. Thus one sees a worst case uncor-
`rectible error rate of about 0.001. As is well known, this
`uncorrectible error rate is suificlently low that,by employing
`packetizing and retra nsrnitting on chccksum errors, an effec-
`tively error free channel can be obtained.
`the
`As will be understood by those skilled in the art,
`TDMA system is greatly facilitated by the establishment of
`a common frame time base between PEA and PDA.
`In
`establishing this common time base, the present invention
`employs timing or synchronization beacons (SBs) transmit-
`
`45
`
`50
`
`55
`
`60
`
`65
`
`0013
`0013
`
`8
`led by the FDA. Each SB consists of eight RF bursts spread
`out over 252 slots. One of the S135 arbitrarily starts a frame.
`The positions of the remaining seven SBs are selected
`pseudo—randomly with two restrictions. First the maximum
`interval between two successive SBs is less than 6.144
`milliseconds. Secondly, the positions must allow a unique
`frame determination based on the intervals between SBs.
`Thus for example, eqttidistantly spaced SBs are not allowed.
`In accordance with one aspect of the present invention,
`the slot location of each RF burst within all SBs is identical
`for all ensembles. In a particular ensemble, the 32-bit data
`bit pattern of each SB will be identical. Between two
`different ensembles, however, the SB data bit pattern, cho-
`sen randomly, will be quasi-distinct. The combination of SB
`data bit pattern and SB locations allow every ensemble to be
`uniquely identified.
`In the preferred embodiment illustrated in FIG. 6, each of
`the eight SBs 100-107 is immediately followed by a sector
`assigned to the common Communication and Control Chan-
`nel (CCC). The sector immediately following the first seven
`CCC sectors is assigned to the Attention Channels (AC5).
`The CCC sectors are designated by reference characters
`110-117 in FIG. 6 while the Attention Channels are desig-
`nated by reference characters 120-127. As will be explained
`in greater detail later, the CCC and AC are used in main-
`taining the virtual channels between FDA and all PE/\s.
`Referring now to FIG. 7, all PEA activities are activated
`and monitored by the PE/\ controller 43. While the control-
`ler could be implemented in a single custom integrated
`circuit, the present embodiment partitions the controller into
`a commercially available microprocessor 90, a l’ICl6C64, a
`special purpose logic integrated circuit IC 91, voltage con-
`trolled crystal oscillator 44, and a charge pump voltage
`generator 93. Voltage controlled crystal oscillator (VCXO)
`44 is controlled by voltage Vc. sourced by charge pump 93.
`The controller IC 91 can cause the frequency of oscillation
`to change by activating charge pump. Varying the control
`voltage Vc from 0 to -6 volts changes the oscillator fre-
`quency by 50 parts per million. VCXO 44 is powered
`continuously and serves as the time base for all activities.
`The microprocessor chip includes 256 bytes of ROM which
`contains the program instructions needed for all activities
`and 256—bytes of SRAM used in program execution.
`The controller IC 91 serves as the primary control agent
`for all activities. it contains registers, counters, Finite State
`Machines (IiSMs), and as will be explained in more detail
`later, a Digital Matched Filter (DMF) used to detect syn-
`chronization and attachment beacons, and a 1024-:<l6-bit
`SRAM used to store the usage sector assignments in the
`PEAs TDMA plan. While some of the ttctivites are imple-
`mented without microprocessor intervention, most activities
`involve the microprocessor execution of short
`instruction
`sequences. Normally, the microprocessor clock, sourced by
`controller IC 91 is inactive, thus reducing power consump-
`tion. When microprocessor intervention is required, control-
`ler [C 91 activates the microprocessor clock and issues an
`8-bit code over the interconnecting bus to indicate what
`activity the microprocessor is to perform. When the micro-
`processor has completed its program sequence, it issues a
`code to controller IC 91 indicating completion. Controller
`IC 91 then inactivates the microprocessor clock returning
`the micrproccssor into its minimum power consumption
`state.
`
`To reduce power consumption by the controller IC 91,
`only a very small percentage of the logic is clocked con-
`tinuously. Clocks to all remaining sections of controller IC.‘
`
`

`
`6,128,290
`
`10
`
`15
`
`9
`91 are enabled only when required. As is common practice
`in low power designing, the supply voltage of all internal
`logic is reduced to one volt and implemented with special
`low voltage cell designs.
`The PEA controller 43 operates in one of three major
`states: Unattached (U), Sleep (S), and Active (A). These
`states and the state change conditions are described below.
`In the Unattached state,
`the controller has not been
`personalized by any particular PDA.
`It cannot function
`normally until it receives infomtaticn contained in an attach-
`ment packet. This packet is sent over a communications link
`formed when the PDA modem broadcasts Attachment Bea-
`cons in response to the user’s request. An Attachment
`Beacon (AB) is composed of RF bursts having the same
`interval spacings as Synchronization Beacons but with a
`particular bit pattern.
`A pair of Digital Matched Filters (DMl"s) implemented in
`controller If.‘ 91 are the primary means for both receiving the
`attachment packet and for establishing synchronization. As
`shown in FIG. 8, each DMF is composed of I032-bit shift
`register 100, 32-bit DMF Target
`register 101,
`33—comparitors 102-133, a 32—input adder 134, and two
`6-bit comparitors 135 and 136. Limiter 78 output sources
`data to each DMF. One DMF is clocked on the positive edge
`of a 2 Mllz clock derived from VCXO 44 while the other is S
`clocked on the negative edge. Each of the 32-taps on the
`shift register correspond to hit locations of Syncronization
`and Attachement Beacons. The 32-bits from the shift register
`are compared, bit for bit by exnor gates 102-133 with the
`target bit beacon bit-sequence held in DMF Target Register
`101. Adder 134 sums the number of comparitor matches. A
`sum equal to zero indicates that each shift register tap is
`exactly the compliment of the DMF Target Register 101
`while a sum equal
`to thirty—two i