(cid:3) (cid:3) (cid:3) (cid:3) (cid:3) (cid:3) (cid:3) (cid:3) (cid:3) (cid:3) (cid:3) (cid:3)
`
`EXHIBIT
`
`(cid:40)(cid:59)(cid:43)(cid:44)(cid:37)(cid:44)(cid:55)(cid:3)
`DSS-2011
`
`DSS-201 I
`
`

`
`Un_ited States Patent
`[111 3,598,914
`
`I72]
`
`llll
`[22]
`E45]
`[73]
`
`Inventor
`
`Judson B. Synnott, Ill
`Downers Grove, Ill.
`Appl. No. 878.753
`Filed
`Nov. 21, 1969
`Patented Aug. Ill, 1971
`Assignee
`Bell Telephone Laboratories, Incorporated
`Murray Hill. NJ.
`
`[56]
`
`Reterenees Cited
`UNITED STATES PATENTS
`
`3.327.238
`3.4S8,654
`3,504,287
`
`6lI96'l Webber......... ..
`.
`7.-‘I969 Ohnsorge et al.
`3.-‘I970 Deregnaocourt.............
`
`.
`
`l'J")!2 DP
`ITBIZ3
`I'?9Il 5 BS
`
`Primary .E.romi'rier— Kathleen H. Clafly
`Assistant Examiner— David L. Stewart
`Arromeys— R. J. Guenther and James Warren Falk
`
`[541
`
`[52]
`
`I51]
`[59]
`
`TERMINAL FOR COMMON CHANNEL
`SIGNALDIG SYSTEM
`'7 Claims. 2 Drawing Figs.
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`173353,
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`ABSTRACT: A common channel signaling system has a
`duplex signaling channel equipped with terminals that are
`adapted to maintain a constant data rate by inserting idle
`words when there are no data words to be transmitted and by
`inserting an additional synchronizing word when the error
`control information obtained by analyzing a block of data
`from a remote terminal is not completed within a predeter-
`mined interval before the arrival of the word position which is
`nonnaily intended to contain such error control information.
`
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`3,598,914
`
`1
`
`TERMINAL FOR COMMON CHANNEL SIGNALING
`SYSTEM
`
`BACKGROUND OF THE INVENTION
`
`5
`
`This invention relates to data transmission systems and
`more particularly to a common channel signaling system of
`the type described, for example, in the copendirtg application
`
`40
`
`the process of transmitting a first block of data. Under these
`circumstances, the terminal with the slower transmitter would
`have received more than one block of data from the terminal
`with the faster transmitter and might have formulated error
`control words for these blocks. Because its transmitter was
`operating slowly it would have perhaps two error control
`words on hand when it was finally able to send a BLOCK
`word. Under these circumstances. the faster terminal would
`have to store all of the data for two transmitted blocks and
`might interpret the block word which it finally received as ap-
`
`70
`
`75
`
`of W. B. Smith and J. B. Synnott lll, Ser. No. 831,006, liled 10
`June 6, l969.
`l-lerctofore data transmission systems have been known in
`which the signaling channel connecting two terminals is in
`continuous operation and in which idle words are injected by
`the terminal whenever there are no data words available to be I 5
`transmitted. In some applications, this approach is found to be
`desirable because it avoids the necessity of bringing the trans-
`mitting and receiving ends of the signaling channel
`into
`synchronization each time the stream of actual data words is
`interrupted as when there is no data to be sent. Since the 20
`system is in continuous operation, delays occasioned by the
`need to resynchronize may largely be avoided. However, even
`though the system may continuously be transmitting actual
`data, the mutilation of a data word or, in some systems, of an
`idle word, may be so bad as to cause loss of synchronization. 25
`Under these circumstances, a resynchronization procedure
`must be followed. The ability to resynchronize is an inescapa-
`ble requirement of almost any conceivable signaling system.
`In the copending application of W. B. Smith et al. men-
`tioned above, there is described an interofiice common chan- 30
`net signaling system using stored program controlled data
`processing equipment at each terminal. The program-con-
`trolled data processor supervises the loading of the transmitter
`from the storage unit at the terminal and erases the trans-
`mitted words from the storage unit when the distant terminal 35
`has forwarded error control information in the form of a
`BLOCK word which verifies that all of the transmitted words
`constituting an integral message have been correctly received
`at that distant terminal. In that application, data messages
`stored in the storage unit of the processor might be either sin-
`gle word or multiword messages. The rnultiword messages
`might on some occasions be distributed over more than one
`transmitted block. Accordingly, the processor was charged
`with the task of not releasing a multiword message from
`storage even though a BLOCK word indicated that son1e of
`the words which were contained in a previously transmitted
`block had been correctly received. Only when all of the words
`of a message in each of the blocks in which they happen to
`have been transmitted were identified as correctly received
`could the words constituting the message be erased from
`memory.
`In the data transmission system disclosed in the above-men-
`tioned Smith-Synnott application, it was desired that starting
`up delays be avoided and to this end the system was kept in
`continuous operation. ldle words were sent when there were
`no available data words to be sent. Accordingly, the previous
`system exhibited an inherent degree of synchronization
`between the transmitter atone tenninal and the receiver at the
`other terminal of the transmission channel. Because the trans-
`mitters at each terminal would be controlled by individual
`clocks and these clocks would not operate at exactly the same
`rate. it was possible for the terminal having the faster trans-
`mitter to transmit all or part of a second block of data during
`the time that the transmitter at the slower terminal was still in
`
`45
`
`50
`
`55
`
`60
`
`65
`
`2
`plying to the wrong one of these stored blocks of data. Ac-
`cordingly, a new terminal has been designed which controls
`the data rate of its transmitter so that it will be unnecessary to
`store an excessive amount of data because the transmitter at a
`remote terminal is slower in acknowledging the receipt of
`messages.
`ln the aforementioned data transmission system the ter-
`minal was adapted to detect idle words that were received
`over the signaling channel and to prevent the transmission of
`such idle words to the central processor. This saved central
`processor operating time inasmuch as therewould be no need
`to require the distant terminal to retransmit an idle word even
`if it were distorted in transmission. Though idle words were
`thus individually detected. if all of the words which a terminal
`happened to receive in a data block were idle words, it would
`still have to use its amsociated processor to fabricate a BLOCK
`word for. transmission back to the distant terminal because the
`distant terminal always expects to receive error control infor-
`mation pertaining to its last transmitted block. The distant ter-
`minal, however, was not enabled in the aforementioned dis-
`closure to distinguish BLOCK words relating to idle blocks
`from BLOCK words acknowledging the transmission of actual
`data. Accordingly, the central processor at the distant ter-
`minal was required to process such "completely idle“ BLOCK
`words resulting in some degradation of central processor
`operating eflicieney. Accordingly, it would be desirable to
`prevent BLOCK words which merely acknowledge the trans-
`mission of blocks containing nothing but
`idle words from
`being processed by the central processor.
`SUMMARY OF THE [N VENTION
`
`The foregoing and other objects of the present invention are
`achieved in one illustrative embodiment in which the terminal
`includes a transmitter word list, a receiver word list, and a
`mode control circuit for selectively transferring words from
`the transmitter and receiver word lists to the transmitter and
`receiver buffer circuitry to establish synchronization with the
`remote terminal and to prevent the difference in transmitting
`rates of the terminals from causing loss of synchronization.
`In accordance with one aspect of the operation of the
`system of the present invention, the transmitter at the terminal
`at each end of the signaling channel will transmit a series of
`RESYNC words until
`the receiver at
`that
`terminal has
`received a RESYNC word from the remote tenninal. At this
`point the transmitter is instructed to send SYNC words to the
`remote terminal. Following the correct receipt of a SYNC
`word, the remote terminal will send two more SYNC words
`followed by data words from the transmitter buffer. According
`to this aspect of the operation of the illustrative embodiment,
`a terminal changes to data transmission whenever it has been
`simultaneously receiving and sending SYNC words for two
`consecutive word intervals.
`In accordance with another aspect of the operation of the il-
`lustrative embodiment, the receiver at a terminal analyzes the
`data words received from the distant terminal and formulates
`error control information which is to be passed to the trans-
`mitter and transmitted by that transmitter in the form of a
`BLOCK word to the distant terminal. During the synchroniza-
`tion procedure, if the receiver at the terminal has not yet for-
`mulated error control information because of it time delay in
`the transition from SYNC words to data at the transmitter of
`the distant terminal, the receiver will notify the terminal con-
`trol circuitry to cause the transmitter to insert a SYNC word in
`place of the BLOCK word which would normally be trans-
`mitted to the remote terminal.
`In this manner,
`the first
`BLOCK word transmitted corresponds to the first complete
`block of data received. Synchronization is complete when
`both terminals have transmitted and received an initial
`BLOCK word.
`Once the terminals at each end of the channel are
`synchronized data words and BLOCK words wiil be continu-
`ously sent in both directions. Advantageously. the receiver at
`
`

`
`3,598,914
`
`3
`a terminal should formulate error control information in suffi-
`cient time for it to be available for insertion into the BLOCK
`word about to be sent by its associated transmitter.
`When, however. the receiver at a synchronized terminal for-
`mulates error control information within too small an interval
`before that data is to be transmitted in a BLOCK word, a con-
`dition which may be caused by a slow transmission rate of the
`transmitter at the distant terminal, the receiver will notify the
`terminal control circuitry to cause the transmitter to send a
`SYNC word immediately following that BLOCK word. In this
`manner, the receiver at a terminal which is constrained in its
`formulation of its error control information by the slow trans-
`mission rate of the remote terminal causes its associated trans-
`mitter to insert a SYNC word following a BLOCK word.
`thereby extending the length of that particular block of data
`and reducing the transrnitter's rate of effective data transmis-
`SICII1.
`
`DESCRIPTION OF THE DRAWING
`
`The foregoing and other objects and features may become
`more apparent by referring now to the detailed description
`and drawing in which:
`FIG. 1 shows in block diagram form an overall schematic
`view of a common channel signaling system including ter-
`minals of the type disclosed in the aforementioned copending
`application ofW. B. Smith and J. B. Synnott Ill; and
`FIG. 2 shows the improved terminal of the present invention
`to be used in the system ofFICi. 1.
`
`DETAILED DESCRIPTION
`
`10
`
`I5
`
`20
`
`25
`
`30
`
`Referring now to FIG. 1. there is shown a data transmission
`system employing common channel signaling. This system will
`be described with respect to a local central office which con-
`tains data processing system 300. trunk channel terminals 106
`and 206 and common signal channel terminals 108 and 208.
`Remote from the central office comprising the aforemen-
`tioned equipment are two distant central oflices "A” and “B“
`which are accessible for communications purposes over a plu-
`rality of trunk channels 1-1024 and 2001-3024, respectively.
`At office “A“ are trunk channel
`terminals 107, common
`signal channel terminal 109 and data processing system 400
`which.
`in all respects may be similar to local office data
`processing system 300. At remote office "B“ there are.
`similarly, trunk channel terminals 20?, signal channel terminal
`209 and data processing system 500.
`Trunk channels l—l024 may be thought of as carrying in-
`dividual voice conversations between the local central office
`and remote ofiice “A " and the common signaling channel ex-
`tending between terminals 108 and 109 may be thought of as
`carrying the information nece: .ary for setting up connections
`to and from the trunk channel terminals 106 and 107 at the
`respective offices. The signaling information carried over the
`common signaling channel would typically include such infor-
`mation as the called lelephone number which is transmitted in
`the forward direction from the calling to the called office and
`answer
`supervision which is
`transmitted in the reverse
`direction. In this regard. the called telephone number would in
`most instances be in the form of a multiword message whereas
`answer supervision would normally be expected to be :1 single
`word message.
`Normally data words are supplied by central processor
`system 300 over bus 6406 to terminal 108 for transmission
`over the common signaling channel. when data words are
`present on bus 6406 inhibit gate 108-5 in tenninal 108 is in-
`hibited. However, when there are no actual data words availa-
`ble in call store 103 to be placed on bus 6406 inhibit gate
`I08-5 is unblocked and idle word generator 103-3 provides a
`word to transmitter 10B—2 for transmission over the common
`channel via duplex modem I03-1.
`Since it is desired that data processing system 300 not be
`burdened by considering idle words that are received at ter-
`minal 103 over the common signaling channel, an idle word
`
`35
`
`40
`
`45
`
`S0
`
`55
`
`60
`
`65
`
`70
`
`"I5
`
`4
`detector 108-11 is associated with receiver 108-10 such as
`the idle word detector 103-1 1 will activate the inhibit ter-
`minal of gate 108-12 to prevent receiver 108-10 from deliver-
`ing an idle word to the scanner of data processing system 300.
`The information which receiver 108 is permitted to deliver to
`data processing system 300 is entered by the scanner thereof
`over cable 6600 into one of the internal registers of the com-
`mon control of the data processing system. In the normal
`course of events this register places the information into call
`store 103 in an interface register thereof assigned to terminal
`108. Similarly, data processing system 300 scans the receiver
`output associated with signal channel terminal 208 and even-
`tually inserts the infonnation provided therefrom into a call
`store interface register assigned to terminal 203. The central
`control and call store 103 may advantageously be of the type
`described in detail in the copending application of R. W.
`Downing et al., Ser. No. 334,875, filed Dec. 31. I963 and in
`the Bell System Technical Journal. Sept. 1964, particularly
`pages 1.845 through 1,959 dealing with the central processor
`organization and the stored program organization and pages
`2.021 through 2,054 dealing with the peripheral bus system.
`Reference may also be made to the copending application of
`J. A. 1-larr, Ser. No. 590,928 filed Oct. 3 1 , I966, for further in-
`formation concerning the basic data processing system em-
`ployed in the illustrative embodiment.
`Referring now to FIG. 2, there is shown the improved data
`terminal of the present invention. The principal elements of
`the signaling channel terminal 108' are. ofcourse. the receiver
`110 and transmitter 104. In this regard it should be noted that
`while the reference number 108' has been chosen to cor-
`respond to the signaling channel tenninal 108 ( FIG. I herein
`and also ofthe above-mentioned copending application of W.
`B. Smith and .l. B. Synnott Ill). the remaining reference num-
`bers in the ensuing description will not in general correspond
`to the items of structure disclosed in that case because the ad-
`ditional number ofcomponents described herein makes paral-
`lel numbering inconvenient.
`The transmitter 104 and receiver 110 of FIG. 2 may ad-
`vantageously comprise a data set capable of operating at
`2,000 bits per second over a standard telephone transmission
`circuit. The receiver advantageously may be of the type which
`derives bit synchronization from the incoming data trans-
`mitted by the remote terminal. The synchronization thus
`achieved by receiver .110 is used to control the receiver clock
`1 11 over a synchronizing path (not shown). Receivers capable
`of deriving synchronization from the incoming data stream
`being well known, the details thereof need not be set forth
`herein. Of course.
`it
`is known that receivers are available
`which can maintain synchronism for a substantial interval fol-
`lowing interruption of the data bits stream carrier. To this end
`it
`is envisioned that a conventional receiver adapted to
`operate at the aforementioned 2.000 bit per second signaling
`rate and which would have the characteristic of being able to
`maintain synchronism for approximately one second after car-
`rier interruption would be desirable in practicing the present
`invention. Timer 112 connected to receiver 110 will. in addi-
`tion to performing other timing functions hereinafter to be
`described, after I second, notify mode control circuit 114 in
`the event that receiver 110 detects a carrier failure. Upon
`such notification mode control circuit 114 initiates the
`sequence
`of
`operations
`required
`for
`reestablishing
`synchronization.
`The
`procedure
`for
`reestablishing
`synchronization is basically identical to the startup procedure
`which is to be employed when the system is initially placed
`into operation.
`
`ESTABLISHING SYNCHRONIZATION
`
`When the terminal 108' and the distant terminal 109' (not
`shown) at opposite ends of the signaling channel are initially
`placed in service,
`they are of course completely out of
`synchronization. Under these circumstances output 114-] of '
`mode control circuit 114 controls gate G3 to gate RESYNC
`
`

`
`3,593,914
`
`5
`word R from transmitter word list 105 to transmitter interim
`buffer 106 and thence to transmitter shift register 107. The
`hits of RESYNC word R which have been entered in trans-
`mitter shift register 10? are shifted out at the transmission
`signaling rate under the control of transmitter clock 109 and
`are then transmitted by transmitter 104 to the distant ter-
`minal. In addition, output 114-2 of mode control circuit 114
`activates gate (3-2 to convey a single RESYNC word to
`receiver buffer 115 from receiver word list 116. Simultane-
`ously, gate G—2 activates signal present flag flip-flop I28.
`Receiver buffer 115 and signal present flag flip-flop 128 are
`scanned by the scanner of the local office data processing
`system 3110 (FIG. 1) to inform the central processor as to the
`status of the terminal. Thus. during the initial phase ofstartup.
`the presence of a RESYNC word in receiver buffer 115 noti-
`fies central processor
`that
`the terminal
`is attempting to
`reestablish synchronization.
`Word monitor 117 contains a wired logic pattern identical
`to the RESYNC word bit format. As receiver 110 of the ter-
`minal receives a word from the distant terminal, the bits of the
`word, under control of receiver clock Ill and gate G-1, are
`shifted into receiver shift register 118. Monitor 117 matches
`the pattern of bits in shift register 118 against the wired logic
`pattern. When word monitor 1 17 has successfully matched all
`of the bits of a word, a “frame" signal is sent by it to receiver
`clock .111. Word synchronization has now been obtained.
`Word monitor 111' now notifies mode control 114 that word
`synchronization has been established, and,
`in response
`thereto, mode control 114 controls gate G—3 to transfer a
`SYNC word, 8, from transmitter word list 105 to transmitter
`interim buffer 106 for transmission by transmitter 104 to the
`distant terminal. At this point in the startup process. RESYNC
`words are being correctly received and SYNC words are being
`transmitted by the terminal of FIG. 2.
`The next phase of startup commences when the distant ter-
`minal, which in all respects is similar to terminal 108’ of FIG.
`2, likewise achieves word synchronization and begins to trans-
`mit SYNC words to the terminal of FIG. 2. When the first such
`SYNC word is received by receiver 110 of terminal 108’ and
`entered into shift register 118, it will be detected by word
`monitor I 17 matching the contents of shift. register 118 with
`its internally wired SYNC word bit format. At this time word
`monitor 117 notifies mode control 114 that a SYNC word has
`been received. In response thereto, mode control 1 14 succes-
`sively controls gate (3-3 to transfer two more SYNC words
`from transmitter 105 to transmitter interim buffer 106 so
`these words can be transmitted by transmitter 104 to the
`distant terminal. Immediately thereafter. mode control I14
`controls gale Ci-3 to transfer a data word from transmitter
`buffer 120 to the transmitter interim buffer 106 for transmis-
`sion by transmitter 104 to the distant terminal.
`Thus far it has been assumed that terminal 108’ of FIG. 2
`achieved word synchronization before the distant terminal.
`i.e.. terminal 108' switched from transmitting RESYNC words
`to transmitting SYNC words while receiving RESYNC words
`from the distant terminal. Of course. it is possible for the
`distant terminal to achieve word synchronization before ter-
`minal 108’. Under these circumstances, the distant terminal
`will send a SYNC word to terminal 108’ while terminal 108’ is
`still sending RESYNC words. When the SYNC word arrives at
`receiver 110 it is shifted into register 1 18. The SYNC word bit
`pattern in register 118 is recognized by word monitor circuit
`117 and circuit 117 notifies mode control circuit 114. Mode
`
`control circuit 114 immediately causes gate (3-3 to succes-
`sively transfer two SYNC words from transmitter word list 105
`to transmitter interim buffer 106 for transmission by trans-
`mitter 104 to the distant terminal. Thereafter, mode control
`I 14 operates gate (3-3 to transfer data words from transmitter
`buffer 12 to interim buffer 106.
`
`From the foregoing it will be appreciated that a terminal of
`the present invention may change to data transmission when-
`ever it has been simultaneously receiving and sending SYNC
`words for two consecutive word intervals.
`
`5
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`10
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`25
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`60
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`65
`
`70
`
`75
`
`6
`RECORDING OF DATA-IDLE STATUS, TRANSMITTER
`OPERATION
`
`When, as last described, mode control circuit 114 has in-
`structed gate G—3 to commence transferring data words from
`transmitter buffer 120 to transmitter 104 (via the path previ-
`ously detailed}, mode control 114 next activates output 114-3
`to set the transmitter word and block counters 121 to "0" and
`“ l ", respectively. and these counters, in turn, update the ap-
`propriate data indicator bit in data-idle record store I23 for
`block position one. Data-idle record 123 advantageously may
`comprise a small magnetic core array in which a group of
`cores is provided per transmitted block to register a “l " bit
`whenever a data word is actually transmitted in a particular
`word position of the block. Such transmission occurs when-
`ever transmitter buffer 120 contains a data word at the time
`that gate G-3 is enabled by mode control 114. For example,
`when a data word is available for transmission in the first word
`position of block number one, the indicator bit in data-idle re-
`gister l23 for the first word position in black one would be Set
`to “l." However, if transmitter buffer 120 were empty, as in-
`dicated by the Busyfldle Bit output lead, an IDLE word I
`would be gated by gate G-3 (under control of cloclt 109 and
`transmitter counter 121) from transmitter word list 105 to
`transmitter interim buffer 106. Simultaneously, the data in-
`dicator bit in data-idle record 123 for the first word position of
`block one would be set to “0.“ Data-idle record 123 may con-
`tain as many groups of such cores as are indicated by the max-
`imum number of blocks to be transmitted in the round trip
`transit time of the common signaling channel.
`As thus far described, data-idle record 123 contained a
`word per transmitted block, each bit position of which word
`was set to a "1" when the corresponding word position in the
`transmitted block was a data word and which was set to “0“
`when the corresponding word position contained an idle word.
`The purpose of storing this information in data-idle record
`123 is to permit data-idle record 123 to provide a special indi-
`cation to gate G—2 later on when a BLOCK word is returned
`from the distant terminal regarding the transmitted block. In
`the event that all of the cores in data-idle record 123 pertain-
`ing to a specific transmitted block have all been set to “Cl,"
`data-idle record 123 will inhibit gate G-2 and prevent the
`BLOCK word received from the distant terminal from being
`forwarded to data processor 300. Thus, the processor will not
`be concerned with processing BLOCK words pertaining to
`completely idle blocks. Some simplification of data-idle
`record 123 can, of course. be achieved by merely providing
`one core per transmitted block which core will be set to “ l "
`whenever any word position in the transmitted BLOCK con-
`tains a data word. Under these circumstances, gate (3-2 will
`not be inhibited because the BLOCK word acknowledging
`receipt of the transmitted block by the distant terminal is not a
`block word pertaining to a completely idle block. However,
`employing a data-idle record 123 which contains a core per
`word position per transmitted block permits the error control
`field of the BLOCK word as defined in the above-mentioned
`copending application to be filtered as well so that the proces-
`sor will receive only those error bits of the BLOCK word per-
`taining to word positions in which actual data words were
`transmitted.
`Returning now to the circuitry in the right-hand portion of
`FIG. 2. the data, idle, SYNC or RESYNC words in transmitter
`shift register 10‘? are shifted to transmitter 104 under control
`of transmitter clock 109. Parity generator 124 computes the
`parity checlt bits which are to be transmitted as an appendage
`to each data word in the illustrative system. The parity bits
`computed by parity generator 124 are appended to the word
`in transmitter shift register 10'?’ as the word is shifted out to
`transmitter 104. Transmitter clock 109 increments transmitter
`word and block counter 12! and periodically, gate G—4 is ena-
`bled to gate the contents of counter 12] to the scanner of the
`central processor 300. The transmitter word and block
`counter may advantageously he used by the central processor
`to determine the word and block assignment for data words
`
`

`
`'7
`
`3,598,914
`
`8
`
`about to be transmitted to transmitter buffer 120. The Busy!l-
`dle Bit lead of transmitter buffer 120 inhibits the transfer of
`the contents of the transmitter block and word counter 121
`via gate G4 to the processor 300. thereby notifying the
`processor 300 that transmitter buffer 120 is filled.
`After the first nine (data or IDLE) words have been trans-
`mitted by transmitter 104 to the distant terminal. a BLOCK
`word containing the error record of the most recently received
`block of data would normally be gated into transmitter shift
`register 10'! for transmission to the distant terminal. If. how-
`ever. error control circuit 119 and received block error record
`circuits 126 have not yet formulated this infonnation for a
`complete block. gate (3-3 will be controlled by the received
`block error record circuits I26 and the transmitter word
`counter 121 to transfer a SYNC word. 5, from transmitter
`word list 105 to transmitter interim buffer 106 for transmis-
`sion by transmitter 104 to the distant terminal in the block
`word position.
`
`RECEIPT OF DATA WORDS AND IDLE WORDS
`
`As the words are received in receiver 110 from the distant
`terminal, gate G~l passes the words to error control 119.
`Error control circuit I19 derives check bits by analyzing the
`data bits of the word and compares the check bits with the
`parity bits which are appended to each incoming word. Data
`words are gated from receiver shift register 1 18 to receiver in-
`terim buffer 127 while error control circuit 119 analyzes the
`data bits. If a match is attained between the parity bits and the
`check bits, error control 119 instructs received block error
`record 126 to insert a “0" at the bit position marked by
`receiver word counter 125. Error control 119 then causes gate
`G—-2 to transfer the data word from the interim buffer 127 to
`receiver buffer 115. When a correct data word has been trans-
`ferred to receiver buffer 115, signal present flip-flop circuit
`128 is activated to inform the central processor, which thereu-
`pon may obtain the data word by scanning receiver buffer
`1 15.
`
`If one of the words in the data block is an idle word, it will
`be so recognized by word monitor ll‘.-' detecting a bit pattern
`in shift register 118 corresponding to the bit pattern of its
`wired idle word, 1. Under these circumstances gate G-2 will be
`blocked by word monitor 117 and so the idle word will not
`reach receiver buffer 115 even though it
`is transferred to
`receiver interim buffer 127.
`
`ll‘ error control circuit 119 detects a disagreement between
`the parity bits appended to the received data bits and the
`check bits computed by examining the data bits of the
`received word, it sets the bit position in received block error
`record 126 corresponding to the word position in the received
`block to “l." Simultaneously. an ERROR code word E is
`rrated from receiver word list 116 by gate C-2 to receiver
`buffer H5. The presence of the error word in receiver buffer
`I15 enables
`the
`central processor
`to commence the
`procedures described in the aforementioned copending appli-
`cation of W. B. Smith and J. B. Synnott [I] so that a multiword
`message. if one is currently being received. might be aban-
`doned in anticipation of its required later retransmission by
`the distant terminal. In this regard it should be noted that the
`terminal of the present invention is not limited solely for use
`with a central processor which has been programmed as
`described in that application; i.e., one which provides for
`retransmitting only those words constituting an integral data
`word message. but may also be used in connection with a cen-
`tral processor which is somewhat more simply programmed to
`call for the retransmission of an entire block of data words
`when any word in the block is recorded to be in error.
`A BLOCK word nonrially follows a predetermined number
`of data words to constitute a uniform length block in transmis-
`sion. ln the illustrative system, for example. the BLOCK word
`may appear after a group of nine data or idle words have been
`transmitted. During the startup or synchronizing mode. how-
`ever. n sync word may be received by receiver 110 instead of a
`
`BLOCK word because the distant terminal may not have
`completed assembling the error record for the block previ-
`ously transmitted by the terminal of FIG. 2 at the time when
`the distant terminal was to have transmitted the BLOCK word.
`When. under these circumstances