UNITED STATES PATENT AND TRADEMARK OFFICE
`____________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________
`
`LG ELECTRONICS, INC.
`Petitioner
`
`v.
`
`ADVANCED MICRO DEVICES, INC.
`Patent Owner
`____________
`
`Case No.: IPR2015-00324
`
`Patent 6,895,520
`____________
`
`PETITIONER’S REPLY IN SUPPORT OF ITS PETITION FOR INTER PARTES
`REVIEW OF U.S. PATENT NO. 6,895,520
`
`

`
`TABLE OF CONTENTS
`
`Page
`
`B.
`
`C.
`
`I.
`
`II.
`
`AMD’S ATTEMPT TO ADD NEW AND UNSUPPORTED
`LIMITATIONS TO THE CLAIMS SHOULD BE REJECTED...................1
`A.
`“Block utilization information” is not “an amount of block usage
`over time.” ............................................................................................2
`1.
`Utilization information does not have to be collected over
`multiple cycles ...........................................................................2
`Utilization information does not require an “amount................3
`2.
`“Block utilization levels” are not required to be indicative or
`based on block utilization information.................................................5
`“Adjust[ing] power consumption levels of the functional blocks
`to match respective block utilization levels” does not require two
`operational states ..................................................................................7
`1.
`The ’520 patent does not disclaim or differentiate itself
`from prior art activating/deactivating functional units ..............7
`The plain meaning of “adjust power consumption levels of
`the functional blocks to match respective block utilization
`levels” is consistent with turning a functional unit on and
`off and does not require two operational states .........................8
`The specification discloses two-mode on/off systems and
`all of the embodiments are consistent with the broad plain
`meaning of the claims ................................................................9
`BERTIN ANTICIPATES CLAIMS 16-18 AND 20....................................11
`A.
`Bertin discloses collection of utilization information, which is
`used to adjust power consumption to match block utilization
`levels...................................................................................................12
`1.
`SVT is utilization information .................................................12
`2.
`RVT is utilization information.................................................13
`3.
`Bertin discloses that utilization information may be
`collected over multiple cycles..................................................14
`
`2.
`
`3.
`
`-i-
`
`

`
`B.
`
`B.
`
`V.
`
`The system of Bertin is “responsive to the block utilization
`information to independently adjust power consumption
`levels of the functional blocks to match respective block
`utilization levels.” ....................................................................14
`Bertin discloses independently adjusting the frequencies of
`functional units...................................................................................16
`III. BERTIN RENDERS OBVIOUS CLAIMS 21-23 .......................................16
`IV. GUNTHER ANTICIPATES CLAIMS 16-18 AND 20...............................18
`A.
`Gunther anticipates claims 16-18 and 20 because it discloses
`adjusting power consumption to match block utilization ..................18
`1.
`Gunther discloses more than one operational state..................18
`2.
`Even the clock gating embodiments of Gunther anticipate
`the claims .................................................................................19
`Gunther discloses circuits blocks having the capability to both
`adjust supply voltage and frequency and thus anticipates claim
`18 ........................................................................................................20
`GUNTHER AND ACPI RENDER OBVIOUS CLAIMS 21-23.................22
`A.
`The claimed adjustment limitation is separately disclosed by
`both Gunther and ACPI......................................................................22
`ACPI would be combined with Gunther by one of ordinary skill .....23
`B.
`ACPI was a printed publication .........................................................23
`C.
`VI. CONCLUSION.............................................................................................25
`
`TABLE OF CONTENTS
`(continued)
`
`Page
`
`4.
`
`-ii-
`
`

`
`TABLE OF AUTHORITIES
`
`Page(s)
`
`Cases
`Invitrogen Corp. v. Biocrest Mfg., L.P.,
`327 F.3d 1364 (Fed. Cir. 2003) ..........................................................................10
`
`Medtronic Inc. v. Edwards Lifesciences Corp. Et al.
`Case.......................................................................................................................3
`
`Microprocessor Enhancement Corp. v. Texas Instruments, Inc.,
`520 F.3d 1367 (Fed. Cir. 2008) ..........................................................................21
`
`Numatics, Inc. v. Balluff, Inc.,
`2014 U.S. Dist. LEXIS 176759 (E.D. Mich. Dec. 16, 2014) ...............................1
`
`Seachange Intl. Inc. v. C-Cor Inc.,
`413 F.3d 1361 (Fed. Cir. 2005) ........................................................................4, 6
`
`Stamps.com, Inc. v. Endicia, Inc.,
`2009 WL 8690120 (C.D.Cal. November 29, 2009) at *10 ................................25
`
`Tomita Technologies USA, LLC v. Nintendo Co., Ltd.,
`855 F. Supp. 2d 33 (S.D.N.Y. Feb. 22, 2012) ......................................................4
`
`-iii-
`
`

`
`PETITIONER’S EXHIBIT LIST
`
`Exhibit #
`
`Description
`
`1001
`1002
`1003
`1004
`1005
`1006
`
`1007
`
`1008
`1009
`1010
`1011
`
`1012
`
`1013
`1014
`
`U.S. Patent No. 6,895,520 (“the ‘520 Patent”)
`Declaration of Paul Min, Ph.D. (“Min Decl.”)
`U.S. Patent No. 6,345,362 (“Bertin”)
`U.S. Patent No. 5,418,969 (“Gunther”)
`U.S. Patent No. 5,781,783 (“Matsuzaki”)
`The Advanced Configuration and Power Interface (ACPI 1.0b)
`“Plaintiffs Advanced Micro Devices, Inc.’s And ATI
`Technologies ULC's Disclosure Of Preliminary Claim
`Constructions And Extrinsic Evidence Pursuant To Patent Local
`Rule 4-2” (AMD Claim Constructions”)
`Declaration of Jamie Beaber
`Declaration of Michael Maas
`Analog Dialogue, Volume 34, 2000
`“Adaptive Program Execution for Low Power in Superscalar
`Processors,” October 1999.
`“OS-Directed Throttling of Processor Activity for Dynamic
`Power Management,” June 1999.
`July 1, 2015 Email from UEFI Administration to Bryon
`Wasserman
`Printout of http://www.uefi.org/acpi/specs
`Copy of ACPI 1.0b specification downloaded from UEFI web
`page at
`http://uefi.org/sites/default/files/resources/ACPI_1_Errata_B.pdf
`1016 (Not Filed) Printout of http://www.acpi.info/spec10b.htm
`1017 (Not Filed) ACPI 1.0b Specification downloaded from
`http://www.acpi.info/DOWNLOADS/ACPIspec10.pdf.
`1018 (Not Filed) First Supplemental Declaration of Paul Min, Ph.D
`1019 (Not Filed) July 13, 2015 Declaration of Bryon T. Wasserman
`1020
`U.S. Patent Publication No. 2003/0188212
`1021
`“ACPI Overview”
`“Power Efficient Processors Using Multiple Supply Voltages,”
`1022
`2000.
`“On the Use of Microarchitecture-Driven Dynamic Voltage
`Scaling”
`
`1015 (Not Filed)
`
`1023
`
`-iv-
`
`

`
`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`
`Exhibit #
`
`Description
`
`1024
`1025
`1026
`1027
`1028
`
`1029
`
`1030
`1031
`1032
`1033
`
`1034
`1035
`1036
`
`Intel Technology Journal Q2, 2000
`Curriculum Vitae of Diana Marculescu
`Intentionally Left Blank
`December 17, 2015 Declaration of Bryon Wasserman
`Hardware Design Guide Version 3.0 for Microsoft Windows
`2000 Server, June 30, 2000
`Information Disclosure Statement from US Patent 7,039,755 File
`History, January 16, 2001
`SMBus Control Method Interface Specification, December 10,
`1999
`US Patent No. 6,407,595
`US Patent No. 7,039,755
`Universal Serial Bus Understanding WDM Power Management,
`Version 1.1, August 7, 2000
`Deposition Transcript of Marc Levitt taken on December 10,
`2015
`Reply Declaration of Paul Min
`Declaration of Diana Marculescu
`
`-v-
`
`

`
`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`In its institution decision, the Board correctly found that the references at
`
`issue anticipated and/or rendered obvious claims 16-18 and 20-23 of U.S. Patent
`
`No. 5,895,520 (the “’520 Patent”). AMD’s attempt to rewrite the claims to cover
`
`an entirely different and narrower invention than the one claimed in the ’520 patent
`
`and should be rejected.
`
`I.
`
`AMD’S ATTEMPT TO ADD NEW AND UNSUPPORTED
`LIMITATIONS TO THE CLAIMS SHOULD BE REJECTED.
`
`In an attempt to distinguish the claims from the prior art, AMD seeks to
`
`rewrite the claims to add the following limitations:
`
`(A)
`
`that “utilization
`
`information” is a percentage of cycles utilized over a period of time larger than one
`
`cycle; (B) that the “block utilization levels” must be the same as the “utilization
`
`information”; and (C) that “adjust[ing] …. to match” requires two operational
`
`states. AMD’s attempts to rewrite the claims were rejected by the Board in its
`
`Institution Decision. Nothing since institution has changed.
`
`Indeed, AMD’s
`
`expert’s declaration simply tracks the arguments in the Response and is nearly
`
`identical, and as such his declaration is not helpful and should be given no
`
`probative weight. (Compare Paper 21 at 11-15 to Ex. 2002 at ¶¶37-47 (utilization
`
`information construction); Paper 21 at 16-18 to Ex. 2002 at ¶¶48-50 (block
`
`utilization levels construction); and Paper 21 at 18-24 to Ex. 2002 at ¶¶51-57
`
`(“adjust..to match” construction).) See Numatics, Inc. v. Balluff, Inc., 2014 U.S.
`
`Dist. LEXIS 176759, *6-18 (E.D. Mich. Dec. 16, 2014) (“An expert witness who
`
`Page 1
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`

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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`is merely a party’s lawyer’s avatar contributes nothing useful to the decisional
`
`process.”)
`
`A.
`
`“Block utilization information” is not “an amount of block usage
`over time.”
`
`1.
`
`Utilization information does not have to be collected over
`multiple cycles
`
`AMD repeats its previously presented and rejected argument that utilization
`
`must be collected over a “period of time,” but does not explain what a sufficient
`
`amount of time is. See Paper 21 at 11-16, Paper 12 at 15-17, Paper 13 at 6-7. As
`
`described by Dr. Min, all events happen over a period of time, so AMD’s
`
`construction offers no useful clarification. Ex. 1035 at ¶¶5-6. AMD suggests
`
`that such a period of time must be larger than a single clock cycle but offers no
`
`support for such a proposition.
`
`AMD cites to certain extrinsic evidence describing utilization over a period
`
`of time and/or suggesting that it is a ratio. Ex. 1035 at ¶6. But, as AMD’s
`
`expert conceded, an indication of whether even a single component is in use for a
`
`single cycle is still information about utilization over a period of time (the length
`
`of the cycle) and the values returned by such a comparison (0/1 or 1/1) are still
`
`consistent with such a definition. Ex. 1035 at ¶6; Ex.1034 at 108:7-12.
`
`While certain exemplary embodiments disclose collecting usage over
`
`multiple cycles, such embodiments are always described permissively. (See e.g.,
`
`Page 2
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`

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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`Ex. 1001 at 3:15-3:28; 3:46-53) and qualified by language that the embodiments
`
`are not intended to be limiting (Ex. 1001 at 7:58-8:6).1 Ex. 1035 at ¶¶8-9.
`
`Beyond the precedent that specifically bars importing terms from the specification
`
`into the claims, such permissive language has been relied upon repeatedly as a
`
`particularly strong indication that such features are not essential to the claimed
`
`invention. See Medtronic Inc. v. Edwards Lifesciences Corp. Et al. Case no.
`
`8:12-cv-00327 (C.D. Cal. March 13, 2013) citing Rexnord Corp. v. Laitram Corp.,
`
`274 F.3d 1336, 1342 (Fed. Cir. 2001). Accordingly, AMD’s position that
`
`“utilization information” must be collected over multiple clock cycles should be
`
`rejected.
`
`2.
`
`Utilization information does not require an “amount
`
`AMD ignores the fact that the ’520 patent does not claim “utilization” but
`
`instead claims the much broader “utilization information.”2 One of ordinary skill
`
`in the art would understand that “utilization information” covers additional
`
`1 At page 15 AMD cites to Dr. Min’s characterization of one ‘520 embodiment to
`
`argue that utilization must be collected over a period of time, but the full context
`
`shows that Dr Min referred to frequency at which utilization information was
`
`sampled, not the number of cycles included in a sample. Ex. 2004 at 39:2-40:22.
`
`Ex. 1035 at ¶10.
`
`2 Unless otherwise indicated all emphasis in quotes herein is added.
`
`Page 3
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`

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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`information relating to or resulting from utilization. Ex. 1035 at ¶11. This
`
`contrasts with the more precise terminology in the claims such as “block utilization
`
`levels.” See e.g. Tomita Technologies USA, LLC v. Nintendo Co., Ltd., 855 F. Supp.
`
`2d 33, 39 (S.D.N.Y. Feb. 22, 2012) (holding that “cross-point information” was
`
`broader
`
`than “cross point”
`
`and included “information relating to the
`
`cross-point…”). Id. Indeed, the ’520 patent offers examples of information, such as
`
`raw number of instructions executed or number of idle cycles, which is collected as
`
`“utilization information” and used to determine a usage level when combined with
`
`other information. Ex. 1001 at 4:25-31.
`
`AMD’s narrow construction also runs afoul of the doctrine of claim
`
`differentiation, because dependent claims of the ’520 patent recite examples of
`
`utilization information that are themselves broader than AMD’s proposed
`
`construction.
`
`For example, claim 1 recites “utilization information,” but
`
`dependent claim 5 recites “wherein the block utilization information from one of
`
`the functional blocks provides an indication of what percentage of time the one
`
`functional block is being used.” First, the “percentage/ratio of time” specificity that
`
`AMD seeks to import into “utilization information” is separately recited in a
`
`dependent claim, creating a presumption that it is not a necessary feature of
`
`“utilization information.” See Seachange Intl. Inc. v. C-Cor Inc., 413 F.3d 1361,
`
`1368-1369 (Fed. Cir. 2005) (internal citations omitted). (“The doctrine of claim
`
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`

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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`differentiation …. is at its strongest “where the limitation sought to be 'read into' an
`
`independent claim already appears in a dependent claim.” )
`
`Furthermore, even the presumptively narrower claim 5 only recites that the
`
`“utilization information” includes “an indication.” Similarly, claim 6 recites that
`
`the “utilization information” only requires “dispatch information relating to how
`
`many operations have been dispatched to or within the functional block.” Ex.
`
`1035 at ¶¶12-14. These broader examples in dependent claims confirm that the
`
`plain meaning of “utilization information” encompasses information indicating or
`
`relating to utilization. Accordingly, for the reasons stated above “utilization
`
`information” should be given its broader plain meaning and not be restricted to “an
`
`amount of block usage over a period of time.”
`
`B.
`
`“Block utilization levels” are not required to be indicative or based
`on block utilization information.
`
`Despite the board’s determination that “block utilization level” should be
`
`construed according to its ordinary and customary meaning, AMD seeks again to
`
`introduce an improperly narrow construction. Paper 13 at 7. The challenged claims
`
`of the ’520 patent, recite “utilization information” that is collected from utilization
`
`circuits. They also recite that the claimed circuit “is responsive to the block
`
`utilization information to independently adjust power consumption levels of the
`
`functional blocks to match respective block utilization levels.” In other words, the
`
`circuit uses past utilization information to adjust power consumption so that going
`
`Page 5
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`

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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`forward it better matches block utilization levels.3 Ex, 1035 at ¶15-16.
`
`This merely requires that the “utilization information” be used to match
`
`power consumption to block utilization levels. It does not require that the “block
`
`utilization levels” be the same as the “block utilization information” or even that
`
`one be derived from the other. Ex. 1035 at ¶¶15-17. AMD’s expert Dr. Levitt
`
`admitted that neither the sections of the ’520 patent he cited nor any other part of
`
`the ’520 patent discloses any relationship between utilization levels and utilization
`
`information. Ex. 1034 at 128:14-130:3.
`
`Dependent claim 27 specifically recites that
`
`the matching step should
`
`involve increasing power consumption when utilization information indicates
`
`increased utilization, creating the presumption that other claims do not require any
`
`relationship between the utilization levels and the direction of the power increase
`
`(and thus do not require any relationship between utilization information and
`
`utilization levels). See Seachange Intl. Inc. v. C-Cor Inc., 413 F.3d at 1368-1369.
`
`Ex. 1035 at ¶20.
`
`Indeed,
`
`the ’520 patent
`
`includes an embodiment
`
`in which clocks are
`
`deactivated, instructions are accumulated, and then clocks are turned on so that the
`
`3 Claim 23 similarly requires that the adjustment task be performed “according to
`
`the block utilization information” but claims no relationship between block
`
`utilization information and block utilization levels.
`
`Page 6
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`

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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`instructions can be run in burst mode. See Ex. 1001 at 7:33-50, Section C.3, infra.
`
`In this embodiment, the “block utilization levels” to which power consumption is
`
`matched (a qualitatively large level corresponding to “burst”),
`
`is necessarily
`
`different than any recently collected “block utilization level” (a qualitatively small
`
`level corresponding to a disabled clock). Ex. 1035 at ¶¶18-19.
`
`In other words,
`
`in this embodiment block utilization levels cannot be the block utilization
`
`information. Accordingly, in light of the specification, the text of other claims and
`
`the plain language of the challenged claims themselves (which do not recite any
`
`particular relationship between the “block utilization levels” and “utilization
`
`information”), AMD’s proposed construction should be rejected.
`
`C.
`
`“Adjust[ing] power consumption levels of the functional blocks to
`match respective block utilization levels” does not require two
`operational states.
`
`AMD repeats its previously rejected argument that the “adjust..to match”
`
`language of the claims requires two operational states. See Paper 21 at 18-22;
`
`Paper 12 at 17-19; Paper 13 at 7-8. This position lacks support in the claim
`
`language or prosecution history and is contrary to the examples in the
`
`specification.
`
`1.
`
`The ’520 patent does not disclaim or differentiate itself from
`prior art activating/deactivating functional units.
`AMD points to the background of the ’520 patent to support its position
`
`that the claims of the ’520 patent are differentiated from or somehow disclaim
`
`Page 7
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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`deactivation of a circuit. However, the ’520 patent criticized the prior art for its
`
`inability to determine block utilization levels, not its use of non-operational states.
`
`“In a prior art power savings approach, disclosed in U.S. Pat. No. Re
`37,839, functional blocks are deactivated to save power. …… In order
`to allocate power resources more effectively, it would be desirable to
`be able to dynamically match performance and thus control power
`consumed by individual functional blocks according to the utilization
`requirements of the functional blocks. However, current designs
`generally do not provide information about utilization of
`the
`individual functional blocks, and power consumption is not tuned to
`match the loading of the individual functional blocks…Accordingly,
`it would be desirable to dynamically adjust the power consumed by
`functional blocks of an integrated circuit according to the utilization
`or loading of those functional blocks and thus achieve power
`savings while maintaining performance”
`
`Ex. 1001 at 1:34-59. The prior art allegedly could not determine the utilization
`
`needs of individual blocks and thus operated poorly because the blocks could be
`
`turned off even during times of relatively high demand. Ex. 1034 at 89:10-90:6.
`
`The purported advantage of the ’520 patent was the ability to determine utilization
`
`levels on a block-by-block basis, not use multiple operational states. Ex. 1035 at
`
`¶¶23-24.
`
`2.
`
`The plain meaning of “adjust power consumption levels of
`the functional blocks to match respective block utilization
`levels” is consistent with turning a functional unit on and off
`
`Page 8
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`

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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`and does not require two operational states.
`
`The plain meaning of the language of “adjust power consumption levels of
`
`the functional blocks to match respective block utilization levels” does not require
`
`multiple operational states. The plain meaning of “adjust…to match” only requires
`
`that the power consumption be adjusted so that it is closer to expected block
`
`utilization levels.
`
`For example, as described by Dr. Min,
`
`if
`
`the power
`
`consumption is at 100 percent and expected utilization is at 25 percent, turning off
`
`the clock will significantly decrease power consumption, which will necessarily
`
`more closely match the block utilization levels. Ex. 1035 at ¶25. Similarly, if
`
`block utilization levels are expected to be at 75 percent, raising the power
`
`consumption to 100 percent is an adjustment to match the expected utilization as
`
`100 percent is a better match. Id.
`
`3.
`
`The specification discloses two-mode on/off systems and all
`of the embodiments are consistent with the broad plain
`meaning of the claims.
`
`The specification of the ’520 patent repeatedly describes deactivation of a
`
`functional block as a mechanism for reducing power consumption. For example:
`
`“There are various other approaches to conserve power that may be
`utilized in addition to adjusting frequency and voltage…. In another
`embodiment, the clocks can be turned off while operations directed
`to a particular functional unit accumulate. Once a sufficient number
`the clocks can be turned back on and the
`have accumulated,
`accumulated operations can be executed in a burst mode, and then the
`
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`

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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`clocks can be turned off again.”
`
`Ex. 1001 at 7:33-50. Unsurprisingly, Patent Owner provides no explanation for
`
`why the claims should be construed contrary to this embodiment, which clearly
`
`involves a single operational state and single non-operational state. Ex. 1035 at
`
`¶¶27-28. At page 22 of its Response Patent Owner briefly addresses the additional
`
`section below, which also clearly contradicts its claim position:
`
`“If on the other hand, the utilization information indicates that the
`functional unit is lightly loaded, the clock frequency and/or other
`power management parameters can be decreased to match the loading.
`If a particular functional unit is unused or very lightly used, its clocks
`may even be turned off for a period of time.”
`
`Ex. 1001 at 4:8-14. Patent Owner argues that “turning off” is somehow different
`
`from adjusting to match. Paper 21 at 22.
`
`If anything however, this section
`
`further confirms that turning off the clock is an example of adjusting to match. The
`
`disclosed embodiment, if dealing with a “lighter” utilization, can reduce power
`
`consumption to match. Ex. 1035 at ¶¶29-30. But if the power consumption is
`
`low enough, adjusting to match might entail turning the clock off altogether.
`
`Id.
`
`These embodiments, which disclose stopping the clock, cannot be excluded from
`
`the claims. See Invitrogen Corp. v. Biocrest Mfg., L.P., 327 F.3d 1364, 1369 (Fed.
`
`Cir. 2003) (“[C]onstruing a claim to exclude a preferred embodiment ‘is rarely, if
`
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`

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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`ever, correct.’”).4
`
`Claim 27 depends from claim 1, which has similar “match” language and is
`
`presumably narrower, and recites that the claimed matching process comprises
`
`“increasing power consumption levels for those functional blocks with utilization
`
`information that indicates increased utilization; and decreasing power consumption
`
`levels for those functional blocks with utilization information that
`
`indicates
`
`decreased utilization.” Turning a functional unit’s clock off in response to lower
`
`utilization and turning it on in response to increased utilization clearly falls within
`
`the narrower steps recited in claim 27 and thus must also meet the limitations of
`
`broader and less specific claims. Ex. 1035 at ¶¶31-32. Accordingly, the plain
`
`language, the specification, and the other claims support that “adjust[ing]… to
`
`match” is performed whenever the power consumption is adjusted to be closer to
`
`block utilization levels and does not require two or more operational states.
`
`II.
`
`BERTIN ANTICIPATES CLAIMS 16-18 AND 20.
`
`Bertin anticipates claims 16-18 and 20 of the ’520 patent. AMD’s
`
`arguments rest on its improperly narrow view of the claim language and should be
`
`rejected. Additionally, AMD’s characterization of Bertin is unsupported by
`
`independent expert testimony as Dr. Levitt’s analysis of Bertin merely tracks that
`
`of the Response. Compare Paper 21 at 29-37 to Ex. 2002 at ¶¶67-74.
`
`4 These examples are identified as “preferred embodiments.” Ex. 1001 at 2:57-58.
`
`Page 11
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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`A.
`Bertin discloses collection of utilization information, which is used
`to adjust power consumption to match block utilization levels.
`
`AMD bases its arguments on the following incorrect assumptions: (A) the
`
`claimed “utilization information” must be collected over multiple cycles; (B)
`
`Bertin cannot collect “utilization information” over multiple cycles; and (C) the
`
`claimed “utilization information” must be the same as the “block utilization levels”
`
`to which power is adjusted to match.
`
`1.
`
`SVT is utilization information.
`
`AMD’s position that utilization information be collected over multiple
`
`cycles and that it be a numerical ratio of active cycles to total cycles is without
`
`support in either the plain language or technology. See Section, I.A, supra. Bertin
`
`discloses a technique for adjusting power consumption based on collection of
`
`utilization information. The SVT values in the status table 206 of Bertin indicate
`
`whether the circuit has been previously placed into a higher or lower performance
`
`state. Ex. 1002 at ¶106; Ex. 1003 at 6:41-57, 5:23-29; Ex. 1035 at ¶35. As set
`
`forth by Dr. Min, the circuit of Bertin periodically adjusts the SVT state in
`
`response to incoming instructions (or a lack of the same). Id. at Ex. 1002 at
`
`¶¶107-108; Ex. 1003 at 5:44-50, 6:41-57; Ex. 1035 at ¶35. When the RVT values
`
`indicate that there are upcoming instructions for a particular functional unit, the
`
`performance state of that unit is increased by setting SVT to a higher state. Ex.
`
`1002 at ¶108; Ex. 1003 at 5:44-50, 6:41-57; Ex. 1035 at ¶35. Thus, during future
`
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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`cycles the SVT values indicate whether a particular functional unit was previously
`
`utilized. These processes are illustrated in the flow charts below from Dr. Min’s
`
`declaration. Ex. 1035 at ¶¶36, 43-46.
`
`Instructions for a functional
`unit are decoded.
`
`No instructions for a functional unit
`are decoded.
`
`RVT is set to a high value for
`that unit.
`
`RVT is set to a low value for that
`unit.
`
`SVT is set to a high value to
`match RVT.
`
`If RVT is not raised for a
`predetermined amount of time
`because of the arrival of a new
`instructions, SVT for the unit is set to
`a low value to match RVT.
`
`Instructions are utilized by the
`functional unit in high SVT
`state.
`
`Low SVT unit is not being utilized
`and was not utilized during preceding
`time period when RVT was low.
`
`Thus at any given time the SVT values will indicate whether the functional
`
`units have been recently utilized and at what level of performance. Ex. 1035 at
`
`¶37. Thus, SVT is utilization information under proper claim construction of
`
`“utilization information” set forward above.
`
`2.
`
`RVT is utilization information.
`
`Additionally, as set forward in the petition and Dr. Min’s declaration the
`
`RVT values of Bertin are utilization information as well. Paper 2 at 10, 12; Ex.
`
`1002 at ¶¶105-107. The RVT values indicate whether there are instructions for any
`
`given functional unit and accordingly, whether the functional unit is to be utilized.
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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`Ex. 1035 at ¶38. The use of RVT is similar to the ’520 disclosure of detecting
`
`instructions directed to the FPU. Ex. 1001 at 3:22-3:24; Ex. 1035 at ¶40.
`
`3.
`
`Bertin discloses that utilization information may be collected
`over multiple cycles.
`
`Bertin notes that performance level may be changed after an arbitrarily high
`
`period of time with or without activity.
`
`“Generally, once a unit has been raised to a higher performance level,
`the unit will remain at the level for a selected period and then, in the
`absence of further instructions which require high performance from
`the unit, the performance level of the unit will be returned to a lower
`power state. The selected period may be a constant for the chip, it may
`be variable on an application by application basis or may be a
`programmable parameter which can be altered even within an
`application.”
`
`Ex. 1003 at 4:65-5:6. This process uses a timing mechanism that must detect low
`
`RVT for a predetermined period of time before lowering SVT. Ex. 1003 at
`
`3:30-3:37, 6:24-40, 8:6-15, and Fig. 7A; Ex. 1035 at ¶¶43-46. Accordingly,
`
`Bertin collects utilization information over multiple cycles through its timing
`
`mechanism and a low performance state in SVT represents utilization over a period
`
`of time (since SVT could not otherwise be lowered). Ex. 1035 at ¶46.
`
`4.
`
`The system of Bertin is “responsive to the block utilization
`information to independently adjust power consumption
`levels of the functional blocks to match respective block
`utilization levels.”
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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`AMD rewrites the claims, to among other things require that the “block
`
`utilization levels” be the same as the “block utilization information” and suggests
`
`that a data value that includes “utilization information” such as SVT cannot also be
`
`used to effect changes to power consumption. However, the claims only require
`
`collection of utilization information and use of the utilization information to adjust
`
`power consumption to better match block utilization levels. Ex. 1035 at ¶49.
`
`The system of Bertin does exactly as the claims require. It collects utilization
`
`information in the form of the current performance level, SVT. Ex. 1002 at
`
`¶¶105-106; Ex. 1003 at 5:23-29, 6:41-57; Ex. 1035 at ¶52. It adjusts power
`
`consumption to match block utilization levels by checking the performance level
`
`(as indicated by SVT) and either increasing the performance level (and thus power
`
`consumption) if the expected block utilization levels (RVT) are higher than the
`
`current performance level (SVT) or decreasing the power consumption if the
`
`expected block utilization levels (indicated by RVT) are less. Ex. 1002 at
`
`¶¶107-108; Ex. 1003 at 5:23-50; 6:41-57. Ex. 1035 at ¶53. Bertin uses utilization
`
`information and matches similarly to the burst mode embodiment of the ‘520
`
`patent described in Section I.C.3. Ex. 1035 at ¶53.
`
`Similarly, because RVT is also used to adjust power to match utilization
`
`levels,
`
`the system is separately responsive to this other type of “utilization
`
`information.” And because RVT also acts as information about utilization levels it
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`Patent No. 6,895,520
`Reply in Support of Petition for Inter Partes Review
`meets even AMD’s improperly narrow construction. Ex. 1035 at ¶53.
`
`B.
`
`Bertin discloses
`functional units.
`
`independently adjusting the frequencies of
`
`AMD asks the Board to ignore the commonly accepted definition of
`
`frequency and argues
`
`that
`
`frequency is
`
`the
`
`“spacing of
`
`the
`
`clock’s
`
`periodically-spaced pulses.” Paper 21 at 37. The definition of frequency is a
`
`number of occurrences per unit time. Ex. 1035 at ¶58. Any number of methods of
`
`selectively blocking clock signals are known in the art for adjusting frequency and
`
`are treated as frequency changes, regardless of how the overall number of clock
`
`signals per unit time is reduced. Ex. 1035 at ¶¶58-60; Ex. 1031 at 1:66-2:10.
`
`The system of Berti