`
`Reconfigurable Automotive Display System
`
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`I Learn I Publications I Technical Papers
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`Reconfigurable Automotive Display System
`
`Paper #:
`DOI:
`
`Citation:
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`Author(s)
`Affiliated:
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`Abstract:
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`930456
`
`10.4271/930456
`
`Published: 1993-03-01
`
`"Reconfigurable Automotive Display
`and Shaout, A.,
`Gumkowski, G.
`System," SAE Technical Paper 930456, 1993, doi:10.4271/930456.
`
`: Gregory T. Gumkowski Adnan Shaout
`
`NEC Electronics Inc. University of Michigan-Dearborn
`
`A reconfigurable automotive display system was developed for the
`purpose of displaying multifunctional
`information in a space efficient
`area. The system features an 80 x 16 graphic dot matrix Fluorescent
`Indicator Panel and an advanced 8-bit microcontroller.
`
`The performance of the system electronics was greatly improved due to
`the real-time processing capabilities of the microcontroller. By using the
`macroservice data transfer feature of the microcontroller,
`the CPU
`loading for the real-time task of refreshing the display was greatly
`reduced. The reduced CPU loading allows processing time for other
`system functions such as scanning the keypad inputs and servicing the
`J1708 serial communications interface.
`
`Event:
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`Sector:
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`International Congress & Exposition
`Automotive
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`Topic:
`
`Electronic equipment Displays
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`SAE TECHNICAL
`PAPER SERIES
`
`930456
`
`Reconfigurable Automotive Display System
`
`Gregory T. Gumkowski
`NEC Electronics Inc.
`
`Adnan Shaout
`The University of Michigan-Dearborn
`
`Reprinted from:
`Automotive Display Systems and IVHS
`(SP-964)
`
`The Engineering Society
`For Advancing Mobility
`Land Sea Air and Space
`I N T E R N A T I O N A L
`
`International Congress and Exposition
`Detroit, Michigan
`March 1-5, 1993
`
`400 Commonwealth Drive, Warrendale, PA 15096-0001 U.S.A. Tel: (412)776-4841 Fax:(412)776-5760
`
`VALEO EX. 1039_002
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`®
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`ISSN 0148-7191
`Copyright 1993 Society of Automotive Engineers, Inc.
`
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`930456
`
`Reconfigurable Automotive Display System
`Gregory T. Gumkowski
`NEC Electronics Inc.
`
`Adnan Shaout
`The University of Michigan-Dearborn
`
`ABSTRACT
`
`A reconfigurable automotive display system was
`developed for the purpose of displaying multifunctional
`information in a space efficient area. The system features
`an 80 x 16 graphic dot matrix Fluorescent Indicator Panel
`and an advanced 8-bit microcontroller.
`The performance of the system electronics was
`greatly improved due to the real-time processing
`capabilities of the microcontroller. By using the
`macroservice data transfer feature of the microcontroller,
`the CPU loading for the real-time task of refreshing the
`display was greatly reduced. The reduced CPU loading
`allows processing time for other system functions such as
`scanning the keypad inputs and servicing the J1708 serial
`communications interface.
`
`INTRODUCTION
`
`In the past, automotive displays have primarily
`consisted of fixed segment patterns such as seven
`segment, british flag, and 5x7 dot matrix types [1,2].
`Recently, however, full dot matrix configurations have
`appeared allowing multifunctional information to be
`displayed in a space efficient area [3,4,5]. Full dot matrix
`display systems provide the flexibility to display text
`messages of different sizes, locations, and font types as
`well as graphic symbols within a common hardware
`design. This means that several fixed segment display
`systems can be replaced with a single dot matrix display
`system
`to
`reduce cost and packaging space.
`Furthermore, complexity and development time can be
`reduced by using a common hardware design for multiple
`applications.
`The high pixel count of the dot matrix display,
`however, can necessitate the use of a dedicated
`microcontroller or display controller to refresh the display
`[3,4,6]. Thus, a second microcontroller is required to
`perform the application tasks such serial communications,
`keypad scanning, ect.
`This paper presents a dot matrix display system
`
`design that implements a single microcontroller to perform
`display refreshing, keypad scanning, and J1708 serial
`communications. The elimination of the display controller
`device is made possible by the reduced CPU loading that
`the macroservice data transfer feature of the
`microcontroller provides. The real-time task of refreshing
`the display is first discussed using a conventional CPU
`and then using a CPU incorporating macroservice
`capability to illustrate this conclusion. Also, the
`incorporation of an additional real-time task, SAE J1708
`communications, is discussed.
`
`SYSTEM IMPLEMENTATION
`
`A block diagram of the reconfigurable display system
`that was developed is shown in Figure 1. The system
`consists of the dot matrix display, the display system
`electronics, the keypad, and a power supply.
`
`Figure 1 - Reconfigurable Display System Diagram
`
`DOT MATRIX DISPLAY - The dot matrix display
`used in this system is a vacuum fluorescent type which is
`also know as a Fluorescent Indicator Panel (FIP). FIP’s
`are the technology of choice in automotive applications
`because of their high quality, high brightness, and high
`reliability characteristics [2,7,8]. The FIP is composed of
`an 80 x 16 matrix of pixels in a 9.85 mm high by 50.5
`mm long graphics area [9]. This configuration provides
`enough resolution to display text on two lines of thirteen
`characters each using a 5x7 font. Several examples of
`
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`different text sizes and graphics symbols that are possible
`with this display are illustrated in Appendix I.
`The FIP was designed such that a quadruplex anode
`matrix drive (quadmatrix) technique can be employed
`[10,11]. The quadmatrix drive provides the best display
`quality by preventing cross talk between adjacent grid
`phosphors (also called "ghosting").
`DISPLAY SYSTEM ELECTRONICS - The display
`system electronics can be divided into four parts; the
`microcontroller, anode driver, grid driver, and J1708
`transceiver as shown in Figure 2.
`
`Figure 2 - Reconfigurable Display System
`Electronics Diagram
`
`Microcontroller - A high performance 8-bit
`microcontroller was used in this design to process all
`display, serial communications, and keypad functions.
`The use of a dot matrix FIP requires the CPU to transfer
`a large amount of data to the display drivers to perform
`the display refresh task. Thus, a microcontroller with a
`hardware data transfer architecture [12,13,14,15] was
`desired. The 78K2 microcontroller [12] was chosen
`because it implements an architecture with a
`macroservice logic unit and a low cost 8-bit CPU. The
`macroservice logic unit provides automatic data transfers
`between peripheral registers and memory without CPU
`intervention. This architecture will be discussed in more
`detail later and is responsible for performing the display
`refresh task with low CPU overhead. Other features of the
`microcontroller include 16K ROM, 512 RAM, 8 channel
`A/D, UART, ect.
`Display Anode Driver - Due to the quadmatrix
`construction of the FIP, every fourth column of pixels is
`wired in parallel across the sixteen rows of anode pixels
`resulting in 64 anode terminations. A 64 bit high voltage
`driver was used in this design as the anode driving device
`[16]. The microcontroller interfaces to the anode driver by
`means of a clocked serial interface (CSI). The CSI data
`is clocked into an input shift register on the anode driver
`where it can then be latched to the output buffers when
`signaled.
`Display Grid Driver - The quadmatrix FIP construction
`also places a grid over every two columns of anode pixels
`for a total of 40 grids. A 40 bit high voltage driver was
`used as the grid driving device [17]. The microcontroller
`interfaces to this driver using general purpose output port
`pins.
`
`J1708 Interface - This system was designed to obtain
`information over a SAE J1708 type serial communications
`data link [18,19]. A RS-485 driver/receiver was used as
`the physical layer device [20]. The microcontroller
`interfaces to this device using the UART Tx and Rx pins.
`An IBM PC was used to simulate an automotive multiplex
`network by exchanging message information with the
`reconfigurable display system over the J1708 interface.
`Component Packaging- The FIP, microcontroller, and
`display drivers are all packaged as surface mount
`devices. This results in a very compact circuit board
`design to help conserve the instrument panel area that it
`occupies. The FIP can also be modified such that the
`drivers are die bonded to the internal glass substrate.
`This can further maximize the packaging density and also
`reduce the number of interconnects to the FIP resulting
`in a much lower pin count and higher reliability. This
`technology is referred to as chip-in-glass (CIG) [10,21].
`Display Memory Implementation - The microcontroller
`ROM was used to store the different display templets in
`bitmapped form [22]. The bitmap format stores each pixel
`state on the display as a bit in the microcontroller
`memory. The 80 x 16 FIP configuration results in 160
`bytes per bitmap. The structure of a bitmap in the
`microcontroller memory is shown in Figure 3.
`
`Figure 3 - Display Memory Structure
`
`To update the display with a new message, the
`appropriate bitmap templet is copied from ROM to display
`RAM. This templet provides a generic display pattern for
`the type of message to be displayed (radio, trip computer,
`ect.). The appropriate RAM locations are then overwritten
`with the specific parameter information (radio station, trip
`miles, ect.) to build the final display pattern in RAM.
`
`DISPLAY REFRESH TASK
`
`The display refresh rate was chosen to be 125 Hz so
`that flickering would not be detectable by the human eye
`[4]. The 125 Hz refresh rate equates into an 8 millisecond
`refresh period. As shown in Figure 4, the refresh period
`is divided into 40 grids to produce the 200 microsecond
`grid periods. The 40 grid periods must each be updated
`with 64 bits of anode data to complete one refresh cycle.
`
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`Figure 4 - FIP Display Refresh Timing Diagram
`
`Figure 5 (a) - FIP Quadmatrix Construction
`
`Figure 5 (b) - FIP Quadmatrix Driving Signals
`
`15
`
`The 64 bits of anode data are required to implement the
`quadmatrix refresh technique [10,11]. The quadmatrix
`method requires that two adjacent grids are always driven
`high as shown in Figure 5. Of the four columns covered
`by these grids (4 columns x 16 rows = 64 anodes), the
`two outside columns are driven low to avoid cross talk.
`At the beginning of each grid period a vectored
`interrupt is generated. During the interrupt processing, the
`microcontroller latches the preloaded anode driver data
`(LATCH) and clocks one data bit into the grid driver shift
`register (GDATA/G1CLK/G2CLK) during the intergrid
`blanking time (BLANK). Also, during the interrupt
`processing, the anode driver is preloaded with data
`(DATA/CLOCK) for the next grid period. To preload the
`anode data for the first grid period the microcontroller
`points to the start of the display RAM. The first 8 bytes
`(the 64 bits of anode data) are then sent to the anode
`driver via the CSI. To preload during subsequent grid
`periods, the pointer is incremented by eight for each
`successive grid period until all forty grid periods have
`been scanned. At this time the pointer is reset and the
`process repeated.
`
`DISPLAY REFRESH IMPLEMENTATION
`
`The display refresh task described above was studied
`using three different 8-bit microcontroller implementations.
`The first study simulated the CPU time required to update
`one grid period using a conventional microcontroller
`architecture [23]. Next, the second study converted the
`code developed for the conventional microcontroller to
`78K2 code and simulated the CPU time required. Finally,
`the third study modified the 78K2 code to utilize the
`macroservice mode and simulated the CPU time required.
`CONVENTIONAL REFRESH - The display refresh
`task was
`first
`implemented using a conventional
`microcontroller (68HC11) without
`the macroservice
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`feature. The source code that was developed to perform
`the display refresh task required 126 bytes of ROM and
`the timing simulation results are shown in Table I. From
`this result we can conclude that the refresh rate would
`have to be lowered (grid period extended) to make this
`design feasible. Even with a lower refresh rate the
`microcontroller would have to be dedicated to the display
`refreshing task and a second microcontroller added to
`process the other system tasks.
`78K2 REFRESH - The display refresh task was next
`implemented using the 78K2 microcontroller (without the
`use of the macroservice mode). The code developed for
`the conventional microcontroller was converted to 78K2
`code. This source code required 98 bytes of ROM and
`the timing simulation results are shown in Table I. The
`timing simulation result was verified by a circuit
`measurement of 66.0 percent CPU loading at 12MHz
`operation. The timing simulation results show that the
`78K2 performance is nearly identical (at 8 MHz) to the
`conventional microcontroller when the macroservice mode
`is not used. The slight improvement seen is due to two
`factors.
`First, the bank select instruction is used as a context
`switch. This instruction switches the CPU registers to a
`reserved bank of working registers for use during the grid
`processing interrupt. When the return from interrupt
`instruction is executed the program status word is popped
`from the stack which automatically switches back to the
`register bank that preceded the interrupt. This allows the
`grid processing task to quickly switch to and from its own
`set of working registers without wasting the clock cycles
`and stack memory that would otherwise be required to
`save and restore the registers.
`Second,
`the 16-bit
`timer was used as a
`Programmable Pulse Generator (PPG). In the PPG mode,
`a 16-bit compare register defines the grid period and a
`second 16-bit register defines the blanking time. Thus,
`once initialized the timer will automatically generate the
`blanking signal without any CPU intervention; unlike a
`typical output compare timer. To implement dimming
`control for the FIP these registers only need to be
`updated with the new values that produce the desired
`brightness (eg. extend the blanking time).
`MACROSERVICE MODE - The 78K2 macroservice
`feature can be used to reduce the CPU loading required
`
`Table I - Conventional Display Refresh Simulation Results
`
`to refresh the display. Macroservice is essentially a
`special interrupt mode that is assisted by a dedicated
`section of hardware logic that can transfer data between
`memory and peripheral registers [12]. A flowchart of the
`interrupt logic design is shown in Figure 6.
`The macroservice interrupt mode operates like a
`hardware interrupt routine and provides an advantage
`over vectored interrupt processing in speed as well as
`code size and structure. Macroservice can even be
`executed while interrupts are disabled or while a vectored
`interrupt is being processed. The macroservice mode is
`configured by programming a table, also called a channel.
`Once configured, data transfers will occur at the specified
`interrupt event and the counting register automatically
`decremented until all the data transfers have been
`completed. At this time a vectored interrupt can allow the
`CPU to update the macroservice channel for the next
`required transfer.
`
`Figure 6 - Interrupt Hardware Flowchart
`
`For the display refreshing task, a macroservice
`channel was configured to transfer display data memory
`(RAM) to the CSI shift register (peripheral register). By
`using macroservice, the CPU can exit the refresh interrupt
`routine and return to normal processing while the
`macroservice hardware transfers the anode bitmap data
`to the CSI shift register. To start the macroservice
`transfer the associated configuration registers must be
`initialized as shown in Figure 7. The macroservice control
`word consists of a mode register and a channel pointer.
`
`CPU
`
`Grid Period Processing Time (µs)
`
`Architecture
`
`Crystal
`
`0
`
`1
`
`2
`
`(3,5,..,37)
`
`(4,6,..,38)
`
`Total
`Refresh
`T i m e (µs)
`
`CPU
`Loading
`
`39
`
`
`Conventional
`(68HC11)
`
`8MHz
`
`205.00
`
`199.50
`
`206 00
`
`199.50
`
`202.50
`
`
`204.00
`
`8,050.50
`
`100.63%
`
`Conventional
`
`Mode (78K2)
`
`8MHz
`12MHz
`
`198.75
`
`132.77
`
`
`197.50
`
`131.93
`
` 199.75
`133.43
`
`194.00
` 129.59
`
`198.50
`132.60
`
`
`197.75
`132.10
`
`7,858.75
`5,249.65
`
`98.23%
`65.62%
`
`Macroservice
`Mode (78K2)
`
`8MHz
`12MHz
`
`109.50
`73.15
`
`107.75
`71.98
`
` 110.00
`
`
`73.48
`
`107.75
`71.98
`
`108.25
`72.31
`
`108.50
`72.48
`
`4,323.75
`2,888.27
`
`54.05%
`36.10%
`
`
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`
`The mode register sets the macroservice type, transfer
`direction, ect. The channel pointer points to the memory
`location that stores the transfer count, the peripheral
`special function register address (SFR), and the data
`memory address. Once started, the macroservice
`hardware will steal bus cycles from the CPU during each
`data transfer until all 8 bytes have been output.
`
`Figure 7 - Macroservice Register Configuration
`
`MACROSERVICE REFRESH - The display refresh
`task was finally implemented using the 78K2
`microcontroller in the macroservice interrupt mode. The
`source code that was developed to perform the display
`refresh task with macroservice required 85 bytes of ROM
`and the timing simulation results are shown in Table I.
`The timing simulation result was verified by a circuit
`measurement of 36.2 percent CPU loading at 12MHz
`operation. This data shows that the CPU loading has
`been reduced as a direct result of using the macroservice
`interrupt mode by the following amount:
`
`7858.75 - 4323.75
`7858.75
`
`=45%
`
`The results of all three simulations are shown
`graphically in Figure 8. This illustrates that the
`conventional 78K2 provides the equivalent performance
`of a typical automotive microcontroller. Also, it shows that
`the 78K2 macroservice mode can provide a 45 percent
`improvement for this display controller application.
`Figure 8 shows that the amount of memory (ROM)
`required to process the display refresh task has been
`reduced. By using the macroservice mode the data
`transfers are done by the hardware logic and thus the
`code is simplified. The use of macroservice here reduced
`the interrupt code by 13 percent for the 78K2.
`
`J1708 COMMUNICATIONS TASK
`
`The SAE J1708 communications was implemented on the
`78K2 by using the UART and Timer 1 interrupts. The
`UART interrupt occurs at the completion of a transmitted
`or received byte of data. The Timer 1 interrupt occurs
`
`Figure 8 - Display Refresh Task Simulation Results
`
`during the measurement of an intermessage idle bus
`state. These interrupts require additional real-time
`processing beyond the previously discussed display
`refreshing task. For this application, the grid interrupt
`processing (display refresh task) was given a higher
`priority. This allows the grid interrupt processing to take
`over at any time, even during the UART and Timer 1
`interrupt processing. Using the 78K2 (at 12MHz) in the
`macroservice mode, the grid interrupt processing
`presented a maximum latency of 27.3 microseconds to
`service the UART or Timer 1 interrupt. This quick
`response is due to the early release from the grid
`interrupt processing that the macroservice mode allows.
`The CPU
`loading
`to
`service
`the
`J1708
`communications (UART and Timer 1 interrupts) was
`measured to be 11.7 percent. This, combined with the
`display refresh task, accounts for a total of 47.8 percent
`CPU loading. Thus 52.2 percent of the CPU processing
`time remains for additional system tasks such as
`keyboard scanning, message processing, diagnostics, ect.
`
`CONCLUSIONS
`
`This paper illustrates a reconfigurable display system
`that is suitable for automotive applications. An 80 x 16 dot
`matrix vacuum fluorescent display was used for
`application flexibility and high reliability.
`The system electronics provide a highly efficient
`design by incorporating a single microcontroller to
`perform all tasks, including the display refreshing task.
`This is made practical by the macroservice logic unit that
`the microcontroller provides. The CPU loading was
`reduced by 45 percent as a direct result of using
`macroservice for the dot matrix display refreshing task.
`With this reduction in CPU loading, it is now practical for
`the microcontroller to process the remaining system tasks
`such as SAE J1708 communications.
`The reconfigurable display system developed here
`provides a high performance and space efficient design
`for future multifunctional automotive display products.
`
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`Vincent Guarna, "Software Architecture for a Driver
`Information System," SAE Technical Paper 850306.
`23. "MC68HC11A8 HCMOS Single-Chip Microcomputer
`Technical Data Manual," MC68HC11A8/D, Motorola
`Inc., 1987.
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`APPENDIX I - Typical Automotive Display Patterns
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`Example #1 - Radio Display
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`Example #2 - Compact Disc Player Display
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`Example #3 - Cellular Telephone Display
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`Example #4 - Distance to Empty Display
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`Example #5 - Low Fuel Warning Display
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`Example #6 - Low Oil Warning Display
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