`
`In re Patent of: Morton et al.
`U.S. Patent No. 7,296,121
`Issue Date:
`Nov. 13, 2007
`Appl. Serial No.: 10/966,161
`Filing Date:
`Oct. 15, 2004
`Title: REDUCING PROBE TRAFFIC IN MULTIPROCESSOR SYSTEMS
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`Case Nos. IPR2015-00158
`IPR2015-00159
`IPR2015-00163
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`DECLARATION OF VOJIN OKLOBDZIJA, Ph.D.
`IN SUPPORT OF PATENT OWNER’S REPLIES IN SUPPORT OF
`MOTIONS TO AMEND
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`I, Vojin Oklobdzija, PhD, hereby declare as follows:
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`1.
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`My name is Dr. Vojin Oklobdzija. I submit this declaration in
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`support of Patent Owner’s Replies in Support of its Motions to Amend in
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`IPR2015-00158, -00159, and -00163. I have been asked to offer technical opinions
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`relating to U.S. Patent No. 7,296,121, the proposed substitute claims presented by
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`the motions, and certain arguments of Petitioners and their expert in opposition to
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`the motions to amend.
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`2.
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`In addition to the documents which I already reviewed in connection
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`with the declaration I submitted in support of the motions to amend, I have also
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`reviewed the Petitioners’ Oppositions to the motions to amend, and the exhibits
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`cited therein, including the Opposition Declaration of Dr. Robert Horst. Nothing
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`in these materials has altered my opinions from my prior declaration that the
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`proposed substitute claims are patentable over the prior art of record to the ’121
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`Patent, as well as the prior art (dating prior to November 4, 2002) which was
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`known to the Patent Owner.
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`I.
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`PETITIONERS HAVE MISINTERPRETED AND MISCONSTRUED
`MY OPINIONS AND DEPOSITION TESTIMONY
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`3.
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`Petitioners’ Opposition contains a number of statements which
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`misinterpret my deposition testimony in this matter. Petitioners argue that I
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`testified that I spent five to ten hours reviewing the prior art in connection with the
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`motions to amend. However, as I testified at my deposition, I could not give
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`“precise answers” as to the number of hours I spent on individual tasks “on the top
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`of my head,” but I estimated that I have spent over 60 hours in total, by the time of
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`my deposition, in working on the pending -158, -159, and -163 matters.
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`Oklobdzija Depo. at 17:25-18:8. Likewise, my answers regarding “5 hours” and
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`“10 hours” were referring to time spent reviewing sub-categories of prior art.
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`Oklobdzija Depo. at 21:7-24:12. I spent significantly more time, overall, working
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`on the motions to amend, including analyzing the specific references discussed in
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`my declaration in support of Patent Owner’s response (including the Pong and
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`Koster references), as well as the specific references named and discussed in my
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`declaration in support of Patent Owner’s motion to amend. Because there was
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`significant overlap in the activities involved in my work on the Patent Owner
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`Response and the Patent Owner Motion to Amend, it is difficult to precisely
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`estimate and apportion the relative time spent on each. However, I believe
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`Petitioners’ characterization of my work as “only spen[ding] about 5-10 hours
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`reviewing the hundreds of prior art references of record” is both inaccurate and
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`misleading.
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`4.
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`I understand that the Petitioners also imply that I did not review or
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`consider the Pong reference with respect to the newly added limitations in the
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`proposed claims that recites “wherein said probe filtering unit is coupled to a
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`coherent protocol interface and a non-coherent protocol interface.” To the
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`contrary, in my declaration in support of Patent Owner’s motion to amend, I
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`expressly stated that “[a]s to the limitation, ‘wherein said probe filtering unit is
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`coupled to a coherent protocol interface and a non-coherent protocol interface,’
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`based on the prior art I have reviewed, I do not believe that such interfaces are
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`taught in the art prior to November 4, 2002.” Oklobdzija Mot. to Amend Decl. ¶
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`11. The Pong reference was included in the “prior art” referred to in that
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`statement. Id.¶ 7 (stating that, among other things, “I have also reviewed the prior
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`art submitted in connection with IPR2015-00158, -00159, -00161, -00163, and -
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`00172” and that such prior art was included in what I understood to “together”
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`“comprise” the “prior art of record of the ’121 Patent as well as all prior art to the
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`’121 Patent known to the Patent Owner.”).
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`5.
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`In my analysis in connection with my declaration in support of
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`Patent Owner’s Motions to Amend, I also identified the art that I thought was most
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`relevant to these newly added limitations, including the other patents issued to
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`Newisys, Inc. and naming Mr. Glasco as an inventor, as well as the Hellwagner
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`reference. Oklobdzija Mot. to Amend Decl. ¶¶ 11-12. I did not identify the Pong
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`or Koster references as the most material prior art regarding these limitations
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`because I did not believe that they were material to these limitations. In particular,
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`neither Pong nor Koster discuss or demonstrate a coherent and non-coherent
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`protocol interfaces. Pong and Koster do not discuss non-coherent operations at all.
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`Moreover, the Pong patent application, US 2002/0053004, describes itself as
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`directed to “asynchronous cache coherence method and a multiprocessor system
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`that employs an asynchronous cache coherence protocol” and identifies a single
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`“Memory Control Path.” Pong ¶¶ 12, 15, 28-30. This demonstrates that the Pong
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`reference does not disclose a non-coherent protocol interface.
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`6.
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`I understand that Petitioners characterize a portion of my deposition
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`testimony as “admitting that a probe filtering unit with a path to main memory is a
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`non-coherent interface.” Once again, Petitioners misconstrue my testimony and
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`opinions. At the deposition, counsel asked a “hypothetical” question about an
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`incompletely described system, where “you have a system with a probe filtering
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`unit, and it has paths going to cache memory, and then it has a separate path going
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`to main memory.” See Oklobdzija Depo. at 89:6-15. I understood counsel’s
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`question of “[w]ould the path going to main memory be a non-coherent interface?”
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`as asking which of the two paths in the hypothetical system would be the non-
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`coherent interface, assuming that the system had coherent and non-coherent
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`interfaces. Obviously, in a system with a coherent protocol interface and a non-
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`coherent protocol interface, the non-cache coherent protocol interface would not be
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`concerned with communicating with the cache. However, this does not mean, nor
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`should my testimony be understood, as opining that any “path to main memory” is
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`a non-coherent protocol interface, or that any system which has a “path to main
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`memory” and supports coherent protocol operations necessarily practices these
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`limitations. Indeed, as I testified, a “non-coherent interface” is an interface which
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`does not have to keep coherency with the other caches in the system. Oklobdzija
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`Depo. at 88:7-15.1 Thus, a path to main memory can be a non-coherent protocol
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`interface, but would not necessarily always be one. That is because a path to main
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`memory could be accessed through a single interface which handles both coherent
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`and non-coherent operations. Such a system would not be within the scope of the
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`1 This testimony is consistent with and merely restates the Patent Owner’s
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`proposed construction of “non-coherent protocol interface,” which was stated in
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`the motions to amend as “an interface for communicating with components in a
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`computer system without regard to maintaining cache coherency.”
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`newly added limitations, which requires separate physically or logically distinct
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`interfaces.2
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`7.
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`I understand that Petitioners cite to my testimony in support of their
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`argument that the proposed substitute claims are not enabled and lack written
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`description. Again, Petitioners misconstrue my testimony. As a threshold issue, as
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`part of my opinions in support of the motion to amend, I was not tasked with
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`opining as to whether the proposed substitute claims were enabled or described in
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`the specification of the ’121 Patent, or any of the documents incorporated in the
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`specification by reference. Thus, I had not analyzed that issue when asked those
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`questions at my deposition. However, I attempted to provide responses to
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`Petitioners’ counsel’s questions at the deposition to the best of my ability. As I
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`2 This is not to suggest that there can be no overlap in the components which
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`implement a “coherent protocol interface” and a “non-coherent protocol interface.”
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`However, a single shared interface, handling both coherent and non-coherent
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`operations, with no physical or logical separation of coherent and non-coherent
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`protocols, would not fall within the scope of the claims, because, for example, it
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`would not be a non-coherent protocol interface, as it would not be an interface that
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`communicates in a computer system without regard to maintaining cache
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`coherency.
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`noted in my deposition, based on the brief analysis that I preformed at the
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`deposition itself in response to Petitioners’ counsel’s questions, I did believe that
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`these claims were described and enabled in the specification of the ’121 Patent.
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`Oklobdzija Depo. at 90:18-102:4. As I noted in my deposition, based simply on
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`my review during the deposition itself, I believed, and I continue to believe, that
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`the specification of the ’121 Patent contains a number of “implementation hint[s]”
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`which would enable one of skill in the art to practice the “coherent protocol
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`interface” and “non-coherent protocol interface” limitations without undue
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`experimentation. I also note that neither Petitioners nor their expert have
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`articulated any particular argument for why they believe these limitations are not
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`enabled, either at my deposition or in their Opposition, and thus I have no
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`particular non-enablement argument to respond to.
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`II.
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`THE SGI ORIGIN SYSTEM IS DISTINGUISHABLE FROM THE
`PROPOSED SUBSTITUTE CLAIMS
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`8.
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`I understand that Petitioners also present certain arguments
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`regarding the SGI Origin system based on the Culler and Laudon references. I
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`understand that Petitioners imply that I did not analyze the Culler reference, or the
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`SGI Origin system, in performing my analysis set forth in my declaration in
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`support of Patent Owner’s motion to amend. This is incorrect. The Culler
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`reference was one of the pieces of prior art included in the statement in my prior
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`opinion that “the limitation, ‘wherein said probe filtering unit is coupled to a
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`coherent protocol interface and a non-coherent protocol interface,’ based on the
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`prior art I have reviewed, I do not believe that such interfaces are taught in the art
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`prior to November 4, 2002.” Oklobdzija Motion to Amend Decl. ¶ 11. Although I
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`considered the Culler reference, based on my analysis, I did not believe that the
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`SGI Origin system described in Culler was particularly important or material art. I
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`did discuss the art that I thought was most relevant and material in describing these
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`limitations and demonstrating the state of the art. Oklobdzija Motion to Amend
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`Decl. ¶¶ 11-12. As described in further detail below, I believe that there are
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`fundamental architectural differences between the SGI Origin system, as described
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`in the Culler and Laudon references, and that of the proposed substitute claims.
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`9.
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`Although the Petitioners and their expert identify the SGI Origin’s
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`“hub” as the alleged “probe filtering unit” of the substitute claims, they are vague
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`with respect to whether they contend that the “hub” is outside of or is subsumed
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`within a “processing node.” As described below, neither scenario is consistent
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`with the SGI Origin practicing the substitute claims.
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`10.
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`To the extent that Petitioners argue that the SGI Origin’s hub is
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`subsumed within what they contend is the “processing node,” that is plainly
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`inconsistent with the claims themselves. Each of the substitute claims recite “[a]
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`probe filtering unit for use in a computer system comprising a plurality of plurality
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`of processing nodes interconnected by a first point-to-point architecture,” and that
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`the “probe filtering” is “operable to receive probes . . .from the processing nodes”
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`and to “transmit the probes . . . to . . . processing nodes.” These passages
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`demonstrate that the probe filtering unit is a separate limitation and cannot be
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`understood as being subsumed within a processing node. Other disclosures in the
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`’121 Patent are consistent. For example, claim 2, which depends on claim 1,
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`recites that the “probe filtering unit” corresponds to “an additional node [i.e. but
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`not a processing node] interconnected with the plurality of processing nodes.” A
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`number of the other original claims of the ’121 Patent draw distinctions between
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`whether the processing nodes or the probe filtering unit have certain functionality.
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`’121 Pat. cls. 8 (“each of the processing nodes is operable”), 11 (“each of the
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`processing nodes is programmed to complete a memory transaction . . .”), 12, 13
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`(“the probe filtering unit is operable to forward . . .”), 14-15. The ’121 Patent also
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`depicts and describes the probe filtering unit as being separate from the processors
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`or processing nodes. See, e.g., Fig. 18 and accompanying text.
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`11.
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`Additionally, a theory that the SGI Origin’s hub is both a “probe
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`filtering unit” and subsumed within a “processing node” would also be inconsistent
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`with practicing the proposed substitute claims because, in such a scenario, the
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`home node/hub would be a processing node to which the received probe is always
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`“transmitted” without being “selected,” which is inconsistent with the substitute
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`claims’ recitation of “transmit the probes only to selected ones of the processing
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`nodes with reference to probe filtering information.” In particular, the hub of a
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`home node in SGI Origin always “speculatively” forwards received requests to the
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`hub’s associated memory, without regards to the contents of the hub’s directory
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`(i.e. even if the directory would indicate that home hub’s memory did not the most
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`recent data). Culler at 597 (“the Origin2000 uses . . . speculative memory
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`operations in parallel with directory lookup”), 600 (“At the home, the data for the
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`block is access speculatively in parallel with looking up the directory entry.”);
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`Laudon at 244 (“3. Read request goes across network to home memory . . . 4.
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`Home memory does memory read and directory lookup.”). Thus, if the hub is
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`subsumed within a processing node, the claim is not practiced because the home
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`hub always transmits the received request (i.e. the alleged probe) to that home node
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`without any “select[ion]” and without regards to the contents of the directory (i.e.
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`the alleged probe filtering information).
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`12.
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`To the extent that Petitioners and their expert argue that the SGI
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`Origin’s hub is not subsumed within a processing node, their arguments are still
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`inconsistent with SGI Origin practicing the proposed substitute claims. As a
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`threshold issue, the claims require that “the probe filtering unit being operable to
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`receive probes corresponding to memory lines from the processing nodes.”
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`However, if the hub is not within a processing node, then the hub at the home node
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`of SGI Origin is not receiving probes from the processing nodes, it is receiving a
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`request from another hub. See Horst Opp. Decl. ¶ 17. That is because processors
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`in SGI Origin can only communicate with each other through hubs. See, e.g.,
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`Culler at 597, 615 (“The PI hides the processors from the rest of the world, so any
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`other interface must only know the behavior of the PI and not of the processor and
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`SysAD bus themselves”); Laudon at 242.3
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`3
`Petitioners do not discuss the case where the requesting processor happens to
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`be in the home node. However, even if that scenario did meet the “transmit” and
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`“receive” limitations of the substitute claims with respect to one “processing node”
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`(i.e. the local processor), the hub would still not be “operable to receive probes”
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`from a “plurality of processing nodes” as the claims require. Moreover, even in
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`the scenario where there are two-processors per hub (Petitioners focus on the one-
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`processor per hub scenario), and the requesting processor was in the home node,
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`that would not meet the limitations of the substitute claims because the home node
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`would not be transmitting a “probe” “only to selected” processing nodes—it would
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`be transmitting to an owner hub that contains two processing nodes (of which only
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`one could be the owner of the memory line). Culler at 598, Fig. 8.15. The two-
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`processor-per-hub embodiment of SGI Origin would also not practice the claims
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`13.
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`Petitioners may argue that the hub in the home node is receiving a
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`probe “from the processing node” because ultimately a request sent by the
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`requesting node’s hub is due to a processor’s cache miss. However, there is no
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`reason to believe from the teachings of Culler and Laudon that any message
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`originating from a processor in a request node is the same as the alleged “probe”
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`received by the hub in a home node such that it could be said that the “probe
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`filtering unit . . . receive probes . . . from the processing nodes.” Indeed, neither
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`Culler or Laudon discuss the message format of any of the messages sent by the
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`processors, or sent or received by the hubs. Moreover, the disclosures in Culler
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`and Laudon suggest that what is sent by a “processor” is not the same as the
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`alleged “probe” received by the home node’s hub. The processor in the requesting
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`node is connected to a hub in the requesting node via a “SysAD bus.” Culler at
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`615, 616, Fig. 8.21. However, the hubs in SGI Origin communicate with each
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`other via a “Craylink” interface. Culler at 616, Fig. 8.21; Laudon at 245.
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`Additionally, the hub chip has significant logic between these interfaces. Culler at
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`614-618, 616, Fig 8.21. This logic, among other things, “hides the processors from
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`the rest of the world, so any other interface must only know the behavior of the PI
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`because the two processors located at one hub are connected by a “SysAD bus”
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`rather than a point-to-point architecture. Culler at 615, 616, Fig. 8.21.
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`[processor interface] and not of the processor and SysAD bus themselves.” Culler
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`at 615. The messaging between hubs is also significantly different from the
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`messaging within hubs: “[t]he router and the Hub internals use different data
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`transport formats protocols, and speeds.” Culler at 618. Culler teaches that, in
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`SGI Origin, in some instances, there is not even a one-to-one relationship between
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`the processor’s outgoing messages and the outgoing messages from the hub.
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`Culler at 617 (“If the processor (or cache) provides data as a reply to an incoming
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`intervention, it is the logic in the PI’s outgoing FIFO that expands the reply into
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`the two responses required by the protocol.”). Culler also identifies at least some
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`details of the cache coherent protocol as to which the processors are ignorant
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`about, and which the hub is responsible for implementing. Culler at 617 (“All
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`requests passing through the PIE in either direction are given request numbers . . .
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`the processor itself does not know about the request number . . . it is the PI’s job to
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`. . . match the processor’s responses to the outstanding interventions /
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`invalidations.”). In light of all of these disclosures together, it would not be
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`reasonable to assume that requests received by a hub in a home node in SGI Origin
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`is the same or even a modified version of a message sent by a requesting processor
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`attached to a different hub.
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`14.
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`Additionally, the references demonstrate that the SGI Origin system
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`does not have a “plurality of processing nodes interconnected by a first point-to-
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`point architecture.” The ’121 Patent makes clear that “[i]n a point-to-point
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`architecture,” there are “multiple processors directly connected to each other
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`through point-to-point links.” ’121 Pat. at 4:38-40 (emphasis added). However,
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`within a local node in SGI Origin, individual processors are connected via a
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`“SysAD bus,” which is also used to connect the processors to the hub chip. Culler
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`at 598, Fig. 8.15. The ’121 patent expressly distinguishes such buses from point-
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`to-point interfaces. ’121 Pat. at 4:40-42; see also Culler at 588-589. Moreover,
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`processors in separate nodes in the SGI Origin are not directly connected to each
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`other, as required by the substitute claims and the express teachings of the ’121
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`Patent. Rather, they are connected through, at a minimum, two hub chips (one hub
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`chip per each node), each of which “hides [its respective] processor from the rest
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`of the world, so any other interface must only know the behavior of the [hub
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`chip’s] PI [processor interface] and not of the processor and SysAD bus
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`themselves.” Culler at 615, 616, Fig. 8.21.4 Additionally, the communication
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`4
`This is not meant to indicate that the mere presence of some physical
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`components between individual processors is inconsistent with those processors
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`being directly interconnected by a point-to-point architecture. Indeed, the point-to-
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`point architecture itself can have components, such as in the ’121 Patent’s
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`teachings regarding use of a “switch” or a “ring.” ’121 Pat., Figs. 1B, 19, col.
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`between a hub chip and its processor, the communication within a hub chip, and
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`the communication in the network between hub chips all involve “different
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`transport formats protocols, and speeds.” Culler at 618. Together, these teachings
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`make clear that SGI Origin does not possess a “plurality of processing nodes
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`interconnected by a [] point-to-point architecture.”
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`15.
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`Finally, SGI Origin does not teach the claimed limitation of the
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`proposed substitute claims that the “probe filtering unit is coupled to a coherent
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`protocol interface and a non-coherent protocol interface.” It appears that
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`Petitioners and their experts are making an inherency argument. Notably, neither
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`Culler nor Laudon expressly state the SGI Origin’s hub is connected to both
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`coherent and non-coherent protocol interfaces. Also, although Culler describes the
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`hub as having a number of interfaces, Culler at 614-618, neither Petitioners nor
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`their expert identify any one of those interfaces as being the claimed coherent
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`6:24-35, 27:32-40. However, the description of the SGI Origin’s hub’s as “hiding”
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`processors and using “different . . . protocols” to communicate within hubs as
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`opposed to between hubs demonstrates that Origin’s processor-to-hub and hub-to-
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`hub communications are separate architectures (e.g. a SysAD bus and a “Craylink”
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`network) rather than the claimed single point-to-point architecture which
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`interconnects a plurality of processing nodes.
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`protocol interface or the claimed non-coherent protocol interface. Rather,
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`Petitioners’ expert argues that the fact that “both a processor and a Hub in the SGI
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`Origin architecture are capable of communicating coherent messages (e.g., cache
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`misses) and noncoherent messages (e.g., uncached I/O operations) to other
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`components in the machine (e.g., each other)” “mean[s] that each contains a
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`‘coherent protocol interface’ and ‘non-coherent protocol interface.’” Horst Opp.
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`Decl. ¶ 7. However, I believe that Petitioners’ argument plainly misapplies the
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`language of the proposed substitute claims. The fact that the SGI Origin’s hub and
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`processors can be involved in coherent and noncoherent operations does not
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`necessarily imply that the SGI Origin’s hub is coupled to a coherent protocol
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`interface and a noncoherent protocol interface. As described above, the proposed
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`claims require a probe filtering unit which is coupled to physically or logically
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`distinct coherent and non-coherent protocol interfaces. This is consistent with the
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`teachings of the ’121 Patent. ’121 Pat. at Fig. 3, 8:5-19. A system outside the
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`scope of the substitute claims could still perform both coherent and non-coherent
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`operations using one or more shared coherent/non-coherent interfaces, i.e. a single
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`interface which performs both coherent and non-coherent operations without any
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`physical or logical separation or distinction. A shared coherent/non-coherent
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`interface is not, for example, a non-coherent protocol interface because it is not “an
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`interface for communicating with components in a computer system without regard
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`to maintaining cache coherency.” Nothing in Culler or Laudon’s description of
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`SGI Origin is inconsistent with having only such shared interfaces. Indeed, to the
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`contrary, Culler describes SGI Origin’s coherent and non-coherent operations as
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`being part of a single “Origin protocol” occurring over the same “interfaces.”
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`Culler at 604, 610. Moreover, in discussing how Origin processes I/O (which is
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`typically associated with non-coherent transactions), the reference describes the
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`“Xbow” interface, which “connects the Hub to other I/O interfaces,” as permitting
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`not only non-coherent “uncached” I/O operations, but also “coherent DMA
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`operations.” Culler at 613-614. Thus, SGI Origin does not disclose the limitations
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`of the proposed substitute claims that the “probe filtering unit is coupled to a
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`coherent protocol interface and a non-coherent protocol interface.”
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`17
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`Patent No. 7,296,121
`Case Nos. IPR2015-00158, -00159, -00163
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`I declare under penalty of perjury that the foregoing is true and correct.
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`Executed on: December 31, 2015
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`Vojin G. Oklobdzija, PhD
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`18