5
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`Shared Memory |\/Iultiprocessors
`
`The most prevalent form of parallel architecture is the multiprocessor of small to
`moderate scale that provides a global physical address space and symmetric access to
`all of main memory from any processor, often called a symmetric mtiltiprocessor or
`SMP. Every processor has its own cache, and all the processors and memory modules
`attach to the same interconnect, which is usually a shared bus. SMPs dominate the
`server market and are becoming more common on the desktop. They are also impor-
`tant building blocks for larger~scale systems. The efficient sharing of resources, such
`as memory and processors, makes these machines attractive as “throughput
`engines” for multiple sequential jobs with varying memory and CPU requirements.
`The ability to access all shared data efficiently from any of the processors using ordi-
`nary loads and stores, together with the automatic movement and replication of
`shared data in the local caches, makes them attractive for parallel programming.
`These features are also very useful for the operating system, whose different pro-
`cesses share data structures and can easily run on different processors.
`From the viewpoint of the layers of the communication architecture in
`Figure 5.1, the shared address space programming model is supported directly by
`hardware. User processes can read and write shared virtual addresses, and these
`operations are realized by individual loads and stores of shared physical addresses.
`In fact, the relationship between the programming model and the hardware opera-
`tion is so close that they both are often referred to simply as “shared memory." A
`message-passing programming model can be supported by an intervening software
`layer—typically a run-time 1ibrary—that treats large portions of the shared address
`space as private to each process and manages some portions explicitly as per-process
`message buffers. A sendfreceive operation pair is realized by copying data between
`these buffers. The operating system need not be involved since address translation
`and protection on the shared buffers is provided by the hardware. For portability,
`most message—passing programming interfaces have indeed been implemented on
`popular SM1‘-’s. In fact, such implementations often deliver higher message—passing
`performance than traditional, distributed—memory message-passing systems——as
`long as contention for the shared bus and memory does not become a bottleneck-
`largely because of the lack of operating system involvement in communication. The
`operating system is still used for input/output and multiprogramming support.
`Since all communication and local computation generates memory accesses in a
`shared address space, from a system architect‘s perspective the key high-level design
`
`Sony Corporation v. Memory
`Integrity, LLC
`IPR2015-00158
`EXHIBIT
`Sony-1017