throbber
(12) United States Patent
`Kimura et al.
`
`(10) Patent N0.:
`(45) Date of Patent:
`
`US 6,439,822 B1
`Aug. 27, 2002
`
`US006439822B1
`
`(54) SUBSTRATE PROCESSING APPARATUS AND
`SUBSTRATE PROCESSING METHOD
`
`(75) Inventors: Yoshio Kimura; Issei Ueda; Mitiaki
`
`. - yatsushitaiqKagglko Ito’ an of -
`
`
`umamo 0' en
`
`
`
`5,562,383 A * 10/1996 Iwai et al. ............ .. 414/940 X
`5,603,777 A * 2/1997 Ohasi ................ .. 414/940 X
`5,628,604 A * 5/1997 Murata 618.1. ..
`414/940X
`2785133722 2 : 13:19); ?lm :1 ‘11- i ~~~~~~~~~~~ -- iii/3:8;
`
`, , 6,102,647 A * 8/2000 Yap ...................... .. 414/940 X uraae a. ..
`
`
`
`6,183,186 B1 * 2/2001 Howells 618.1. ....... .. 414/940X
`
`(73) Assignee: Tokyo Electron Limited, Tokyo (JP)
`
`FOREIGN PATENT DOCUMENTS
`
`( * ) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`JP
`JP
`
`6'2557O7
`10256346
`
`9/1994
`9/1998
`
`* cited by examiner
`
`(21) Appl. No.: 09/401,486
`(22) Filed:
`Sep. 22, 1999
`(30)
`Foreign Application Priority Data
`
`Sep. 22, 1998
`Oct. 13, 1998
`Oct. 29, 1998
`
`(JP) ......................................... .. 10-286062
`(JP) .... ..
`10-291090
`(JP) ......................................... .. 10-324532
`
`(51) Int. Cl.7 ................................................ .. B65G 1/10
`(52) US. Cl. .......................... .. 414/331.04; 414/416.03;
`414/416.08; 414/937; 414/940; 414/217;
`414/223.01; 414/749.1; 118/719
`(58) Field of Search .......................... .. 414/223.01, 217,
`414/2171, 935, 937, 749.1, 939, 940, 416.01,
`416.03, 416.08, 331.1, 331.02, 331.04;
`118/719; 211/152, 1.55
`
`(56)
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`Primary Examiner—Frank E. Werner
`(74) Attorney, Agent, or Firm—Rader, Fishman & Grauer
`PLLC
`
`(57)
`
`ABSTRACT
`
`A substrate processing apparatus comprises a processing
`section for performing processing for a substrate, a substrate
`carrier transfer section into/out of Which a substrate carrier
`holding a plurality of substrates is carried, and a substrate
`transfer mechanism for taking an unprocessed substrate out
`of the substrate carrier carried into the substrate carrier
`transfer section to deliver it to the processing section and for
`receiving a processed substrate from the processing section
`to deliver it into the substrate carrier placed on the substrate
`carrier transfer section. The substrate carrier transfer section
`shifts the position of the substrate carrier betWeen a ?rst
`position at Which the substrate carrier is carried to/from the
`outside and a second position at Which the substrate in the
`substrate carrier is delivered to/from the substrate transfer
`mechanism.
`
`4,886,412 A * 12/1989 Wooding et al. ...... .. 414/940 X
`5,048,164 A * 9/1991 Harima ................. .. 414/940 X
`
`15 Claims, 36 Drawing Sheets
`
`Daifuku Exhibit 1011, Page 1 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 1 0f 36
`
`US 6,439,822 B1
`
`\ I l
`‘* III
`FIG
`
`53 54
`
`Daifuku Exhibit 1011, Page 2 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 2 of 36
`
`US 6,439,822 B1
`
`I F
`
`Daifuku Exhibit 1011, Page 3 of 50
`
`Daifuku Exhibit 1011, Page 3 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 3 0f 36
`
`US 6,439,822 B1
`
`
`
`CONTROL 6'" 40 ,~—’ SECTION <"“ X0
`
`FIG. 3
`
`Daifuku Exhibit 1011, Page 4 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 4 0f 36
`
`US 6,439,822 B1
`
`(21)
`
`I F
`
`Daifuku Exhibit 1011, Page 5 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 5 0f 36
`
`US 6,439,822 B1
`
`22
`
`FIG. 5
`
`Daifuku Exhibit 1011, Page 6 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 6 0f 36
`
`US 6,439,822 B1
`
`Daifuku Exhibit 1011, Page 7 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 7 0f 36
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`US 6,439,822 B1
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`U.S. Patent
`
`Aug. 27, 2002
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`Sheet 8 0f 36
`
`US 6,439,822 B1
`
`()
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`
`Daifuku Exhibit 1011, Page 9 of 50
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`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 9 0f 36
`
`US 6,439,822 B1
`
`Daifuku Exhibit 1011, Page 10 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 10 of 36
`
`US 6,439,822 B1
`
`Daifuku Exhibit 1011, Page 11 of 50
`
`Daifuku Exhibit 1011, Page 11 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 11 0f 36
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`US 6,439,822 B1
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`Aug. 27, 2002
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`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 13 0f 36
`
`US 6,439,822 B1
`
`150
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`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 14 0f 36
`
`US 6,439,822 B1
`
`I
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`
`Daifuku Exhibit 1011, Page 15 of 50
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`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 15 0f 36
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`US 6,439,822 B1
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`Daifuku Exhibit 1011, Page 16 of 50
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`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 16 0f 36
`
`US 6,439,822 B1
`
`1132
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`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 17 of 36
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`US 6,439,822 B1
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`Daifuku Exhibit 1011, Page 18 Of 50
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`Daifuku Exhibit 1011, Page 18 of 50
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`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 18 0f 36
`
`US 6,439,822 B1
`
`1100
`
`CONTROL
`SECTION
`
`FIG.18
`
`Daifuku Exhibit 1011, Page 19 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 19 0f 36
`
`US 6,439,822 B1
`
`HOME ACCESS POSITION
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`BY 0m‘
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`FIG. 19
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`Daifuku Exhibit 1011, Page 20 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 20 of 36
`
`US 6,439,822 B1
`
`FIG. 20
`
`Daifuku Exhibit 1011, Page 21 of 50
`
`Daifuku Exhibit 1011, Page 21 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 21 of 36
`
`US 6,439,822 B1
`
`FIG. 21
`
`Daifuku Exhibit 1011, Page 22 of 50
`
`Daifuku Exhibit 1011, Page 22 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 22 of 36
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`US 6,439,822 B1
`
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`FIG.,22
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`Daifuku Exhibit 1011, Page 23 Of 50
`
`Daifuku Exhibit 1011, Page 23 of 50
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`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 23 of 36
`
`US 6,439,822 B1
`
`FIG.23
`
`Daifuku Exhibit 1011, Page 24 of 50
`
`Daifuku Exhibit 1011, Page 24 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 24 of 36
`
`US 6,439,822 B1
`
`Daifuku Exhibit 1011, Page 25 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 25 of 36
`
`US 6,439,822 B1
`
`603
`
`120
`
`FIG. 25
`
`Daifuku Exhibit 1011, Page 26 Of 50
`
`Daifuku Exhibit 1011, Page 26 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 26 of 36
`
`US 6,439,822 B1
`
`610
`
`605
`
`6016
`
`620
`
`FIG. 26
`
`Daifuku Exhibit 1011, Page 27 of 50
`
`Daifuku Exhibit 1011, Page 27 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 27 of 36
`
`US 6,439,822 B1
`
`751
`
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`Daifuku Exhibit 1011, Page 28 Of 50
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`Daifuku Exhibit 1011, Page 28 of 50
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`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 28 of 36
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`US 6,439,822 B1
`
`7 2 O DRIVE MECHANISM
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`Daifuku Exhibit 1011, Page 29 Of 50
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`U.S. Patent
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`Daifuku Exhibit 1011, Page 30 of 50
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`
`U.S. Patent
`
`Aug. 27, 2002
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`Sheet 30 of 36
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`US 6,439,822 B1
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`Daifuku Exhibit 1011, Page 31 Of 50
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`Daifuku Exhibit 1011, Page 31 of 50
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`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 31 of 36
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`US 6,439,822 B1
`
`Daifuku Exhibit 1011, Page 32 Of 50
`
`Daifuku Exhibit 1011, Page 32 of 50
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`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 32 of 36
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`US 6,439,822 B1
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`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 33 of 36
`
`US 6,439,822 B1
`
`HOME ACCESS POSITION
`
`BY AGV
`
`FIG. 33
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`Daifuku Exhibit 1011, Page 34 Of 50
`
`Daifuku Exhibit 1011, Page 34 of 50
`
`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 34 of 36
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`US 6,439,822 B1
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`Wm.0H,m
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`Daifuku Exhibit 1011, Page 35 of 50
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`Daifuku Exhibit 1011, Page 35 of 50
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`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 35 of 36
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`US 6,439,822 B1
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`Daifuku Exhibit 1011, Page 36 of 50
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`Daifuku Exhibit 1011, Page 36 of 50
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`

`
`U.S. Patent
`
`Aug. 27, 2002
`
`Sheet 36 of 36
`
`US 6,439,822 B1
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`Daifuku Exhibit 1011, Page 37 Of 50
`
`Daifuku Exhibit 1011, Page 37 of 50
`
`

`
`US 6,439,822 B1
`
`1
`SUBSTRATE PROCESSING APPARATUS AND
`SUBSTRATE PROCESSING METHOD
`
`BACKGROUND OF THE INVENTION
`
`1. Field of the Invention
`
`The present invention relates to a substrate processing
`method and a substrate processing apparatus for performing
`exposing processing and developing processing for a sub-
`strate such as a semiconductor substrate, an LCD substrate,
`or the like which is coated with a resist solution.
`
`2. Description of the Related Art
`In the photolithography technology in the fabrication
`process of a semiconductor device, a resist is coated on the
`surface of a semiconductor wafer (hereinafter referred to as
`a wafer), the coated resist is exposed to a predetermined
`pattern and developed, and thus a predetermined pattern of
`resist film is formed. A series of processing described above
`is performed by an apparatus in which an aligner is con-
`nected to a coating and developing system.
`A substrate carrier C housing 25 substrates, for example,
`semiconductor wafers are placed on a stage which is a
`substrate carrier transfer section by an automatic transfer
`robot. Awafer is then taken out of the carrier C by a delivery
`arm, delivered to a main transfer arm of the coating and
`developing system, and coated with a resist. Thereafter, the
`wafer is transferred to the aligner via an interface section to
`be exposed, and then returned to the coating and developing
`system to be developed. The wafer which has completed a
`series of processing is returned into the original carrier C by
`a route reverse to the one used when being transferred into
`the system. The carrier C into which all the wafers are
`returned after completing processing is transferred to a next
`system or a carrier stocker by the automatic transfer robot.
`Incidentally, the fabrication process of a semiconductor
`device is performed in a clean room in order to prevent
`adhesion of particles. But, the clean room is expensive, so
`that it is required to lay out processing apparatus efficiently.
`In the aforesaid prior art, however, there are some disad-
`vantages that a moving space for the automatic transfer
`robot which takes charge of transfer of substrates between
`apparatus needs to be provided in the clean room, and that
`a wafer or a glass substrate for a liquid crystal display (LCD)
`is recently increasing in size, thus causing an increase in its
`moving space, which makes it difficult to realize efficient
`layout.
`
`SUMMARY OF THE INVENTION
`
`The present invention is made in view of the aforesaid
`disadvantages, and its object is to provide an apparatus of
`which the occupation space of the entire system including a
`substrate carrier transfer mechanism corresponding to an
`automatic transfer robot is small, thereby efficiently utilizing
`a space in a clean room.
`Another object of the present invention is to provide an
`apparatus capable of easily controlling the delivery of a
`substrate carrier between the substrate carrier transfer
`mechanism and a substrate carrier transfer section.
`
`To attain these objects, a substrate processing apparatus of
`the present invention comprises a processing section for
`performing processing for a substrate, a substrate carrier
`transfer section into/out of which a substrate carrier holding
`a plurality of substrates is carried, and a substrate transfer
`mechanism for taking an unprocessed substrate out of the
`substrate carrier carried into the substrate carrier transfer
`
`section to deliver it
`
`to the processing section, and for
`
`10
`
`15
`
`20
`
`25
`
`30
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`2
`receiving a processed substrate from the processing section
`to deliver it into a substrate carrier mounted on the substrate
`carrier transfer section, the substrate carrier transfer section
`including means for moving the position of the substrate
`carrier between a first position at which the substrate carrier
`is carried to/from the outside and a second position at which
`a substrate in the substrate carrier is delivered to/from said
`substrate transfer mechanism.
`
`According to the aforesaid invention, even if the timing at
`which the substrate carrier transfer mechanism reaches the
`
`substrate carrier transfer section and the timing at which all
`substrates in the substrate carrier complete processing and
`are returned to the substrate carrier are not concurrent, for
`example,
`the substrate carrier and the substrates can be
`delivered smoothly, thus obtaining high throughput.
`Further, a substrate processing apparatus of the present
`invention comprises a substrate carrier transfer section,
`into/out of which a substrate carrier holding a plurality of
`substrates is carried, including cooling means, and a pro-
`cessing section for applying a resist onto an unprocessed
`substrate delivered from a substrate carrier carried into the
`substrate carrier transfer section.
`
`According to the aforesaid configuration, a substrate can
`be previously cooled prior to a cooling process of the
`substrate which is performed before resist coating, thereby
`reducing substrate processing time. Moreover, cooling pro-
`cessing before resist coating is performed by the cooling
`means of the substrate carrier transfer section, which makes
`it possible to remove the configuration of a cooling unit
`where cooling processing before resist coating is performed
`from the processing section, whereby an reduction in size of
`the apparatus is realized.
`Furthermore, a substrate processing method of the present
`invention comprises the steps of carrying a substrate carrier
`holding a plurality of unprocessed substrates from the out-
`side into a first position of a substrate carrier transfer section,
`interchanging positions of substrate carriers between the
`substrate carrier placed in the first position, and a substrate
`carrier holding processed substrates and placed in a second
`position of the substrate carrier transfer section, taking the
`unprocessed substrate out of the substrate carrier moved to
`the second position to transfer it to a processing section,
`subsequently processing the substrate in the processing
`section, returning the substrate processed in the processing
`section into the substrate carrier placed in the second
`position, thereafter interchanging positions of substrate car-
`riers between the substrate carrier placed in the second
`position and a substrate carrier holding unprocessed sub-
`strates and placed in the first position, and carrying the
`substrate carrier placed in the first position out to the outside.
`According to the aforesaid configuration, even if the
`timing at which the substrate carrier transfer mechanism
`reaches the substrate carrier transfer section and the timing
`at which all substrates in the substrate carrier complete
`processing and are returned to the substrate carrier are not
`concurrent, for example, the substrate carrier and the sub-
`strates can be delivered smoothly,
`thus obtaining high
`throughput.
`These objects and still other objects and advantages of the
`present invention will become apparent upon reading the
`following specification when taken in conjunction with the
`accompanying drawings.
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIG. 1 is a perspective view of a substrate processing
`apparatus according to a first embodiment of the present
`invention;
`
`Daifuku Exhibit 1011, Page 38 of 50
`
`Daifuku Exhibit 1011, Page 38 of 50
`
`

`
`US 6,439,822 B1
`
`3
`FIG. 2 is a plane View of a coating and developing system
`according to the first embodiment of the present invention;
`FIG. 3 is a front View of a substrate carrier transfer section
`of the coating and developing system according to the first
`embodiment of the present invention for explaining a sub-
`strate carrier transfer mechanism;
`FIG. 4(a) and FIG. 4(b) are perspective views showing
`means for moving a substrate carrier according to the first
`embodiment of the present invention;
`FIG. 5 is a perspective view of another means for moving
`the substrate carrier;
`FIG. 6 is a perspective view of the substrate carrier;
`FIG. 7 is a rear view of the coating and developing system
`according to the first embodiment of the present invention;
`FIG. 8 is a view showing another substrate carrier transfer
`mechanism;
`FIG. 9 is a plane view of a coating and developing system
`according to a second embodiment of the present invention;
`FIG. 10 is a front view of the coating and developing
`system according to the second embodiment of the present
`invention;
`FIG. 11 is a rear view of the coating and developing
`system according to the second embodiment of the present
`invention;
`FIG. 12 is a perspective view for explaining means for
`moving a substrate carrier according to the second inven-
`tion;
`FIG. 13 is a sectional view of FIG. 12;
`FIG. 14(a) and FIG. 14(b) are perspective views for
`explaining an operation mechanism of the coating and
`developing system according to the second embodiment of
`the present invention;
`FIG. 15 is a perspective view of a substrate carrier transfer
`section of a coating and developing system according to a
`third embodiment of the present invention;
`FIG. 16 is a sectional view of FIG. 15;
`FIG. 17 is a view showing the arrangement of substrate
`carriers according to the third embodiment of the present
`invention;
`FIG. 18 is a view for explaining an operation mechanism
`of the coating and developing system according to the third
`embodiment of the present invention;
`FIG. 19 is a view related to the third embodiment of the
`
`present invention, showing a state in which the position of
`the substrate carrier is shifted;
`FIG. 20 is a sectional view of a substrate carrier transfer
`
`section of a coating and developing system according to a
`fourth embodiment of the present invention;
`FIG. 21 is a perspective view of a substrate carrier transfer
`section of a coating and developing system according to a
`fifth embodiment of the present invention;
`FIG. 22 is a sectional view of FIG. 21;
`FIG. 23 is a perspective view of a substrate carrier transfer
`section of a coating and developing system according to a
`sixth embodiment of the present invention;
`FIG. 24 is a perspective view of a substrate carrier transfer
`section of a coating and developing system according to a
`seventh embodiment of the present invention;
`FIG. 25 is a schematic perspective view of a substrate
`carrier transfer section of a coating and developing system
`according to an eighth embodiment of the present invention;
`FIG. 26 is a view showing a state in which the positions
`of substrate carriers of the coating and developing system
`according to the eighth embodiment of the present invention
`are moved;
`
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`FIG. 27 is a view showing a substrate carrier transfer
`section of a coating and developing system according to a
`ninth embodiment of the present invention for explaining a
`substrate carrier transfer mechanism;
`FIG. 28 is a perspective view showing means for moving
`substrate carriers according to the ninth embodiment of the
`present invention;
`FIG. 29 is a sectional view of the coating and developing
`system according to the ninth embodiment of the present
`invention;
`FIG. 30(a), FIG. 30(b), FIG. 30(c), and FIG. 30(d) are
`views related to the ninth embodiment of the present
`invention, showing states in which the positions of the
`substrate carriers are moved;
`FIG. 31 is a perspective view of a substrate processing
`apparatus according to a tenth embodiment of the present
`invention;
`FIG. 32 is a rear view of a coating and developing system
`according to the tenth embodiment of the present invention;
`FIG. 33 is a view related to the tenth embodiment,
`showing a state in which the position of a substrate carrier
`is shifted;
`FIG. 34 is a plane view of the coating and developing
`system according to the tenth embodiment of the present
`invention;
`FIG. 35 is a rear view of a coating and developing system
`according to an eleventh embodiment of the present inven-
`tion; and
`FIG. 36 is a plane view of the coating and developing
`system according to the eleventh embodiment of the present
`invention.
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENT
`
`A first embodiment in which the present invention is
`applied to a coating and developing system for coating a
`wafer which is a substrate with a resist and developing the
`exposed resist will be described below. FIG. 1 is a schematic
`view showing a state in which an aligner 200 is connected
`to a coating and developing system 100. FIG. 2 is a plane
`view showing the coating and developing system 100.
`The coating and developing system 100 includes a sub-
`strate carrier transfer section 2 into/out of which a wafer
`substrate carrier (referred to simply as a substrate carrier
`hereinafter) C which is a substrate carrier holding a plurality
`of, for example, 25 semiconductor wafers W (referred to as
`wafers W hereinafter) in the form of shelves is carried, a
`processing section 3 for performing coating and developing
`processing for the wafer W, and a wafer transfer mechanism
`4 which is a substrate transfer mechanism for delivering the
`wafer W between the processing section 3 and the substrate
`carrier C placed on the substrate carrier transfer section 2. As
`for the substrate carrier transfer section 2, however, in FIG.
`1 and FIG. 2, the illustration of a mechanism portion thereof
`is omitted for convenience, and a position of the mechanism
`portion is denoted by a numeral “2”.
`In the substrate carrier transfer section 2, two substrate
`carriers C as a pair are vertically mounted and four inter-
`change mechanisms 20 (20A to 20D) for interchanging the
`upper and lower positions of the two substrate carriers C are
`laterally arranged as shown in FIG.3. It should be noted that
`in the coating and developing system 100,
`the substrate
`carrier transfer section 2 is regarded as located at the front,
`and the positions of the right, left, front, and rear are based
`on this direction when the processing section 3 is seen from
`the substrate carrier transfer section 2.
`
`Daifuku Exhibit 1011, Page 39 of 50
`
`Daifuku Exhibit 1011, Page 39 of 50
`
`

`
`US 6,439,822 B1
`
`5
`As shown in FIG. 3 and FIG. 4, the interchange mecha-
`nism 20 has a configuration in which a rotating arm 22
`which is a rotating member rotating forward and backward
`around an almost horizontal axis is provided at the upper end
`of a support rod 21 with a motor 23 between them, and in
`which a first substrate carrier mounting table S1 and a
`second substrate carrier mounting table S2 are provided
`respectively at both ends of the rotating arm 22 with attitude
`control mechanisms 24 between them. The first and second
`
`substrate mounting tables S1 and S2 respectively correspond
`to a first mounting section and a second mounting section of
`the present invention, and are provided with, for example,
`guide members for positioning the bottom portions of sub-
`strate carriers C and the like although not illustrated.
`The attitude control mechanisms 24 are provided for
`keeping the substrate carrier mounting tables S1 and S2
`nearly horizontal even if the rotating arm 22 is in any
`rotational position. For example, the attitude mechanism 24
`can be structured so that a motor is attached to the rotating
`arm 22 and the substrate carrier mounting table S1 (S2) is
`secured to the drive shaft of the motor to control the rotation
`
`angle of the motor in accordance with the rotation angle of
`the rotating arm 22.
`In the respective interchange mechanisms 20 (20A to
`20D), the motors 23 are controlled by a control section 40,
`and each of the rotating arms 22 is stopped in a vertical
`position. For instance, when the substrate carrier C holding
`wafers to be processed is placed on one of the mounting
`tables S1 and S2 from a substrate carrier transfer mechanism
`
`described later and a predetermined number of processed
`wafers are returned into the substrate carrier C placed on the
`other of the mounting tables S1 and S2, a control signal is
`sent from the control section 40 to the corresponding motor
`23. As a result, the rotating arm 22 is rotated 180° to thereby
`interchange the upper and lower positions of the mounting
`tables S1 and S2.
`
`Although the explanation is given in this embodiment on
`the assumption that the aforesaid interchange mechanism 20
`is used, the interchange mechanism 20 is not limited to the
`aforesaid structure. For instance, as shown in FIG. 5, it may
`be structured so that hanging members 25 and 25 are
`pivotally supported at both ends of the rotating arm 22, and
`that the substrate carrier mounting tables S1 and S2 are
`respectively provided at
`the lower ends of the hanging
`members 25 and 25 and rotated in nearly horizontal posi-
`tions just like a Ferris wheel. Moreover, in the substrate
`carrier transfer section 2, a substrate carrier called a carrier
`for pickup use or the like for housing dummy wafers or the
`like may be placed, in which case, for instance, a dedicated
`mounting table may be provided adjacent to a row of four
`interchange mechanisms 20 and the aforesaid substrate
`carrier can be mounted on this mounting table.
`A substrate carrier transfer mechanism 5 is provided
`above the coating and developing system 100, for example,
`in the vicinity of the ceiling of a clean room. The substrate
`carrier transfer mechanism 5 is movable while guided by a
`guide member 51 extending in a lateral direction,
`for
`instance, almost horizontally. Before explaining the sub-
`strate carrier transfer mechanism 5,
`the structure of the
`substrate carrier C is described based on FIG. 6. The
`substrate carrier C in this embodiment has a structure in
`
`which the front face thereof is open and a U-shaped handle
`C2 in front view is attached on a case C1 provided with slots
`for holding the peripheries of wafers W. The substrate carrier
`transfer mechanism 5 has a hanging member 52 passing
`under the handle C2 of the substrate carrier C to engage with
`the handle C2. The hanging member 52 is movable back and
`
`10
`
`15
`
`20
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`25
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`30
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`35
`
`40
`
`45
`
`50
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`
`60
`
`65
`
`6
`forth, and up and down, and delivers the substrate carrier C
`to the mounting table S1 (S2) located at the upper side out
`of the mounting tables Si and S2. Incidentally, the substrate
`carrier transfer mechanism 5 is not limited to the structure in
`
`which the substrate carrier C is hung. The substrate carrier
`transfer mechanism 5 may have a structure in which the
`substrate carrier C is held by the side faces thereof with a
`pair of opening and closing arms.
`the wafer transfer
`Returning to FIG. 1 and FIG. 2,
`mechanism 4 will be described. In the wafer transfer mecha-
`nism 4, an arm 42 movable back and forth is attached to a
`transfer base 41 which is movable vertically and laterally.
`The wafer transfer mechanism 4 sends and receives the
`
`wafer W to/from the substrate carrier C on the mounting
`table S2 (S1) located on the lower side out of the mounting
`tables S1 and S2 and to/from a delivery unit described later
`in the processing section 3.
`The processing section 3 includes two main transfer arms
`31 and 32 at the center thereof, and shelves 6A, 6B and 6C
`are respectively provided in front of, behind, and on the left
`side of the main transfer arms 31 and 32. The shelves 6A to
`
`6C are each composed of a plurality of units piled on top of
`one another. As shown in FIG. 7, these units are allocated for
`a heating unit for heating a wafer, a cooling unit for cooling
`the wafer, a hydrophobic processing unit for making the
`surface of the wafer hydrophobic, an alignment unit for
`aligning the wafer, and the like. Further,
`in each of the
`shelves 6A and 6C, one unit of a unit group is allocated for
`a delivery unit of the wafer. In FIG. 7, numerals 61 and 62
`represent deliver units. It should be noted that the allocation
`of the units shown in FIG. 7 is performed for convenience
`to give an image, and that the arrangement of the units is not
`restricted to the above one. Adetailed operation mechanism
`in the processing section 3 will be explained in a second
`embodiment described later.
`
`On the right side of the main transfer arms 31 and 32,
`three developing units 33 composing a developing process-
`ing section are provided on the upper tier side and three
`coating units 34 composing a coating processing section on
`the lower tier side. The main transfer arms 31 and 32 are
`ascendable and descendable, rotatable around a vertical axis,
`and movable forward and backward, and assigned to deliver
`the wafer W between the respective units of the shelves 6A
`to 6C, the coating units 34, and the developing units 33.
`Incidentally, the delivery of the wafer W between the main
`transfer arms 31 and 32 is performed via an ascendable and
`descendable intermediate stage 30.
`The coating and developing system 100 includes an
`interface section 7, and the processing section 3 is connected
`to the aligner 200 (See FIG. 1.) with the interface section 7
`between them. The interface section 7 is used for preventing
`the wafer W from staying due to difference in processing
`speed between the coating and developing system 100 and
`the aligner 200, and includes a transfer arm 72 for transfer-
`ring the wafer W between the delivery unit 62, an inlet/outlet
`port of the aligner 200, and a buffer carrier 71.
`Next, the operation of the aforesaid embodiment will be
`described. First, the substrate carrier C carried while hung in
`the vicinity of the ceiling of the clean room by the substrate
`carrier transfer mechanism 5 is placed on the mounting table
`S1 (S2) located on the upper tier side which is a first position
`of the substrate carrier transfer section 2. The rotating arm
`22 of the interchange mechanism 20 is then rotated 180° to
`thereby change the vertical placement of the mounting table
`SI (S2), so that the substrate carrier C moves to the lower tier
`side which is a second position. Subsequently, the unproc-
`
`Daifuku Exhibit 1011, Page 40 Of 50
`
`Daifuku Exhibit 1011, Page 40 of 50
`
`

`
`US 6,439,822 B1
`
`7
`essed wafer W is taken out of the substrate carrier C by the
`wafer transfer mechanism 4 to be delivered to the delivery
`unit 61 (See FIG. 7.) of the processing section 3. The wafer
`W is transferred to processing units of the shelves 6A or 6C
`sequentially by means of the main transfer arm 31 and
`undergoes predetermined processing, for example, hydro-
`phobic processing, cooling processing or the like. Then,
`after being coated with a resist in the coating unit 34 and
`heat-treated, the wafer W is carried from the delivery unit 62
`to the aligner 200 (See FIG. 1.) via the interface section 7.
`The wafer W exposed in the aligner 200 is returned to the
`processing section 3 by a route reverse to the above and
`transferred to the developing unit 33 by the main transfer
`arm 32 to be developed. Specifically, the wafer W undergoes
`heating and cooling processing before developing process-
`ing. The developed wafer W is returned into the original
`substrate carrier C on the mounting table S1 (S2) of the
`substrate carrier transfer section 2 by a route reverse to the
`above.
`
`Meanwhile, on the mounting table S2 (S1) on the upper
`tier side, the next substrate carrier C is mounted by the
`substrate carrier transfer mechanism 5 by this point in time.
`After all the wafers W in the substrate carrier C on the
`
`mounting table S1 (S2) on the lower tier side complete
`processing and are returned into the above substrate carrier
`C, the rotating arm 22 of the interchange mechanism 20 is
`rotated in accordance with a control signal from the control
`section 40 to thereby interchange the upper and lower
`positions of the mounting tables S1 and S2. The substrate
`carrier C moved to the upper tier side is transferred to the
`next processing station or a stocker by the substrate carrier
`transfer mechanism 5. Incidentally, the operation in which
`the substrate carrie

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