UNITED STATES PATENT AND TRADEMARK OFFICE
`____________________________
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________________________
`HUGHES NETWORK SYSTEMS, LLC and
`HUGHES COMMUNICATIONS, INC.,
`Petitioners,
`v.
`CALIFORNIA INSTITUTE OF TECHNOLOGY,
`Patent Owner.
`____________________________
`IPR2015-00059 (Patent 7,916,781)
`____________________________
`
`
`SUPPLEMENTAL DECLARATION OF HENRY D. PFISTER
`
`
`
`Hughes, Exh. 1074, p. 1
`
`
`____________________________
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`____________________________
`HUGHES NETWORK SYSTEMS, LLC and
`HUGHES COMMUNICATIONS, INC.,
`Petitioners,
`v.
`CALIFORNIA INSTITUTE OF TECHNOLOGY,
`Patent Owner.
`____________________________
`IPR2015-00059 (Patent 7,916,781)
`____________________________
`
`
`SUPPLEMENTAL DECLARATION OF HENRY D. PFISTER
`
`
`
`Hughes, Exh. 1074, p. 1
`
`
`
`I, Henry D. Pfister, declare as follows:
`
`1.
`
`I make this declaration based upon my own personal knowledge
`
`and, if called upon to testify, would testify competently to the matters
`
`contained herein.
`
`2.
`
`I have previously provided a declaration in this matter related to
`
`the patentability of U.S. Patent No. 7,916,781 ("the ’781 Patent"). Ex. 1010.
`
`II. Background and Qualifications
`3. My qualifications have been addressed previously. Ex. 1010
`
`pp. 4-6, 88-97.
`
`III. Scope
`I understand that the a petition was filed with the United States
`4.
`
`Patent and Trademark Office for inter partes review of U.S. Patent No.
`
`7,916,781 (“’781 patent”). I further understand that the Patent Trial and
`
`Appeal Board (the “Board”) has decided to institute inter partes review of
`
`claims 1 and 2 of the ’781 patent under 35 U.S.C. § 102 based on prior art
`
`(“Divsalar”).
`
`5.
`
`This declaration is a statement of my opinions on issues raised
`
`in Patent Owner’s opposition (Paper 24) and the supporting Declaration of
`
`Dr. Solomon Golomb (Ex. 2024). In reaching these opinions, I have
`
`reviewed the Board’s Decision on Institution of Inter Partes Review, the
`
`
`
`2
`
`Hughes, Exh. 1074, p. 2
`
`
`
`patent owner’s response, and the direct and cross-examination testimony of
`
`Dr. Solomon W. Golomb.
`
`IV. Legal Understanding
`6. My understanding of the legal issues related to this matter were
`
`set forth in my original declaration. Ex. 1010 pp. 3-7.
`
`V.
`
`Patent Owner’s Response
`
`A. Overview
`
`7.
`
`The patent owner’s response is based primarily on two
`
`arguments. First, that the “first encoding operation” described in claim 1 of
`
`‘781 must include “irregularity”. Second, that the “accumulation” in the
`
`second encoding operation of claim 1 of ‘781 must include the “addition of a
`
`previously generated parity bit and more than one input bit in order to
`
`generate a second parity bit”.
`
`8.
`
`I disagree that Patent Owner’s proposed restrictions on the
`
`claim language are appropriate. Claims 1 and 2 contain no language
`
`suggesting these restrictions. Instead, it appears that patent owner has
`
`attempted to narrow the claim language based on certain embodiments
`
`described in the patent specification.
`
`Another problem is that the patent owner’s interpretation of
`
`3
`
`9.
`
`
`
`Hughes, Exh. 1074, p. 3
`
`
`
`claim 1 is undercut by the structure of its dependent claims. In particular,
`
`claim 9 depends on claim 1 and can be seen to require irregularity.
`
`However, implicitly requiring irregularity in claim 1 renders claim 9
`
`superfluous. On the other hand, interpreting the claims as written does not
`
`cause this problem.
`
`B. A Person of Ordinary Skill in the Art Would Not Understand
`the Claimed “Linear Transform Operation” to Require
`Irregularity
`
`10.
`
`In my opinion, the “linear transform” in claim 1 as understood
`
`by a person of ordinary skill in the art is not required to have “irregularity”
`
`and an RA code is a special case of an IRA code.
`
`11. A linear transform(ation) is a very well-defined concept in
`
`mathematics and engineering. In the context of binary codes, a person of
`
`ordinary skill in the art would interpret this term as a binary linear function
`
`that maps a vector (say length-𝑘𝑘) to another vector (say length-𝑛𝑛). The
`
`output vector of any binary linear function can be represented as the
`
`multiplication of the input vector by a fixed binary matrix with all arithmetic
`
`performed modulo-2.
`
`12. For example, the Patent Owner’s expert (Dr. Golomb) admits
`
`that a “linear transformation” has an established meaning to persons skilled
`
`
`
`4
`
`Hughes, Exh. 1074, p. 4
`
`
`
`in the art, which does not require irregular repetition or scrambling of the
`
`input bits being transformed, Ex. 1073 (Golomb Dep. Tr.) at 27:14-29:21.
`
`13.
`
`In the parent ‘032 Patent, the inventors included the limitation
`
`“randomly chosen irregular repeats of the message bits” in claim 1. Ex.
`
`1003 at 8:16-17. Similarly, in the grand-parent ‘710 Patent, the inventors
`
`claimed a “first coder operative to repeat said stream of bits irregularly and
`
`scramble the repeated bits.”
`
`14. Thus, the inventors clearly understood how to restrict their
`
`claims to require irregularity. A person of ordinary skill in the art would
`
`understand that, by failing to include that restriction in claim 1 of the ‘781
`
`Patent, the inventors were intentionally claiming more broadly.
`
`15. Another issue is that claim 9, “[t]he method of claim 6, wherein
`
`the information bits appear in a variable number of subsets” restricts the
`
`LDGM encoder to have irregularity. If irregularity was already required by
`
`claim 1, as Dr. Golomb proposes, then claim 9 would be superfluous.
`
`16. To see this, let 𝐺𝐺=[𝑔𝑔𝑖𝑖,𝑗𝑗] be the generator matrix of an LDGM
`5
`
`code that, as described in claim 6, computes “exclusive-OR summing of bits
`
`in subsets of the information bits”. In this case, the definition of a generator
`
`
`
`Hughes, Exh. 1074, p. 5
`
`
`
`. From this, we
`
`matrix implies that the information bits 𝑥𝑥=(𝑥𝑥1,…,𝑥𝑥𝑘𝑘) are mapped to the
`code bits 𝑦𝑦=(𝑦𝑦1,…,𝑦𝑦𝑛𝑛) via the equation 𝑦𝑦𝑗𝑗=∑ 𝑔𝑔𝑖𝑖,𝑗𝑗𝑥𝑥𝑖𝑖
`𝑘𝑘𝑖𝑖=1
`see that the subset of information bits summed for the 𝑗𝑗-th output includes
`information bit-𝑖𝑖 if and only if 𝑔𝑔𝑖𝑖,𝑗𝑗=1. So, the weight (i.e., the number of
`ones) in the 𝑖𝑖-th row of 𝐺𝐺 determines the number of subsets that include
`information bit-𝑖𝑖. Thus, an information bit appears in a subset a variable
`number of subsets if and only if different rows of 𝐺𝐺 have different weights.
`
`For a linear transform that only repeats bits, the row weight equals the
`
`number of times that a bit is repeated (e.g., see Exhibit 1200 (a)). Therefore,
`
`we see that the limitation in claim 9 requires irregularity.
`
`17.
`
`In 4:46-49 of the ‘781 Patent, the inventors also explicitly
`
`describe one embodiment of the proposed invention as the special case of
`
`RA codes:
`
`“For example, regular repeat and accumulate (RA) codes
`
`can be considered nonsystematic IRA codes With a=1 and
`
`exactly one f_i equal to 1, say f_q=1, and the rest zero”
`
`18. Thus, a person of ordinary skill in the art after reading the
`
`specification would consider RA codes as a special case of IRA codes.
`
`6
`
`
`
`Hughes, Exh. 1074, p. 6
`
`
`
`C. A Person of Ordinary Skill Would Not Understand the
`Claimed “Accumulation Operation” to Require Addition of a
`Previously Generated Parity Bit and More Than One Input Bit
`In Order to Generate a Second Parity Bit”
`
`19.
`
`In my opinion, the broadest reasonable interpretation of the
`
`term “accumulation operation” in claim 1 certainly includes all of the
`
`embodiments described in the specification. In particular, it includes the
`
`accumulator described in 3:6-28 of the ‘781 patent. In fact, the exact same
`
`accumulator is depicted in 702 and 704 of Fig. 7 in the ‘781 patent and
`
`described as an “accumulator” in 7:9-13 of the ‘781 patent.
`
`20.
`
` The definition of accumulation in claim 1, as proposed by Dr.
`
`Golomb, is extremely narrow and does not represent the broadest reasonable
`
`interpretation of the claim. Under cross-examination, Dr. Golomb said
`
`plainly [Ex. 1073 (Golomb Dep. Tr.) at 74:6–75:25] that the accumulator
`
`described in 3:6-28 of ‘781 does not satisfy his interpretation of the claim 1
`
`language. This assertion implies that his interpretation of claim 1 does not
`
`include multiple preferred embodiments described in the specification
`
`including the ones shown in Fig. 4 and Fig. 7. Moreover, the embodiment
`
`shown in Fig. 4 is described in claim 5, which depends indirectly on claim 1.
`
`Thus, Dr. Golomb’s interpretation is too narrow in view of the claims and
`
`description of embodiments in the specification.
`
`
`
`7
`
`Hughes, Exh. 1074, p. 7
`
`
`
`21. Dr. Golomb’s proposed interpretation of the “accumulation
`
`Ex. 2024 (Golomb Decl.) ¶ 61. However, this interpretation would exclude
`
`being embodiments of the claimed accumulation operation, such as Figures
`
`4 and 7.
`
`operation” restricts the claim to cases where the parameter 𝑎𝑎 is 2 or more.
`the 𝑎𝑎=1 accumulators that are repeatedly described in the specification as
`22. To see that the 𝑎𝑎=1 accumulator appears in Fig. 7, we observe
`
`that both 702 and 704 of Fig. 7 contain the block diagram
`
`23. This block diagram is well known to represent the input-output
`
`
`
`relationship 𝑦𝑦𝑗𝑗=𝑦𝑦𝑗𝑗−1+𝑥𝑥𝑗𝑗 where 𝑥𝑥𝑗𝑗 is the input sequence and 𝑦𝑦𝑗𝑗 is the
`this is the same input-output relationship that is used to define the 𝑎𝑎=1
`
`output sequence. Moreover, when the state variable is initialized to zero,
`
`accumulator described in 3:6-28 of the ‘781 patent.
`
`24.
`
`In my opinion, the “ACC” block in Fig. 4 is intended to
`
`
`
`8
`
`Hughes, Exh. 1074, p. 8
`
`
`
`represent the rate-1 accumulator where 𝑎𝑎=1. This is entirely consistent
`
`with the specification’s description that the accumulator have a code rate
`
`“close to 1”. The term “ACC” is used in Figure 4 as opposed to the more
`
`general term “INNER” used in Fig. 2 to label the second encoder.
`
`25.
`
`In my opinion, the “INNER” encoder block in Fig. 2, however,
`
`may also represent the accumulator described in 4:11-24 of ‘781 for any
`
`at 41; Ex. 2024 (Golomb Decl.) ¶ 61, we see that this inner code block
`
`𝑎𝑎≥1. Using Dr. Golomb’s decomposition of the factor graph in Paper 24
`receives 𝑟𝑟𝑎𝑎 bits from the permutation and computes 𝑟𝑟 output bits. But, the
`
`rate of a component code (e.g., INNER or OUTER) is given by the number
`
`we see that code rate of the inner code is 𝑟𝑟𝑟𝑟𝑟𝑟=𝑎𝑎. One problem with Dr.
`preferably within 1% of 1”. Ex. 1005, 2:65-3:2. If 𝑎𝑎≥2, however, then the
`only include the case where 𝑎𝑎≥2.
`
`
`of input bits divided by the number of output bits (e.g., this is defined in
`
`Divsalar, Section 2 and used in Section 3 for turbo-like codes). From this,
`
`Golomb’s interpretation is that the inner coder is consistently described in
`
`the patent specification as having a rate that is “close to 1” and “more
`
`rate is at least 2, and this is not within 50% of 1. Based on this, a person of
`
`ordinary skill in the art would not conclude that the intent of claim 1 was to
`
`9
`
`Hughes, Exh. 1074, p. 9
`
`
`
`26. Dr. Golomb’s interpretation of Fig. 3 in ‘781 described in Paper
`
`24 at 41; Ex. 2024 (Golomb Decl.) ¶ 61 is therefore flawed. The more
`
`natural decomposition of the factor graph of Fig. 3, in view of the
`
`description in the specification, is shown below:
`
`
`
`10
`
`
`
`Hughes, Exh. 1074, p. 10
`
`
`
`27.
`
`In the annotated figure above, the factor graph is divided into
`
`the factor graph of an LDGM code and the factor graph of an accumulate
`
`code. The bit nodes on the left side inside the green box represent the
`
`information bit nodes of the LDGM code. The permutation block represents
`
`the randomized edge connections between bit and check nodes that are
`
`generated by encoding the LDGM code are equal to the modulo-2 sum of the
`
`bits associated with the edges on the left side of the parity checks. Using the
`
`. Using
`
`typically used to construct LDGM codes. The parity bits 𝑤𝑤1,…,𝑤𝑤𝑟𝑟
`notation of 4:11-24 of ‘781, this implies that 𝑤𝑤𝑗𝑗=∑ 𝑣𝑣(𝑗𝑗−1)𝑟𝑟+𝑖𝑖
`𝑟𝑟𝑖𝑖=1
`these variables, the accumulate factor graph defines the encoder 𝑥𝑥𝑗𝑗=𝑥𝑥𝑗𝑗−1+
`𝑤𝑤𝑗𝑗. This is the natural decomposition of the factor graph for the encoder
`with rate-1 as suggested by the specification, rather than rate-𝑎𝑎 as proposed
`
`
`shown in Fig. 4, where the LDGM encoder is followed by an accumulate
`
`code. Additionally, this interpretation of Fig. 3 leads to an INNER code
`
`by Dr. Golomb.
`
`
`
`
`
`11
`
`Hughes, Exh. 1074, p. 11
`
`
`
`28.
`
`All statements made herein of my own knowledge are true and
`
`all statements made on information and belief are believed to be true.
`
`I
`
`further understand that willful false statements and the like are punishable by
`
`fine or imprisonment, or both under Section 1001 of Title 18 of the United
`
`States Code.
`
`I declare under penalty of perjury that the foregoing is true and
`
`correct.
`
`Executed on 0C+°L9¢f 3:7, 2015 at
`
`l0tA1*'l/\r1wu NC
`
`
`
`12
`
`Hughes, Exh. 1074, p. 12
`
`Hughes, Exh. 1074, p. 12
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