United States Patent [19]
`Yap
`
`US006073193A
`[11] Patent Number:
`[45] Date of Patent:
`
`6,073,193
`Jun. 6, 2000
`
`[54] FAIL SAFE METHOD AND APPARATUS FOR
`
`FOREIGN PATENT DOCUMENTS
`
`A USB DEVICE
`[75] Inventor: Kok-Kean Yap, Milpitas, Calif.
`
`[73] As'
`s1gnee:
`
`C
`S
`' dt C
`S
`ypress emlcon uc 0r 0rp., an
`1056, Cahf-
`
`[21] App1_N0_; 08/839,981
`_
`Apr- 24’ 1997
`[22] F1199:
`[51]
`Int. c1.7 .................................................... .. G06F 13/00
`[52] US. Cl. ............................ .. 710/100; 710/131; 714/1;
`714/3
`[58] Field of Search ................................... .. 395/280, 180,
`395/181, 182.01, 182.03, 828, 830; 710/100,
`8, 10, 131; 714/1, 2, 3, 5
`References Cited
`
`[56]
`
`US. PATENT DOCUMENTS
`
`3/1974 Matena .................................... .. 379/33
`3,800,090
`5/1974 Huettner et 211.
`340/1725
`3,810,120
`3 864 670 2/1975 Inoue et al
`340/172 5
`471957351
`3/1980 Earner et aL
`__ 34O/825_O5
`4’481’625 11/1984 Roberts et a1_
`_______ __ 370/85
`4,775,976 10/1988 Yokoyama
`______ __ 371/9
`5,282,166
`1/1994 Ozaki ...... ..
`365/203
`711/117
`5,404,480
`4/1995 suluki ---- -
`5,471,524 11/1995 Colvin et a1. .
`379/200
`5,566,296 10/1996 Ohmori et a1. ....................... .. 395/180
`5,675,813 10/1997 Holmdahl .
`
`WO 97/36230 10/1997 WIPO .
`Primary Examiner—AyaZ R. Sheikh
`Assistant Examiner—Ario Etienne
`A
`A
`F' —Ch' h PM~
`PC
`.
`a1orana, .
`ttorney, gent, 0r zrm
`r1stop er .
`[57]
`ABSTRACT
`
`A method and apparatus for determining and recovering
`from a USB micro-controller busy condition, Wherein a
`toggle variable indicative of Whether the USB micro
`Controller 12 in the b“_SY_C°ndi?°n do??? is stlored F118‘
`P18910989 “09mm 15 mcrememe 1. Fetoggevana e
`1s settl. ghe couéiter 1s cheézked to deteirnéine 15 the 1counte; his
`
`mac 6 a pre etermme Count’ an 1 so am mes O t 6
`USB micro-controller are disconnected from a USB bus
`coupled to the USB micro-controller for a predetermined
`amount of time to cause a USB host computer coupled to the
`USB micro-controller to re-initialize the USE micro
`controller. The memory contains a data structure Including
`?elds for storing the toggle variable, and a count indicative
`of hoW many times the toggle variable has been set for
`im lementin the Counter Firmware in the memor includes
`p
`g
`'
`.y
`.
`code segments con?gured to store the toggle variable In the
`data structure, determine if the toggle variable is set, incre
`ment the count ?eld if the toggle variable is set, determine
`if the counter has reached the predetermined count, and
`disconnect the data lines of the processor from the USB bus
`for a predetermined amount of time if the counter has
`reached the predetermined Count
`
`20 Claims, 7 Drawing Sheets
`
`12
`
`X MILLISECONDS ( 10°
`INTERRUPT
`ROUTINE
`l
`IS
`TOGGLE
`VARIABLE SET
`(see Fig. 5 and 6a)
`
`200
`
`INCREMENT
`COUNTER
`(e.g., COUNT = COUNT +1,
`see Fig. 5)
`
`300
`/
`
`CLEAR I/O PIN (or ENB)
`FOR 2 MICROSECONDS
`THEN SET 1/0 PIN (or ENB)
`(see Figs. 2 and 3)
`
`500
`/
`
`BLACKBERRY Ex. 1002, page 1
`
`

`

`US. Patent
`
`Jun. 6, 2000
`
`Sheet 1 0f 7
`
`6,073,193
`
`mm:
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`BLACKBERRY EX. 1002, page 2
`
`BLACKBERRY Ex. 1002, page 2
`
`

`

`U.S. Patent
`
`Jun. 6,2000
`
`Sheet 2 of7
`
`6,073,193
`
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`BLACKBERRY Ex. 1002, page 3
`
`

`

`U.S. Patent
`
`Jun. 6,2000
`
`Sheet 3 of7
`
`6,073,193
`
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`BLACKBERRY Ex. 1002, page 4
`
`

`

`U.S. Patent
`
`Jun. 6,2000
`
`Sheet 4 of7
`
`6,073,193
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`BLACKBERRY Ex. 1002, page 5
`
`

`

`U.S. Patent
`
`Jun. 6,2000
`
`Sheet 5 of7
`
`6,073,193
`
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`BLACKBERRY Ex. 1002, page 6
`
`

`

`U.S. Patent
`
`Jun. 6,2000
`
`Sheet 6 of7
`
`6,073,193
`
`PACKET
`RECEIVED
`BIT SET
`AND
`NAK
`BIT CLEARED
`(see Fig. 5)
`
`RESET
`
`CLEAR TOGGLE
`VARIABLE AND
`COUNTER
`(see Fig. 5)
`
`SET
`TOGGLE
`VARIABLE
`(see F i g. 5)
`
`Fig. 6a
`
`NAK
`BTI‘ SET
`(see Fig. 5)
`
`BLACKBERRY Ex. 1002, page 7
`
`

`

`U.S. Patent
`
`Jun. 6, 2000
`
`Sheet 7 0f 7
`
`6,073,193
`
`x MILLISECONDS 10°
`INTERRUPT
`ROUTINE
`
`200
`
`NO
`
`IS
`TOGGLE
`VARIABLE SET
`('see Fig. 5 and 6a)
`
`INCREMENT
`COUNTER
`(e.g., COUNT = COUNT +1,
`see Fig. 5)
`
`300
`f
`
`CLEAR 1/0 PIN (or ENB)
`FOR 2 MICROSECONDS
`THEN SET 1/0 PIN (or ENB)
`(see Figs. 2 and 3)
`
`500
`/
`
`600
`
`FIG. 617
`
`BLACKBERRY Ex. 1002, page 8
`
`

`

`1
`FAIL SAFE METHOD AND APPARATUS FOR
`A USB DEVICE
`
`2
`the second method requires additional USB host computer
`operating system overhead to keep track of and recover from
`the USB device broWn out condition.
`
`6,073,193
`
`CROSS REFERENCES TO RELATED
`APPLICATIONS
`
`This application may be related to US. patent application
`Ser. No. 08/705,807 ?led Aug. 30, 1996, entitled “DUAL
`ROM MICROPROGRAMMABLE MICROPROCESSOR
`AND UNIVERSAL SERIAL BUS MICROCONTROLLER
`DEVELOPMENT SYSTEM” Now US. Pat. No. 5,859,993,
`and US. patent application Ser. No. 08/711,419 ?led Aug.
`30, 1996, entitled “MICROCONTROLLER DEVELOP
`MENT SYSTEM AND APPLICATIONS THEREOF FOR
`DEVELOPMENT OF A UNIVERSAL SERIAL BUS
`MICROCONTROLLER”, both of Which are incorporated
`herein by reference.
`
`10
`
`15
`
`BACKGROUND OF THE INVENTION
`
`1. Field of the Invention
`This invention relates to a fail safe method and apparatus
`for a Universal Serial Bus (“USB”) device, and more
`particularly to a method and apparatus for alloWing a USB
`device to recover from a malfunction condition.
`2. Discussion of Background
`USB is a peripheral bus standard that alloWs computer
`peripherals to be attached to a personal computer Without the
`need for specialiZed cards or other vendor speci?c hardWare
`attachments. The USB standard speci?es a common con
`?guration for the connection of Well knoWn peripherals,
`such as CD-ROM, tape and ?oppy disk drives, scanners,
`printers, keyboards, joysticks, mice, telephones, modems,
`etc. to a USB host computer. In addition to Well knoWn
`peripheral devices, the USB standard has ?exibility to
`accommodate less knoWn and neWly developed devices,
`such as plug-and-play devices Which are automatically con
`?gured by the host computer When these devices are added.
`Information about the USB standard, including the USB
`speci?cation v1.0, incorporated herein by reference, for
`building USB compliant devices, is currently available free
`of charge over the Internet.
`HoWever, a malfunction condition may occur in a USB
`device, such as a plug-and-play device, Wherein the USB
`device after being con?gured by the host computer may
`malfunction and stop communicating With the host com
`puter due to problems, such as transmission errors, USB
`protocol errors, bugs in the host operating system or device
`?rmWare, etc. For eXample, a host operating system may
`terminate the function of the USB device, Which may be
`busy at the moment or fails to acknoWledge incoming data
`packets more than three times, for not communicating With
`the host computer. The above situation is referred to as a
`“broWn out” condition.
`According to the USB speci?cation v1.0, page 201, the
`host operating system is supposed to record the last error
`type Without trying to re-establish communications With the
`non-communicating USB device. When this occurs, (1) the
`user may have to re-boot the USB device or physically
`disconnect and then re-connect the USB device to alloW the
`host computer to recogniZe and then re-con?gure the USB
`device, or (2) the host computer operating system must be
`smart enough to avoid terminating the USB device When the
`USB device is terminally busy not communicating (e.g.,
`continuously returning non-acknoWledge (NAK) signals)
`and reset and re-con?gure the USB device. The ?rst method
`defeats the Whole purpose of plug-and-play technology, and
`
`20
`
`25
`
`30
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`SUMMARY OF THE INVENTION
`
`Accordingly, one object of the present invention is to
`provide a method and apparatus for recovering from a USB
`device broWn out condition Which requires no user inter
`vention.
`Another object of the present invention is to provide a
`method and apparatus for recovering from a USB device
`broWn out condition Which is independent from a USB host
`computer operating system.
`It is another object of the present invention to provide a
`method and apparatus Wherein no additional USB host
`computer operating system overhead is required to keep
`track of and recover from a USB device broWn out condi
`tion.
`It is also an object of the present invention to provide a
`method and apparatus for recovering from a USB device
`broWn out condition Without a need to re-boot the USB
`device or physically disconnect and then re-connect the USB
`device.
`It is a further object of the present invention to provide a
`method and apparatus for recovering from a USB device
`broWn out condition Which requires minimum additional
`hardWare and ?rmWare overhead.
`The above and other objects are achieved according to the
`present invention by a providing a method for determining
`and recovering from a processor busy condition, including
`incrementing a counter if a variable indicative of the pro
`cessor busy condition is set, determining if the counter has
`reached a predetermined count, and disconnecting at least
`one of a plurality of data lines of the processor from a bus
`coupled to the data lines for a predetermined amount of time
`if the counter has reached the predetermined count.
`According to a second aspect of the present invention,
`there is provided a device for determining and recovering
`from a processor busy condition, including a means for
`storing a variable indicative of Whether or not the processor
`is in the busy condition; a means for incrementing a counter
`if the variable indicative of the processor busy condition is
`set; a means for determining if the counter has reached a
`predetermined count; and a means for disconnecting at least
`one of a plurality of data lines of the processor from a bus
`coupled to the data lines for a predetermined amount of time
`if the counter has reached the predetermined count.
`According to a third aspect of the present invention, there
`is provided an apparatus for determining and recovering
`from a processor busy condition, including a memory
`coupled to the processor con?gured to store a variable
`indicative of Whether or not the processor is in the busy
`condition; a counter; and one or more devices con?gured to:
`(a) increment the counter if the variable indicative of the
`processor busy condition is set, (b) determine if the counter
`has reached a predetermined count, and (c) disconnect at
`least one of a plurality of data lines of the processor from a
`bus coupled to the data lines for a predetermined amount of
`time if the counter has reached the predetermined count.
`According to a fourth aspect of the present invention,
`there is provided a computer program product, including a
`computer storage medium and a computer program code
`mechanism embedded in the computer storage medium for
`causing a computer to determine and recover from a pro
`cessor busy condition. The computer program code mecha
`
`BLACKBERRY Ex. 1002, page 9
`
`

`

`6,073,193
`
`3
`nism includes a ?rst computer code segment con?gured to
`store a variable indicative of Whether or not the processor is
`in the busy condition; a second computer code segment
`con?gured to determine if the variable indicative of the
`processor busy condition is set; a third computer code
`segment con?gured to increment a counter if the variable
`indicative of the processor busy condition is set; a fourth
`computer code segment con?gured to determine if the
`counter has reached a predetermined count; and a ?fth
`computer code segment con?gured to disconnect at least one
`of a plurality of data lines of the processor from a bus
`coupled to the data lines for a predetermined amount of time
`if the counter has reached the predetermined count.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`A more complete appreciation of the invention and many
`of the attendant advantages thereof Will be readily obtained
`as the same becomes better understood by reference to the
`folloWing detailed descriptions When considered in connec
`tion With the accompanying draWings, Wherein:
`FIG. 1 is a block diagram illustrating a USB system
`con?guration;
`FIG. 2. is a block diagram illustrating a USB fail safe
`con?guration in the system con?guration of FIG. 1, accord
`ing to a ?rst embodiment of the present invention;
`FIG. 3. is a block diagram illustrating a USB fail safe
`con?guration in the system con?guration of FIG. 1, accord
`ing to a second embodiment of the present invention;
`FIG. 4. is a block diagram illustrating details of a USB
`micro-controller of the system con?guration of FIG. 1;
`FIG. 5. is a block diagram illustrating details of a USB fail
`safe ?rmware and hardware con?guration in the USB micro
`controller of FIG. 4, according to the present invention;
`FIG. 6a. is a state diagram illustrating details of a USB
`fail safe con?guration in the USB micro-controller of FIG.
`5, according to the present invention; and
`FIG. 6b. is a How chart illustrating details of a USB fail
`safe con?guration, according to the present invention.
`
`DESCRIPTION OF THE PREFERRED
`EMBODIMENTS
`
`Referring noW to the draWings, Wherein like reference
`numerals designate identical or corresponding parts
`throughout the several vieWs, and more particularly to FIG.
`1 thereof, there is illustrated a USB system including a USB
`host computer 2, and a USB device 10, according to the
`present invention.
`In FIG. 1, the USB device 10 includes a USB connector
`4 and a USB micro-controller 6, such as a Cypress Semi
`conductor CY7C6300, etc. The USB device 10 is coupled
`via signal lines 8a to USB peripheral logic 8, such as logic
`for a plug-and-play CD-ROM, tape or ?oppy disk drive,
`scanner, printer, keyboard, joystick, mouse, telephone,
`modem, etc. The USB host computer 2 is coupled to the
`USB device 10 via signal lines 2a and the USB micro
`controller 6 communicates With the USB host computer 2
`via signal lines 2a and the USB connector 4.
`In FIG. 2, a ?rst embodiment of the USB device 10 of
`FIG. 1 further includes sWitching devices S+ and S—, such
`as transistors, contact sWitches, etc., coupled to positive data
`(D+) and negative data (D—) lines of the signal lines 6a.
`Please note that only one pair of complementary data lines
`of a plurality of complementary data lines and VCC and
`GND connections are shoWn in FIG. 2 for simplicity. An
`enable line (or gate in the case of a transistor) of each of the
`
`4
`sWitching devices S+ and S— is coupled to, for eXample, an
`unused general purpose I/O pin of the USB micro-controller
`6. Accordingly, When the USB micro-controller 6 drives the
`I/O pin to an appropriate logic state, the D+ and D— data
`lines may be opened or shorted via sWitching devices S+ and
`S—. By disconnecting the D+ and D— data lines via sWitching
`devices S+ and S—, a physical removal of the USB device 10
`may be simulated in order to alloW the USB host to
`re-con?gure the USB device 10 during a broWn out condi
`tion. In addition, the general purpose I/O pin of the USB
`micro-controller 6 is con?gured such that during and after a
`reset condition due to poWer up the data lines stay connected
`(e.g., the I/O pin enables sWitching devices S+ and S
`during and after reset). FirmWare in the USB micro
`controller 6 keeps the data lines connected via sWitching
`devices S+ and S— during normal operation. HoWever, When
`a broWn out condition is detected, as Will be described later,
`the USB micro-controller 6 opens the data lines via the
`sWitching devices S+ and S— for a duration greater than 2.5
`micro-seconds and then reconnects them again. This
`procedure, for example, emulates the disconnect and
`re-connect procedure as speci?ed in the USB speci?cation
`v1.0, page 116.
`FIG. 3, is a second embodiment of the USB device 10
`Wherein the sWitching devices S+ and S—, of FIG. 2 are
`included Within the USB micro-controller 6. In this Way, use
`of the general purpose I/O pin of the USB micro-controller
`6 is not required. The sWitching devices S+ and S— are
`coupled to positive (D+) and negative (D—) data lines of the
`signal lines 6a and an enable line (or gate in the case of a
`transistor) of each of the sWitching devices S+ and S— is
`enabled via an internal enable signal ENB of the USB
`micro-controller 6. The internal ENB signal may be
`implemented, for eXample, by using a bit from an internal
`register of internal logic (not shoWn) of the USB micro
`controller 6 as an enable signal. OtherWise, the operation of
`the circuit of FIG. 3 is identical to the operation of the circuit
`of FIG. 2.
`In FIG. 4, further details of the USB micro-controller 6 of
`FIGS. 1—3 are shoWn. The USB micro-controller 6 includes
`a memory 6b internal to the USB micro-controller 6, and/or
`a memory 6b‘ external to the USB micro-controller 6. The
`memory 6b is used for storing program information,
`variables, and/or for implementing ?rmWare logic functions
`such as counters, state machines, etc. and may be imple
`mented by means of a ROM, RAM, EEPROM, etc., or a
`combination of such memory devices.
`In FIG. 5, further details of the USB micro-controller 6 of
`FIG. 4 are shoWn. The USB micro-controller 6 includes, for
`eXample, register 6c (e.g., NAKitoiOut bit in the USB
`control register of the CY7C6300) for storing a non
`acknoWledge (NAK) bit, register 6d (e.g., Out bit in the USB
`Endpoint 0 RX register of the CY7C6300) for storing a
`packet received bit, and internal logic 6h for performing
`other logic functions. The NAK bit is set by the internal
`logic 6h of the USB micro-controller 6 When the USB
`micro-controller 6 is busy and cannot receive a data packet
`from the USB host computer, and the packet received bit is
`set by the internal logic 6h of the USB micro-controller 6
`When the USB micro-controller has successfully received a
`data packet from the USB host computer. The memory 6b
`includes, for eXample, memory locations for storing toggle
`variable 66, count variable 6f, and ?rmWare 6g. The toggle
`variable 66, and the count variable 6f (e.g., implemented as
`a data structure in the memory 6b) are set and cleared by the
`?rmWare 6g running in the memory 6b. The ?rmWare 6g Will
`only clear the toggle variable 66 after the NAK bit 6c is
`
`10
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`15
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`
`45
`
`55
`
`65
`
`BLACKBERRY Ex. 1002, page 10
`
`

`

`6,073,193
`
`5
`cleared and the packet received bit 6a' is set by, for example,
`the internal logic 6h of the USB micro-controller 6 (e.g.,
`indicating that a packet has been received by the USB
`micro-controller 6). The count variable 6g is used to imple
`ment a counter function and is cleared and incremented by
`the ?rmware 6g.
`FIGS. 6a and 6b are explained With reference to FIGS. 2,
`3 and 5 to describe a method of detecting and recovering
`from a broWn out condition according to the present inven
`tion. In the state diagram of FIG. 6a (e.g., implemented as
`a state machine running in memory 6b), after the USB
`micro-controller device 6 receives a reset signal at step 12
`(e.g., due to poWer up, re-boot etc.), the logic ?oWs to state
`Sl Where the toggle variable 66 and the count variable 6f are
`cleared by the ?rmWare 6g. When the NAK bit 6c is set by
`the internal logic 6h of the USB micro-controller 6 (e.g.,
`during a busy condition indicating that no data packets can
`be received), at step 14 the logic ?oWs to state S2 Where the
`toggle variable 66 is set by the ?rmWare 6g. When the
`internal logic 6h of the USB micro-controller 6 clears the
`NAK bit (e.g., because data packets can be received) and
`sets the packet received bit 6d (e.g., indicating that a data
`packet has been received) at step 16, the logic returns to state
`S1. In this Way, the toggle variable 66 is, for example, used
`by the ?rmWare 6g as an indicator of a busy condition (i.e.,
`NAK bit is set) and for detecting and recovering from a
`broWn out condition as Will be explained With reference to
`the How chart of FIG. 6b (e.g., implemented as ?rmWare 6g
`in memory 6b).
`In the How chart of FIG. 6b, after the USB micro
`controller 6 is reset, the logic ?oWs to step 100 Where an
`interrupt routine, for example Which is executed every 1
`millisecond, is initiated (i.e., X=1 millisecond) Which per
`form steps 200 through 500. At step 200, it is determined
`Whether the toggle variable 66 has been set (i.e., by the state
`machine of FIG. 6a). If the toggle variable 66 has been set
`(e.g, during a busy condition), then logic ?oWs to step 300,
`and if the toggle variable 66 has not been set (e.g., during a
`non-busy condition), logic ?oWs to step 600 Where the
`interrupt routine is ended and a return to normal processing
`occurs until the next 1 millisecond interrupt routine is
`executed.
`At step 300, the counter is incremented (e.g., the count
`variable 6f is incremented by one) and then at step 400 it is
`determined Whether the counter is at a predetermined value
`Y of, for example, three (e.g., the count variable 6f is equal
`to three, Y=3). If the counter has reached the predetermined
`value, step 500 is performed, and if the counter has not
`reached the predetermined value, logic ?oWs to step 600
`Where the interrupt routine is ended and a return to normal
`processing occurs until the next 1 millisecond interrupt
`routine is executed.
`At step 500, it is determined that a broWn out condition
`has occurred since the counter has reached the predeter
`mined count (i.e, the USB micro-controller has been busy
`for 3 milliseconds) and (1) the I/O pin (or ENB line) is
`cleared, for example, for at least 2.5 microseconds (e.g.,
`Z=2.5 microseconds), disconnecting the data lines of the
`USB micro-controller, then (2) the I/O pin is set,
`re-connecting the data lines of the USB micro-controller,
`and then logic ?oWs to step 600 Where the interrupt routine
`is ended and a return to normal processing occurs until the
`next 1 millisecond interrupt routine is executed. In this Way,
`When broWn out occurs (i.e., the USB micro-controller has
`been busy for 3 milliseconds), the data lines of the USB
`micro-controller 6 are opened via the sWitching devices S+
`and S— for a duration greater than 2.5 micro-seconds and
`
`10
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`15
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`25
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`35
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`45
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`55
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`65
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`6
`re-connected again. This procedure, for example, emulates
`the disconnect and re-connect procedure as speci?ed in the
`USB speci?cation v1.0, page 116, as previously discussed.
`Although in the preferred embodiment the USB fail safe
`device is described in terms of a USB micro-controller and
`sWitching devices S+ and S—, this invention may be imple
`mented using a conventional general purpose digital com
`puter or microprocessor programmed according to the teach
`ings of the present speci?cation, as Will be apparent to those
`skilled in the computer art. Appropriate softWare coding can
`readily be prepared by skilled programmers based on the
`teachings of the present disclosure, as Will be apparent to
`those skilled in the softWare art. The invention may also be
`implemented by the preparation of application speci?c inte
`grated circuits or by interconnecting an appropriate netWork
`of conventional component circuits, as Will be readily appar
`ent to those skilled in the art.
`Although the preferred embodiment of the USB fail safe
`device is described in terms of a USB speci?cation, the
`present invention could be adapted for other speci?cations
`such as Nubus, PCI, VESA, etc. by simply modifying the
`USB device 10 logic, as Will be apparent to those skilled in
`the art.
`Although the preferred embodiment of the USB fail safe
`device is described in terms of executing the interrupt
`routine every millisecond (i.e., X=1 at step 100 of FIG. 6b),
`detecting a broWn condition When the USB micro-controller
`6 is busy for 3 milliseconds (i.e., Y=3 at step 400 FIG. 6b),
`and disconnecting the data lines of the USB micro-controller
`6 for 2.5 microseconds (i.e., Z=2.5 at step 500 of FIG. 6b),
`other values of X, Y and Z could be used to detect the broWn
`condition, as Will be apparent to those skilled in the art.
`The present invention includes a computer program prod
`uct (?rmWare 6g and the state machine of FIG. 6a) Which
`may be on a storage medium including instructions Which
`can be used to program memory 6 to perform a process of
`the invention. The storage medium can include, but is not
`limited to, any type of disk including ?oppy disks, optical
`discs, CD-ROMs, and magneto-optical disks, ROMs,
`RAMs, EPROMS, EEPROMS, magnetic or optical cards, or
`any type of media suitable for storing electronic instructions.
`Obviously, numerous modi?cations and variations of each
`embodiment of the present invention are possible in light of
`the above teachings. It is therefore to be understood that
`Within the scope of the appended claims, the invention may
`be practiced otherWise than as speci?cally described herein.
`What is claimed as neW and desired to be secured by
`Letters Patent of the United States is:
`1. A method for determining and recovering from a
`processor busy condition, comprising the steps of:
`incrementing a counter if a variable indicative of the
`processor busy condition is set;
`determining if the counter has reached a predetermined
`count; and
`disconnecting at least one of a plurality of data lines of the
`processor from a bus coupled to the data lines for a
`predetermined amount of time if the counter has
`reached the predetermined count.
`2. The method of claim 1, Wherein the incrementing step
`further comprises:
`determining if the variable indicative of the processor
`busy condition is set.
`3. The method of claim 1, Wherein the disconnecting step
`comprises:
`disconnecting the at least one of a plurality of data lines
`for at least 2.5 microseconds.
`
`BLACKBERRY Ex. 1002, page 11
`
`

`

`6,073,193
`
`7
`4. A device for determining and recovering from a pro
`cessor busy condition, comprising:
`a ?rst circuit con?gured to increment a counter if a
`variable indicative of a processor busy condition is set;
`a second circuit con?gured to determine if the counter has
`reached a predetermined count; and
`a third circuit con?gured to disconnect at least one of a
`plurality of data lines of the processor from a bus
`coupled to the data lines for a predetermined time if the
`counter has reached the predetermined count.
`5. The device of claim 4, Wherein the predetermined time
`is at least 2.5 microseconds.
`6. The method according to claim 1, further comprising
`the step of:
`repeating the determining step and, if the counter has not
`reached the predetermined count again, reconnecting
`said disconnected data lines.
`7. The method according to claim 4, Wherein said device
`determines if said counter has reached the predetermined
`count again and, reconnects said disconnected data lines if
`said counter has not reached the predetermined count again.
`8. The device of claim 4, Wherein the processor comprises
`a universal serial bus (USB) micro-controller and the bus
`comprises a USB bus.
`9. An apparatus for determining and recovering from a
`processor busy condition, comprising:
`a memory coupled to the processor con?gured to store a
`variable indicative of Whether or not the processor is in
`the busy condition;
`a counter; and
`one or more devices con?gured to:
`(a) increment the counter if the variable indicative of
`the processor busy condition is set,
`(b) determine if the counter has reached a predeter
`mined count, and
`(c) disconnect at least one of a plurality of data lines of
`the processor from a bus coupled to the data lines for
`a predetermined amount of time if the counter has
`reached the predetermined count.
`10. The apparatus of claim 9, Wherein the one or more
`devices are further con?gured to determine if the variable
`indicative of the processor busy condition is set.
`11. The apparatus of claim 9, Wherein the predetermined
`time is at least 2.5 microseconds.
`
`15
`
`35
`
`8
`12. The apparatus of claim 9, further comprising:
`a sWitch betWeen each of the plurality of data lines and
`each corresponding data line of the bus, and Wherein
`the sWitch is disconnected by the one or more devices.
`13. The apparatus of claim 9, Wherein the processor is a
`universal serial bus (USB) micro-controller and the bus is a
`USB bus.
`14. The apparatus of claim 12, Wherein the sWitch com
`prises a transistor having a gate coupled to a general purpose
`I/O pin of the processor con?gured to be controlled by the
`one or more devices.
`15. The device of claim 12, Wherein the sWitch comprises
`a transistor having a gate con?gured to be controlled by the
`one or more devices.
`16. The device of claim 10, Wherein any one of the
`counter, and the one or more devices are implemented via
`?rmWare running in the memory.
`17. The device of claim 9, Wherein the memory is internal
`or eXternal to the processor.
`18. The apparatus according to claim 9, further compris
`ing determining if the counter has reached the predetermined
`count again and, if the counter has not reached the prede
`termined count again, reconnecting said disconnected data
`lines.
`19. An electronically readable set of instructions execut
`able by a processor, comprising:
`determining Whether the processor is in a busy condition;
`incrementing a counter if the processor is in said busy
`condition;
`determining Whether the counter has reached a predeter
`mined count; and
`disconnecting at least one of a plurality of data lines of the
`processor from a bus coupled to the data lines for a
`predetermined amount of time if the counter reaches
`the predetermined count.
`20. The method according to claim 19, further comprising
`the step of:
`repeating the determining step and, if the counter has not
`reached the predetermined count again, reconnecting
`said disconnected data lines.
`
`BLACKBERRY Ex. 1002, page 12
`
`