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`Inter Partes Review of U.S. 5,652,084
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`UNITED STATES PATENT AND TRADEMARK OFFICE
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`SAMSUNG ELECTRONICS CO., LTD
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`Petitioner
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`v.
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`DSS TECHNOLOGY MANAGEMENT, INC.
`Patent Owner
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`
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`U.S. Patent No. 5,652,084
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`Title: METHOD FOR REDUCED PITCH LITHOGRAPHY
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`Inter Partes Review No. IPR2014-__________
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`
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`DECLARATION OF BRUCE SMITH, Ph.D.
`UNDER 37 C.F.R. § 1.68
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`
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`I, Bruce Smith, do hereby declare:
`INTRODUCTION
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`I.
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`1.
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`I am making this declaration at the request of Samsung Electronics
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`Co., Ltd. in the matter of the Inter Partes Review of U.S. Patent No 5,652,084
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`(“the 084 Patent”) to James M. Cleeves.
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`2.
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`In the preparation of this declaration, I have reviewed the following:
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`SAMSUNG-1011.001
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`(a) The 084 Patent (Samsung-1001);
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`(b) The prosecution history of the 084 Patent (Samsung-1002);
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`(c) IBM Technical Disclosure, volume 32, number 8A (January
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`1990) (Disclosure 1) (Samsung-1003)
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`(d) U.S. Patent No. 5,710,061 (the “061 Patent”) (Samsung-1004);
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`(e) Certified translation of Japanese Patent App. No. 04-71222
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`(“Jinbo”) (Samsung-1005);
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`(f) U.S. Patent No. 5,667,940 (“Hsue”) (Samsung-1006);
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`(g) U.S. Patent No. 4,931,351 (“McColgin”) (Samsung-1007);
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`(h) U.S. Patent No. 4,548,688 (“Matthews”) (Samsung-1008); and
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`(i) U.S. Patent No. 5,158,910 (“Cooper”) (Samsung-1009).
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`(j) W.H.-L. Ma., Plasma Resist Image Stabilization Technique
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`(PRIST), IEEE Electron Devices Meeting, 1980 International,
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`vol. 26, pp. 574-75, 1980 (Samsung-1010).
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`3.
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`Additionally, I have reviewed the Petition for Inter Partes Review of
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`the 084 Patent filed by TSMC, and the Declaration of Richard Blanchard. To avoid
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`unnecessary complexity, certain parts of this declaration are substantially similar to
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`Dr. Blanchard’s declaration. In certain instances, I note where Dr. Blanchard and I
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`have reached the same or similar conclusions.
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`4.
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`In forming the opinions expressed below, I have considered:
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`2
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`SAMSUNG-1011.002
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`(a) The documents listed above, and
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`(b) My knowledge and experience based upon my work in this area
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`as described below.
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`5.
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`The application that led to the issuance of the 084 Patent was a
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`continuation of an application filed on December 22, 1994. I am familiar with the
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`technology at issue and am aware of the state of the art around this time. Based on
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`the technologies disclosed in the 084 Patent, I agree with Dr. Blanchard’s opinion
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`that a person of ordinary skill in the art (“POSITA”) would include someone who
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`has a B.S. degree in Electrical Engineering, Material Science, or Physics, or
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`equivalent training, as well as 3-5 years of experience in the field of integrated
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`circuit (IC) fabrication1 and lithographic fabrication techniques. In addition, a
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`POSITA would also include someone who has an M.A. degree in any of these
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`disciplines as well as 1-3 years experience in this field. My analyses and opinions
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`below are given from the perspective of POSITA in these technologies in this
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`timeframe, unless stated otherwise.
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`1 Note that Dr. Blanchard’s opinion also includes the field of “integrated circuit
`(IC) design.” I believe the subject matter of the 084 Patent is more closely related
`to the field of IC fabrication and, more specifically, lithographic fabrication
`techniques.
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`3
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`SAMSUNG-1011.003
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`II. QUALIFICATIONS AND COMPENSATION
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`6.
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`I am currently the Director of the Microsystems Engineering Ph.D
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`Program at Rochester Institute of Technology (“RIT”). I am also Director of RIT’s
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`Center for Nanolithography Research, and President of Lithographic Technology
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`Corp/Amphibian Systems. In addition, I have co-authored a leading text on optical
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`lithography, the relevant field of technology for the 084 patent.2
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`7.
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`I began working with the relevant technology in the commercial
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`industry in 1983, when I worked at Gould AMI Semiconductor in the Process
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`Development Group. I moved to Digital Equipment Corp. in 1986. I became a
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`professor in RIT’s Microelectronic Engineering Department of the Kate Gleason
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`College of Engineering in 1988. I have taught at RIT up to and including the
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`present.
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`8. While teaching at RIT, I became Intel Professor of Research and
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`Technology from 2000-2007. From 2001 until 2004, I served as Associate Dean of
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`Graduate Programs for the Kate Gleason College of Engineering. In 2008, I
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`became Director of the Microsystems Engineering Ph.D Program.
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`2 See Microlithography: Science and Technology, 2nd Edition, K. Suzuki and B.W.
`Smith, ed., CRC Press, Taylor and Francis: New York, 2007.
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`4
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`SAMSUNG-1011.004
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`9.
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`During my tenure in academia, I have continued to be involved in the
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`industrial side of photolithographic technology. Since 1998, I have been President
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`of Lithographic Technology Corp/Amphibian Systems.
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`10.
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`I have written about and studied the photolithography field
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`extensively for decades. I have a Ph.D. in Imaging Science. I have published over
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`100 articles relating to this field. I also am a named inventor on dozens of patents
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`in the photolithography field. A copy of my curriculum vitae is attached as
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`Samsung-1012, which includes additional information regarding my education,
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`publications, and patents.
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`11. Additionally, I have been asked to present on optical lithography at
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`conferences and symposiums around the world. I have continually given
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`presentations on this technology every year since joining RIT in 1988.
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`12.
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`I have received numerous awards for my work in this field, including
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`being named a Fellow at SPIE, a professional organization for photo-optical
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`engineers dating back to 1955 under the original name Society of Photographic
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`Instrumentation Engineers. I am also a Fellow of the Optical Society of America.
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`My curriculum vitae includes additional information regarding my awards and
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`professional memberships. See Samsung-1012.
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`13.
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`I am being compensated at a rate of $475.00 per hour, with
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`reimbursement for actual expenses for my work related to this matter. My
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`SAMSUNG-1011.005
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`compensation is not dependent on the substance of my statements in this
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`Declaration.
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`III. RELEVANT LEGAL STANDARDS
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`14.
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`I have been asked to provide my opinions regarding whether the
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`claims of the 084 Patent are anticipated or rendered obvious by the prior art.
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`15.
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`It is my understanding that in order for prior art to anticipate a claim
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`under 35 U.S.C. § 102, the reference must disclose every element of the claim.
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`16.
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`It is my understanding that a claimed invention is unpatentable under
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`35 U.S.C. § 103 if the differences between the invention and the prior art are such
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`that the subject matter as a whole would have been obvious at the time the
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`invention was made to a POSITA. I also understand that the obviousness analysis
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`takes into account factual inquiries including the level of ordinary skill in the art,
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`the scope and content of the prior art, the differences between the prior art and the
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`claimed subject matter, and any secondary considerations which may suggest the
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`claimed invention was not obvious.
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`17.
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`I have been informed that the Supreme Court has recognized several
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`rationales for combining references or modifying a reference to show obviousness
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`of claimed subject matter. I understand some of these rationales include the
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`following: combining prior art elements according to known methods to yield
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`predictable results; simple substitution of one known element for another to obtain
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`SAMSUNG-1011.006
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`predictable results; use of a known technique to improve a similar device (method,
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`or product) in the same way; applying a known technique to a known device
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`(method, or product) ready for improvement to yield predictable results; choosing
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`from a finite number of identified, predictable solutions, with a reasonable
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`expectation of success; and some teaching, suggestion, or motivation in the prior
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`art that would have led a POSITA to modify the prior art reference or to combine
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`prior art reference teachings to arrive at the claimed invention.
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`IV. THE 084 PATENT
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`A. Background of the Technology
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`18. When manufacturing semiconductor integrated circuits, it is highly
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`desirable to have features that are spaced as closely as possible so that the space
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`utilized in the integrated circuit is maximized. The method for creating such
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`semiconductor integrated circuit features is through a process called
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`photolithography.
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`19. Using photolithography, the first step in creating features in a
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`semiconductor layer is covering the semiconductor layer with a material called
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`photoresist. Photoresist is a material with physical properties that are sensitive to
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`light (i.e., radiation). Numerous chemical compounds are available as photoresist,
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`which are generally formed into two categories: positive and negative. When
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`positive photoresist is exposed to radiation, the exposed portions become soluble to
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`SAMSUNG-1011.007
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`a developer. Negative resist, on the other hand, is soluble to a developer unless it is
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`exposed to radiation (in which case it remains intact).
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`20. When a semiconductor integrated circuit is manufactured, photoresist
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`is overlaid on the semiconductor wafer. Then, this photoresist is exposed to
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`radiation through a “mask,” which is a pattern of clear and opaque features. In the
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`case of a positive photoresist, after exposure to radiation through the mask, a
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`developer is used to dissolve the exposed portions of the photoresist. In the case of
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`a negative photoresist, a developer is used to dissolve the portions of photoresist
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`that were not exposed to radiation. In either case, the result is a layer of patterned
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`photoresist overlying the semiconductor layer. The patterned photoresist can be
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`used to create features in the semiconductor material below it through a procedure
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`called chemical or plasma etching.
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`21. Up until this point, I have discussed a traditional method of creating a
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`pattern of features in a semiconductor layer, which is depositing photoresist over
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`the layer, exposing the photoresist to radiation through a mask, developing and
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`dissolving the photoresist to form a pattern, and subsequently using the patterned
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`photoresist to etch features in the underlying layer. Note that this process only
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`involves a single exposure of the photoresist to radiation prior to etching. This
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`traditional method has an inherent optical limitation in how small it can make
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`features in the photoresist. Specifically, because photolithography uses beams of
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`SAMSUNG-1011.008
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`light, the smallest possible space between two features is limited by the wavelength
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`of radiation that the photoresist was exposed to and the capability of the projection
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`optics. The separation between features is called the pitch, usually 100 nm or more.
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`22. One way to improve feature density in this single exposure method is
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`to reduce the wavelength of the radiation. Another way is to use larger optics.
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`However, as there is a practical limit below which the wavelength of radiation
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`cannot be reduced and optics cannot be made larger, it became necessary to turn to
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`alternative techniques for minimizing feature pitch.
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`23. One such technique introduced in the late 1980s and early 1990s was
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`called double patterning. In double patterning, a first photoresist pattern is formed
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`and then frozen (i.e., stabilized3). Subsequently, a second pattern of photoresist is
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`formed between the features of the first pattern. The features of the second pattern
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`could be formed closer together than the optical limits of the lithography system.
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`Thus, this allowed formation of features in the underlying semiconductor layer to
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`be smaller than would have been possible with a single exposure.
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`24. Another technique that can be used is caller litho-etch litho-etch
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`(“LELE”). According to LELE, a first photoresist layer is formed, patterned, and
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`developed. Subsequently, the photoresist pattern is used to etch the underlying
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`3 Specific techniques for stabilizing photoresist that were known in the art at the
`time of the 084 Patent priority date are discussed in more detail below.
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`SAMSUNG-1011.009
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`semiconductor layer. Another layer of photoresist is then deposited, patterned, and
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`developed. The second patterned layer of photoresist is then used to further etch
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`the underlying semiconductor layer. This also allowed the formation of smaller
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`features in the underlying semiconductor layer because the features of the
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`photoresist in the first and second patterned layers are formed more closely than
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`the wavelength of light would allow through a single exposure to radiation.
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`However, LELE does not require stabilization of the first patterned layer as it
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`would be removed completely before depositing the second layer of photoresist.
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`Generally speaking, LELE is a less expensive process than the double patterning
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`technique described above and is more prevalent in modern-day semiconductor
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`fabrication.
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`B. The Claimed Invention
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`25. The 084 Patent recognizes that the lithography process often “limit[s]
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`the size and density with which semiconductor devices may be fabricated.”
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`Samsung-1001 at 1:28-30. To that end, the 084 Patent is directed toward a
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`“lithographic patterning process us[ing] multiple exposures to provide for
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`relatively reduced pitch for features of a single patterned layer.” Id. at Abstract.
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`26. The 084 Patent describes a first set of features being formed by
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`exposing and patterning a first photoresist. See id. at 3:54-55 (“[A] positive-tone
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`imaging material is used for imaging layer 220, such as a suitable positive
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`SAMSUNG-1011.010
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`photoresist.”); Id. at 3:65-66 (“Imaging layer 220 may be exposed through the first
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`mask using any suitable form of radiation.”); Id. at 4:5-9 (“Imaging layer 220 may
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`then be developed in a suitable developer to form a first patterned layer 232. As
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`illustrated in FIG. 3, that portion of imaging layer 220 exposed to radiation through
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`the first mask is soluble in the developer and is thus dissolved from imaging layer
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`220.”). See also FIGS. 2 and 3.
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`SAMSUNG-1011.011
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`27. The first photoresist is “stabilized to withstand subsequent
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`lithographic processing steps.” Id. at 4:30-5:55. A second photoresist is formed
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`over the first set of features for subsequent patterning: “[w]here a positive-tone
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`imaging material is used for imaging layer 240, such as a suitable positive
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`photoresist …, imaging layer 240 may be exposed to radiation through a second
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`mask.” Id. at 6:17-21. The second photoresist layer 240 being patterned through
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`the second mask is shown in Figure 4, below:
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`28. Following exposure, the second photoresist is dissolved to form a
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`second set of features. Id. at 6:53-56 (“As illustrated in FIG. 5, that portion of
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`imaging layer 240 exposed to radiation through the second mask is soluble in the
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`developer and is thus dissolved from imaging layer 240.”); Id. at 12:29-35
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`(“[F]eatures … illustrated in FIG[. 5], may be formed relatively closer to one
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`another as the resolution of the lens for the lithographic patterning of an imaging
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`SAMSUNG-1011.012
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`layer through a single exposure to radiation does not limit the pitch for adjacent
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`features.”). FIG. 5 depicts the features of the second patterned layer (251 and 253)
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`as adjacent to and spatially separated on the x axis from the first set.
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`29. Exposed portions of the underlying layers can then be selectively
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`processed. Because adjacent photoresist features are formed through two exposures
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`to radiation, the spacing between the photoresist features may be reduced. This in
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`turn allows for increased density of features in the underlying layer of
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`semiconductor material when it is etched. Alternatively, the patterned features may
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`be used as disposable plugs, discussed below.
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`30. As discussed above, this practice—often referred to as double
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`patterning—was well-known in the art prior to the date of the 084 Patent.
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`V. MEANING OF CERTAIN TERMS OF THE 084 PATENT
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`31.
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`It is my understanding that in order to evaluate the 084 Patent, the
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`terms of the claims must be defined. For a non-expired patent, it is my
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`SAMSUNG-1011.013
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`understanding that a claim subject to an IPR is interpreted in a manner that is
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`consistent with the broadest reasonable interpretation in light of the specification.
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`This means that the words of the claim are given their plain meaning unless that
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`meaning is inconsistent with the specification. For expired patents, unless the
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`patentee has acted as her own lexicographer, the claims are to be interpreted
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`according to their ordinary and accustomed meaning as would be understood by a
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`POSITA in light of the intrinsic evidence (the claims, specification, and
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`prosecution history) and, if necessary, the extrinsic evidence. Accordingly, I have
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`provided a definition for each of the claim terms below as they would have been
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`understood by a POSITA.
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`A. “imaging layer”
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`32. The 084 Patent uses the term “imaging layer” in the claims, abstract,
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`and detailed description. The specification of the 084 Patent explains that an
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`imaging layer may include “a suitable positive photoresist,” “a suitable negative
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`photoresist,” “a suitable radiation-sensitive polyimide,” or “other suitable
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`radiation-sensitive materials.” Samsung-1001, 084 Patent at 3:34-42. Thus, my
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`understanding of this term as a POSITA is consistent with Dr. Blanchard's opinion
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`that the term “imaging layer” means a photoresist or other radiation-sensitive
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`material. Further, this construction is consistent with both the standard for a non-
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`expired patent and the standard for an expired patent.
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`SAMSUNG-1011.014
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`B. “stabilizing”
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`33. The 084 Patent refers to “stabilizing” the patterned imaging layer.
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`According to the specification, a patterned layer is “stabilized to withstand
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`subsequent lithographic steps.” Id. at 4:34-35. Exemplary subsequent lithographic
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`steps described in the 084 Patent include “subsequent exposure to radiation,”
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`“dissolution by solvents,” or “dissolution by a subsequent developer.” Id. at 4:35-
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`42. My understanding of this term as a POSITA is consistent with Dr. Blanchard's
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`opinion that the term “stabilizing” means performing a process that renders a
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`material able to withstand subsequent processing steps, such as exposure to
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`radiation, exposure to a solvent, or exposure to a developer. Further, this
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`construction is consistent with both the standard for a non-expired patent and the
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`standard for an expired patent.
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`C. “single patterned layer”
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`34. The 084 Patent claims recite that “the second patterned layer and the
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`first patterned layer form a single patterned layer.” As described in Dr. Blanchard’s
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`declaration, the specification shows that the single patterned layer includes features
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`of the first patterned layer positioned between features of the second patterned
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`layer. Id. at FIG. 5, below:
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`SAMSUNG-1011.015
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`Smith Decl.
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`35. Thus, my understanding of this term as a POSITA is consistent with
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`Dr. Blanchard's opinion that the term “single patterned layer” means a single layer
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`of patterned features, which may be formed from one or more imaging layers.
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`Further, this construction is consistent with both the standard for a non-expired
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`patent and the standard for an expired patent.
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`D. “disposable post”
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`36. The 084 Patent refers to using a photoresist feature as a “disposable
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`post.” According to the 084 Patent, “disposable posts are removed to form
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`openings for a subsequent layer, such as a contact, via, or interconnect layer for
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`example.” Id. at 12:53-62. The 084 Patent refers to U.S. Application No.
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`08/179,615 for more details. U.S. Application No. 08/179,615 became (through a
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`continuation) U.S. Patent No. 5,710,061 (“the 061 Patent”), which provides an
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`example where “photosensitive material 220 has been patterned to form post 221
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`over diffusion region 201 so as to later form a contact opening in an insulative
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`SAMSUNG-1011.016
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`Smith Decl.
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`layer to be formed over the surface of the wafer.” Samsung-1004, 061 Patent at
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`5:39-42, FIG. 2C, below:
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`37. Thus, my understanding of a “disposable post” as a POSITA is a
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`patterned feature that may be surrounded by another layer of material, and that
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`may be removed to define an opening such as a contact, via, or interconnect
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`layer opening. Although worded slightly differently, this construction is consistent
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`with Dr. Blanchard’s opinion. Further, this construction is consistent with both the
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`standard for a non-expired patent and the standard for an expired patent.
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`E. “PRIST”
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`38. The 084 Patent specification suggests that the “first patterned layer
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`232 may be stabilized using other suitable techniques. As one example, a pirst [sic:
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`PRIST] technique may be used to form a carbon fluorine (CF4) skin over first
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`patterned layer 232 by exposing the photoresist to a fluorine ambient.” Samsung-
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`1001, 084 Patent at 4:66-5:3. A Plasma Resist Image Stabilization Technique (or
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`PRIST) was a well-known technique for stabilizing photoresist in use since at least
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`the early 1980s. See, e.g., Samsung-1010, W.H.-L. Ma., Plasma Resist Image
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`SAMSUNG-1011.017
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`Stabilization Technique (PRIST), IEEE Electron Devices Meeting, 1980
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`International, vol. 26, pp. 574-75, 1980. An exemplary PRIST technique involves
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`exposing photoresist to a fluorine plasma reactor in a high vacuum chamber. Thus,
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`a POSITA would understand the term PRIST to mean a Plasma Resist Image
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`Stabilization Technique, including techniques such as the fluorine plasma
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`stabilization described in the 084 Patent. Further, this construction is consistent
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`with both the standard for a non-expired patent and the standard for an expired
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`patent.
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`F. “second feature distinct from the first feature”
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`39. Claim 1 of the 084 Patent requires that the second patterned layer
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`have “a second feature distinct from the first feature.” Samsung-1001, 084 Patent
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`Claim 1. There is little information in the 084 Patent to assist in defining this term,
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`as the term “distinct” is not used in the 084 Patent specification. The term was
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`added during prosecution to distinguish a prior art reference with “overlapping
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`non-distinct features.” See Samsung-1002, at pp. 131-132, Applicant’s Remarks
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`dated 9-24-1996, at pp. 4-5. Meanwhile, dependent claim 12 requires that “the first
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`and second features do not overlap.” Notwithstanding claim 12, I understand that
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`the Applicant’s arguments during prosecution overcome any claim differentiation
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`argument that the first and second features may overlap. In view of the
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`Applicant’s arguments, a POSITA would understand a second feature distinct from
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`SAMSUNG-1011.018
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`the first feature to mean a second patterned feature that is spatially separated
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`from the first feature on the x axis. This is also consistent with the plain meaning
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`of “distinct” to a POSITA. Further, this construction is consistent with both the
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`standard for a non-expired patent and the standard for an expired patent.
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`VI. THE STATE OF THE PRIOR ART
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`40.
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`I have reviewed much of the prior art relevant to the field of double
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`patterning photolithography which relates to the 084 Patent. In doing so, I have
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`identified two prior art references—Jinbo and Hsue—each of which disclose, with
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`a few exceptions, exactly the same process as the claims of the 084 Patent. Any
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`differences between Jinbo, Hsue, and the 084 Patent relate to specific examples of
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`stabilizing the first patterned layer in the claimed processes (claims 8-11) or
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`utilizing a patterned photoresist feature as a disposable post (claims 13 and 14). As
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`further described below with respect to the prior art references, stabilization by
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`PRIST (claim 8), silylation (claim 9), exposure to heat and radiation (claim 10),
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`and exposure to radiation while ramping temperature (claim 11) were all known
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`techniques to a POSITA in the timeframe of the 084 Patent’s priority date that
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`could be substituted to achieve the purposes of the stabilization described in Jinbo
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`(i.e., stabilize the photoresist to withstand subsequent developers and solvents) and
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`Hsue (i.e., stabilize the photoresist to withstand subsequent developers). In
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`addition, each of these techniques have the ability to allow photoresist to withstand
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`19
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`SAMSUNG-1011.019
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`all three exemplary processing steps in the 084 Patent—i.e., subsequent exposure
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`to radiation, solvents, and developers.
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`41. Moreover, utilizing a patterned feature as a disposable post (claims 13
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`and 14) was a known technique to a POSITA and a POSITA would have been
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`motivated to do so to increase semiconductor feature density (thereby decreasing
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`semiconductor device size). Thus, to the extent any claim of the 084 Patent is not
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`anticipated by Jinbo and Hsue, it would have been obvious to a POSITA.
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`42. Further, as described below, all of these minor differences are well
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`documented in the other three prior art references discussed below—McColgin,
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`Matthews, and Cooper.
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`A. Jinbo
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`43.
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`Jinbo describes the same lithographic process in the 084 Patent: a
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`lithographic process for use in manufacturing semiconductor devices. Samsung-
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`1005, Jinbo at p. 2. Just like the 084 Patent, Jinbo recognizes that single exposure
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`patterning techniques have been limited by the minimum resolvable distance, an
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`optical property of a photolithographic system. Id. at p. 3. Jinbo teaches that a
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`multiple exposure process can overcome this limitation and further reduce
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`semiconductor device spacing. Id. at pp. 6-7.
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`44. The technique in Jinbo exposes the first resist through a mask to light
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`of 300 mJ/cm2 (i.e., radiation) to pattern the first resist to form a first resist pattern.
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`20
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`SAMSUNG-1011.020
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`Id. at pp. 4-5. The patterned first resist is then exposed to a plasma of oxygen and
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`CF4 to make the resist “insoluble” to the solvents and developers used in forming
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`subsequent resists “so that even though first resist pattern 13b is covered by second
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`resist 15, no destruction of the first resist pattern itself occurs, and no mixing with
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`the second resist occurs either.” Id. at p. 5. Once the first resist is made insoluble, a
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`second resist is formed on the first. Id. at p. 5. The second resist is exposed to light
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`of 300 mJ/cm2 (i.e., radiation) and developed to form a second resist pattern as part
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`of the same layer as the first resist pattern. Id. at p. 5. The resulting resist shapes
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`are spaced more closely than can be achieved with a comparable single resist
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`technique. Id. at pp. 5-6.
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`45.
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`Jinbo teaches a PRIST technique involving exposing the patterned
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`resist to a fluorine plasma of oxygen and CF4, which Jinbo describes as making the
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`resist “insoluble” to two of the three exemplary subsequent processing steps
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`disclosed in the 084 Patent—namely, the resist becomes insoluble to solvents and
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`developers used for the second resist. In addition, such a technique would also
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`make the resist able to withstand subsequent radiation, the third and final
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`exemplary processing step. Thus, the stabilization described in Jinbo enables the
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`photoresist to withstand all three exemplary subsequent processing steps described
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`in the 084 Patent.
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`21
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`SAMSUNG-1011.021
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`46. Below is a side-by-side comparison of the figures disclosed in the 084
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`Patent and Jinbo:
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`
`Spatially
`separated on x
`axis
`
`Spatially separated
`on x axis
`
`first feature
`
`second feature
`Single
`patterned
`layer
`
` Samsung-1001, 084 Patent, FIG. 5
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`B. Hsue
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`Samsung-1005, Jinbo, FIG. 1(e)
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`
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`47. Hsue, like Jinbo, also describes the same process as the 084 Patent.
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`Hsue discloses that a layer 12 to be etched is deposited over a substrate 10, and a
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`first layer of photoresist is then deposited over the layer to be etched, patterned
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`using actinic light (i.e. radiation) through openings in a mask, and developed to
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`produce a first patterned layer 14. Samsung-1006, Hsue at 2:19-37. Hsue does not
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`explicitly state that the second imaging layer is a positive or negative photoresist,
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`however, as described above, positive photoresist becomes soluble in the developer
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`after exposure to radiation. This is the process depicted in Hsue, and therefore a
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`POSITA would understand a positive photoresist is used. Subsequently, the first
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`patterned layer is baked using an ultraviolet (UV) baking process at a temperature
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`between about 140° to 160°C to prevent it from being removed during subsequent
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`22
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`SAMSUNG-1011.022
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`development steps (i.e., Hsue discloses stabilization by simultaneously heating the
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`photoresist and exposing it to UV radiation). Id. at 2:38-42; 2:48-50. So long as the
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`UV radiation is in the sub-320 nm range4, the UV radiation would also cause the
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`photoresist to crosslink. See, e.g., Samsung-1008, Matthews at 3:57-61. When
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`photoresist “crosslinks,” it becomes able to withstand to radiation, solvents, and
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`developers. Thus, the stabilization described in Hsue can enable the photoresist to
`
`withstand all three exemplary subsequent processing steps described in the 084
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`Patent.
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`48. A second photoresist coating 18 is then deposited in the openings
`
`between the features of the first patterned layer 14. A POSITA would recognize
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`that second photoresist coating 18 would be deposited vertically from above
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`photoresist mask layer 14, and that a portion of photoresist coating 18 would be
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`deposited on the features of photoresist mask layer 14 during this process. The
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`second photoresist layer is then patterned with actinic light (i.e. radiation) through
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`a mask 20 and developed to produce a second patterned layer 18. Samsung-1006,
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`Hsue at 2:43-47. Following development of the second patterned layer, the features
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`of the first patterned layer (14) and the features of the second patterned layer (18)
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`are distinct (i.e., spatially separated) and combine to form a single patterned layer.
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`This is shown in Figure 4 (below).
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`4 UV light has a wavelength between 10 nm and 400 nm.
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`23
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`SAMSUNG-1011.023
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`Smith Decl.
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`Inter Partes Review of U.S. 5,652,084
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`49. Below is a side-by-side comparison of the figures disclosed in the 084
`
`
`
`Patent and Hsue:
`
`
`50. The resulting features of the single patterned layer are a distance apart
`
`
`
`defined by the misalignment capacity of the apparatus (M), rather than by the
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`resolution limit of the wavelength of light used (R). See Samsung-1006, Hsue at
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`2:51-53, FIG. 4. The misalignment capacity (M) allows resulting resist shapes to
`
`be spaced more closely than can be achieved with a comparable single resist
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`technique limited by wavelength of light (R).
`
`i. Hsue in View of Jinbo (Claim 8)
`
`51. Using the PRIST stabilization technique of Jinbo to stabilize the first
`
`resist pattern in Hsue as required