IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`__________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`__________________
`
`BLACKBERRY CORP.,
`Petitioner,
`
`v.
`
`CYPRESS SEMICONDUCTOR CORP.,
`Patent Owner.
`__________________
`
`Case IPR2014-_____
`Patent U.S. 6,012,103
`__________________
`
`
`
`
`PETITION FOR INTER PARTES REVIEW OF
`CLAIMS 14-16, 18-20, AND 23-27 OF U.S. PATENT NO. 6,012,103
`UNDER 35 U.S.C. § 312 AND 37 C.F.R. § 42.104
`
`
`
`Mail Stop PATENT BOARD
`Patent Trial and Appeal Board
`US Patent and Trademark Office
`PO Box 1450
`Alexandria, Virginia 22313-1450
`
`
`
`
`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`
`TABLE OF CONTENTS
`
`I. 
`
`II. 
`
`MANDATORY NOTICES ............................................................................. 1 
`
`CERTIFICATION OF GROUNDS FOR STANDING .................................. 2 
`
`III.  OVERVIEW OF CHALLENGE AND RELIEF REQUESTED .................... 3 
`
`A. 
`
`B. 
`
`Prior Art Patents and Printed Publications ............................................ 3 
`
`Grounds for Challenge .......................................................................... 4 
`
`IV.  OVERVIEW OF THE ’103 PATENT ............................................................ 5 
`
`V. 
`
`CLAIM CONSTRUCTION .......................................................................... 12 
`
`A. 
`
`B. 
`
`C. 
`
`D. 
`
`E. 
`
`Claims 14, 16, 19, and 20: “configuration information” .................... 12 
`
`Claim 14[c]: “electronically simulating a physical
`disconnection and reconnection of the peripheral device” ................. 12 
`
`Claim 24[a]: “means for physically connecting a
`peripheral device to a computer system through the
`computer peripheral bus” .................................................................... 14 
`
`Claim 24[b]: “means for receiving a second set of
`configuration information from a computer system over
`the computer peripheral bus and port” ................................................ 14 
`
`Claim 24[c]: “means for electronically simulating a
`physical disconnection and reconnection of the peripheral
`device to reconfigure the peripheral device to a second
`configuration based on the second set of configuration
`information” ........................................................................................ 15 
`
`VI.  LEVEL OF ORDINARY SKILL IN THE ART ........................................... 15 
`
`VII. 
`
`IDENTIFICATION OF HOW THE CHALLENGED CLAIMS
`ARE UNPATENTABLE ............................................................................... 15 
`
`A.  Admitted Prior Art............................................................................... 16 
`
`
`
`i
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`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`
`B. 
`
`Claims 14, 18–20, and 23–27 of the ’103 Patent Are
`Obvious under 35 U.S.C. §103(a) over APA and Yap ....................... 19 
`
`C. 
`
`D. 
`
`E. 
`
`F. 
`
`Claims 15 and 16 of the ’103 Patent Are Obvious under
`35 U.S.C. 103(a) over the APA, Yap, and Michelson ........................ 37 
`
`Claims 14–16, 18, and 23–26 of the ’103 Patent Are
`Obvious under 35 U.S.C. § 103 over Michelson,
`PCCextend, and Davis ......................................................................... 40 
`
`Claims 19, 20, and 27 of the ’103 Patent Are Obvious
`under 35 U.S.C. § 103 over Michelson, PCCextend,
`Davis, and the APA ............................................................................. 55 
`
`Claim 14 of the ’103 Patent Is Anticipated Under 35
`U.S.C. § 102(b) Over the USB Spec. .................................................. 59 
`
`VIII.  CONCLUSION .............................................................................................. 60 
`
`
`
`
`
`ii
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`

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`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`
`EXHIBIT LIST
`
`U.S. Patent No. 6,012,103 to Sartore et al.
`
`1001
`
`1002
`
`1003
`
`1004
`
`1005
`
`1006
`
`1007
`
`1008
`
`1009
`
`1010
`
`1011
`
`1012
`
`1013
`
`1014
`
`1015
`
`1016
`
`1017
`
`1018
`
`
`
`U.S. Patent No. 6,073,193 to Yap
`
`U.S. Patent No. 5,628,028 to Michelson
`
`PCCextend 100 User’s Manual
`
`U.S. Patent No. 5,862,393 to Davis
`
`Prosecution History of U.S. Patent 6,012,103
`
`Prosecution History of U.S. Patent 6,249,825
`
`Prosecution History of U.S. Patent 6,493,770
`
`Prosecution History of European Patent Application No. 98931675.7
`
`European Patent Convention (EPC) Rule 29 (1973)
`
`Patent Assignment Records of the ‘103, ‘825, and ‘770 Patents
`
`Declaration of Dr. Andrew Wolfe
`
`USB Specification v 1.0
`
`U.S. Patent No. 5,590,273 to Balbinot
`
`U.S. Patent No. 6,338,109 to Snyder
`
`Quinnell, Richard A., “USB: A Neat Package with a Few Loose Ends,”
`EDN Magazine
`
`Levine, Larry. PCMCIA Primer, pp. 117-130
`
`PCMCIA PC Card Standard Release 2.01, pp. 3-2 to 3-5; 4-2 to 4-7; 4-
`10 to 4-19; 4-28 to 4-3 1; 4- 34 to 4-37; 5-2 to 5-5; 5-12 to 5-21; 5-23;
`5-48 to 5-5 1; 6-6 to 6-17
`
`iii
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`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`1019
`
`PCMCIA Card Services Specification Release 2.0, pp. 3-2 to 3-7; 3-14
`to 3-17; 3-20 to 3-25; 3- 28 to 3-29; 5-78 to 5-79
`
`1020
`
`1021
`
`
`
` 
`
`U.S. Patent No. 5,537,654 to Bedingfield
`
`C.V. of Dr. Andrew Wolfe
`
`   
`
` 
`
` 
`
`
`
`iv
`
`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`I. MANDATORY NOTICES
`Pursuant to 37 C.F.R. § 42.8(a)(1), BlackBerry Corp. (“BlackBerry” or
`
`“Petitioner”) provides the following mandatory disclosures.
`
`Real Party-in-Interest: Blackberry Corp. and Blackberry Ltd. are the real
`
`parties-in-interest.
`
`Related Matters: Petitioner states that U.S. Patent No. 6,012,103 (“the ’103
`
`patent,” Ex. 1001) is asserted in co-pending litigation captioned Cypress
`
`Semiconductor Corp. v. Blackberry Ltd. et al., Case No. 5:13-cv-04183-HRL
`
`(N.D. Cal.), complaint filed on September 10, 2013 and served September 12,
`
`2013. The ’103 patent is also involved in co-pending litigation captioned Cypress
`
`Semiconductor Corp. v. LG Electronics, Inc. et al., No. 4:13-cv-04034-SBA (N.D.
`
`Cal.).
`
`On August 26, 2014, LG Electronics, Inc., LG Electronics U.S.A., Inc., and
`
`LG Electronics MobileComm U.S.A., Inc (collectively, “LGE”) filed a petition for
`
`inter partes review against claims 14–16, 18–20, and 23–27 of the ’103
`
`patent. (IPR2014-01386.) U.S. Patent No. 6,249,825 (“the ’825 patent”) and U.S.
`
`Patent No. 6,493,770 (“the ’770 patent”) claim priority to the ’103 patent. On
`
`August 27, 2014, LGE filed petitions for inter partes review of the ’825 patent
`
`(IPR2014-01396) and the ’770 patent (IPR2014-01405).
`
`
`
`1
`
`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`
`Petitioner is filing a petition for inter partes review of the ’825 and ’770
`
`patents concurrently with this petition.
`
`Counsel: Pursuant to 37 C.F.R. § 42.8(b)(3), Petitioner provides the
`
`following designation of counsel:
`
`Lead Counsel:
`
`Robert C. Mattson (Registration No. 42,850)
`
`Backup Counsel: John S. Kern (Registration No. 42,719) and Thomas C.
`
`Yebernetsky (Registration No. 70,418)
`
`Service Information: Pursuant to 37 C.F.R. § 42.8(b)(4), papers concerning
`
`this matter should be served on the following:
`
`
`
`Address: Oblon Spivak, 1940 Duke Street, Alexandria, VA 22314
`
`Email:
`
`cpdocketmattson@oblon.com;
`
`cpdocketkern@oblon.com; cpdocketyebernetsky@oblon.com
`
`Telephone: 703-412-6466
`
`Facsimile: 703-413-2220
`
`Petitioner consents to electronic service at the above email addresses.
`
`Fees: The undersigned authorizes the Office to charge the fee required by 37
`
`
`
`
`C.F.R. § 42.15(a) for this Petition for inter partes review to Deposit Account No.
`
`15-0030 and any additional fees that might be due in connection with this Petition.
`
`II. CERTIFICATION OF GROUNDS FOR STANDING
`Petitioner certifies pursuant to Rule 42.104(a) that the patent for which
`
`review is sought is available for inter partes review, and that Petitioner is not
`
`
`
`2
`
`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`barred or estopped from requesting an inter partes review challenging the patent
`
`claim on the grounds identified in this Petition.
`
`III. OVERVIEW OF CHALLENGE AND RELIEF REQUESTED
`Pursuant to 37 C.F.R. §§ 42.22(a)(1) and 42.104 (b)(1)–(2), Petitioner
`
`challenges claim 14–16, 18–20, and 23–27 of the ’103 patent. The ’103 patent is
`
`subject to pre-AIA 35 U.S.C. §§ 102 and 103.
`
`A.
`Prior Art Patents and Printed Publications
`Inter partes review of the ’103 patent is requested in view of the following
`
`references, none of which was considered by the Office during the original
`
`prosecution of the ’103 patent:
`
`Exhibit 1002 – U.S. Patent No. 6,073,193, issued on June 5, 2000 from an
`
`application filed on April 24, 1997 and, therefore, is available as prior art under 35
`
`U.S.C. § 102(e) (“Yap”).
`
`Exhibit 1003 – U.S. Patent No. 5,628,028, issued on May 6, 1997 from an
`
`application filed on March 2, 1995 and, therefore, is available as prior art under 35
`
`U.S.C. § 102(e) (“Michelson”).
`
`Exhibit 1004 – PCCextend 100 User’s Manual is dated April 3, 1995 and
`
`contains a “1994-95” copyright date and, therefore, is available as prior art under
`
`35 U.S.C. § 102(b) (“PCCextend”).
`
`
`
`3
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`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`
`Exhibit 1005 – U.S. Patent No. 5,862,393, issued on January 19, 1999 from
`
`an application filed on October 7, 1996 and, therefore, is available as prior art
`
`under 35 U.S.C. § 102(e) (“Davis”).
`
`Exhibit 1013 – Universal Serial Bus Specification Revision 1.0 has a
`
`publication date of January 15, 1996 and, therefore, is available as prior art under
`
`35 U.S.C. § 102(b) (“USB Spec.”). Additionally, Yap incorporates by reference
`
`the USB Spec. (Ex. 1002, 1:39–42.)
`
`B. Grounds for Challenge
`Petitioner requests cancelation of the challenged claims under the following
`
`statutory grounds:
`
`1.
`
`Claims 14, 18–20, and 23–27 are obvious over the Admitted Prior Art
`
`(“APA”) in view of Yap under 35 U.S.C. § 103(a);
`
`2.
`
`Claims 15 and 16 are obvious over the APA in view of Yap and
`
`Michelson under 35 U.S.C. § 103(a);
`
`3.
`
`Claims 14–16, 18, and 23–26 are obvious over Michelson in view of
`
`PCCextend and Davis under 35 U.S.C. § 103(a);
`
`4.
`
`Claims 19, 20, and 27 are obvious over Michelson in view of
`
`PCCextend, Davis, and the APA under 35 U.S.C. § 103(a);
`
`5.
`
`Claim 14 is anticipated by the USB Spec. under 35 U.S.C. § 102(b).
`
`
`
`4
`
`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`
`
`Section VII below demonstrates, for each of the statutory grounds, that there
`
`is a reasonable likelihood that Petitioner will prevail. See 35 U.S.C. § 314(a).
`
`IV. OVERVIEW OF THE ’103 PATENT
`The ’103 patent relates to using an electronic circuit to simulate a physical
`
`disconnection and reconnection of a peripheral device while it is connected to a
`
`host computer in order to reconfigure the peripheral device. (Ex. 1001, 2:51–58;
`
`5:25–32.)
`
`Figure 2 (reproduced below) of the ’103 patent illustrates a USB system “in
`
`accordance with the invention.” (Ex. 1001, 3:42–43, 4:52–54.) The USB system
`
`includes a host computer with an operating system that stores “[o]ne or more
`
`peripheral device drivers, such as a first peripheral device driver 68” and a
`
`“plurality of different configuration information sets 70.” (Ex. 1001, 4:56–5:2.)
`
`The host computer selects one of the plurality of configuration information
`
`sets, such as an updated configuration information set, to download to the
`
`
`
`
`
`5
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`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`peripheral device. (Ex. 1001, 5:25–43.) Instead of relying on a physical
`
`disconnection and reconnection of the peripheral device to reconfigure the
`
`peripheral device based on the updated configuration information set, the host uses
`
`an “electronic disconnect and reconnect method in accordance with the invention.”
`
`(Ex. 1001, 5:25–32.) In other words, the “disconnect/connect cycle may be
`
`electrically simulated” so that “a change in the configuration information for a
`
`particular peripheral device may be implemented.” (Ex. 1001, 2:51–58.)
`
`According to the ’103 patent, a conventional host computer USB interface
`
`circuit monitors the two USB data leads, labeled D+ and D-, to detect a
`
`disconnection and reconnection. (Ex. 1001, 3:43–44, 6:6–32, Fig. 3.) As shown in
`
`Fig. 3 (reproduced below), when the host device and the peripheral device are
`
`connected, 3.3 V from a power bus is supplied to the D+ line. (Ex. 1001, 6:15–16,
`
`6:25–32.) “In operation, the host computer detects the connection of a peripheral
`
`device by monitoring the voltage levels of one of the two USB data leads.” (Ex.
`
`1001, 6:17–20.) When the peripheral device is physically disconnected from the
`
`host computer, the connection from the 3.3 V supply voltage to the D+ line is
`
`broken as well, causing the host to measure zero volts on the D+ line. (Ex. 1001,
`
`6:20–24.) Based on this measurement, the host computer “determines that no
`
`peripheral device is connected to the USB port.” (Ex. 1001, 6:20–25.) When that
`
`peripheral device or another peripheral device is connected to the host computer,
`
`
`
`6
`
`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`“the 1.5 kΩ resistor 110 connected to a supply voltage of the peripheral device
`
`USB interface 101 adds a voltage to the D+ line and the D+ line at the host
`
`computer is pulled to above 3 volts which is detected as a connected peripheral
`
`device by the host computer and the host computer begins the enumeration
`
`process.” (Ex. 1001, 6:25–32.)
`
`
`
`The ’103 patent describes simulating the disconnection/reconnection cycle
`
`by using a switch to break the connection between a supply voltage and the D+
`
`line. (Ex. 1001, 6:65–7:23, Fig. 4, reproduced below.)
`
`
`
`7
`
`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`
`
`
`The switch 130 “may be a semiconductor switch such as a field effect
`
`transistor (FET),” and “may have a control lead 132 which may control the
`
`operation of the electrical switch.” (Ex. 1001, 6:50–56.) By opening the switch,
`
`“the D+ data lead is no longer connected to the supply voltage and the host
`
`computer determines that the peripheral device has been disconnected even though
`
`the peripheral device is still physically connected to the USB.” (Ex. 1001, 7:1–7.)
`
`“Similarly, when the electrical switch is closed again, the D+ data lead is again
`
`connected to the supply voltage and the host computer will detect that the
`
`peripheral device has been reconnected to the USB.” (Ex. 1001, 7:7–11.)
`
`According to the ’103 patent, the “electronic disconnection and reconnection
`
`of the peripheral device, as described above, in combination with the storage of the
`
`configuration information sets on the host computer permits the configuration of
`
`the peripheral devices to be changed easily without requiring the physical
`
`disconnection and reconnection of a peripheral device.” (Ex. 1001, 7:14–19.)
`8
`
`
`
`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`
`According to the ’103 patent, the USB interface system and method may be
`
`a single semiconductor chip which may be incorporated into a plurality of
`
`peripheral devices. (Ex. 1001, 3:1–4.) “The chip may initially have a generic
`
`configuration (e.g., not specific to a particular peripheral device).” (Ex. 1001, 3:4–
`
`6.) “Then, the appropriate configuration information for a particular peripheral
`
`device and manufacturer may be downloaded to the chip, an electronic simulation
`
`of the disconnection and reconnection of the peripheral device occurs, the
`
`peripheral device is recognized as a new, manufacturer specific peripheral device
`
`and the appropriate software device driver is loaded into the memory of the host
`
`computer.” (Ex. 1001, 3:6–13.)
`
`“For example, a plurality of different peripheral devices manufactured by
`
`different companies may each include a USB interface system.” (Ex. 1001, 5:52–
`
`55.) “The USB interface system for each peripheral device is identical (e.g., has a
`
`USB interface circuit and a memory) except that each memory may contain an
`
`identification code that is unique to, for example, a particular manufacturer.” (Ex.
`
`1001, 5:55–59.) “When one of the peripheral devices is connected to the USB and
`
`the host computer, the appropriate configuration information for the peripheral
`
`device, based on the identification code, is downloaded over the USB to the
`
`memory of the peripheral device and the appropriate software device driver is
`
`loaded into the memory of the host computer.” (Ex. 1001, 5:59–65.)
`
`
`
`9
`
`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`
`According to the ’103 patent, one advantage of the electrical disconnection
`
`and reconnection is that “since the peripheral device is physically connected to the
`
`bus during the electrical simulation, the peripheral device may utilize the electrical
`
`power supplied by the bus to operate the peripheral device.” (Ex. 1001, 2:58–62.)
`
`During prosecution of the application that matured into the ’103 patent, the
`
`PTO rejected all of the claims originally filed based on prior art. In the rejection,
`
`the Examiner asserted that the prior art “describes a system where a peripheral
`
`device is connected to a host computer by a computer bus where the host computer
`
`is able to reconfigure the peripheral device from a first configuration to a second
`
`configuration.” (Ex. 1006 p. 59.) The Examiner also took official notice “that an
`
`electrical switch and a solid state transistor are both well-known in the art and that
`
`it would have been obvious to one of ordinary skill in the art to incorporate such
`
`devices into the above combination.” (Ex. 1006 p. 61.)
`
`While the Applicant initially attempted to distinguish the claims over the
`
`cited prior art based on the recitation of a computer bus and port, it ultimately had
`
`to add by amendment the limitation “electronically simulating a physical
`
`disconnection and reconnection of the peripheral device to reconfigure the
`
`peripheral device to a second configuration based on the second set of
`
`configuration information” to gain allowance. (Ex. 1006 pp. 74–76, 90–92, 95.)
`
`Notably, the Applicant did not traverse the official notice taken by the Examiner.
`
`
`
`10
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`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`
`Claims 14 and 24, the two independent claims at issue in this Petition, are
`
`reproduced below:
`
`Claim 14[preamble] A method for reconfiguring a peripheral device
`connected by a computer bus and port to a host computer, the
`method comprising the steps of:
`[a] detecting the peripheral device connected to the port, wherein the
`peripheral device has a first configuration;
`[b] downloading a second set of configuration information from the
`host computer into the peripheral device over the computer bus; and
`[c] electronically simulating a physical disconnection and
`reconnection of the peripheral device to reconfigure the peripheral
`device to a second configuration based on the second set of
`configuration information.
`
`Claim 24[preamble] A peripheral interface device for a computer
`peripheral bus and port, comprising:
`[a] means for physically connecting a peripheral device to a
`computer system through the computer peripheral bus, wherein the
`peripheral device has a first configuration;
`[b] means for receiving a second set of configuration information
`from a computer system over the computer peripheral bus and port;
`and
`[c] means for electronically simulating a physical disconnection and
`reconnection of the peripheral device to reconfigure the peripheral
`device to a second configuration based on the second set of
`configuration information.
`
`
`
`11
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`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`V. CLAIM CONSTRUCTION
`The claim terms are presumed to take on their ordinary and customary
`
`meaning. This Petition shows that the challenged claims are unpatentable when
`
`given their broadest reasonable interpretation in light of the specification. See 37
`
`C.F.R. § 42.100(b).
`
`A. Claims 14, 16, 19, and 20: “configuration information”
`The broadest reasonable interpretation of the term “configuration
`
`information” is “configuration data for a particular peripheral device.” (Ex. 1012
`
`¶ 64.) This interpretation is the broadest reasonable interpretation that is consistent
`
`with the claims of the ’103 patent and the rest of the specification. For example,
`
`the specification describes “a non-volatile memory 38 that may store configuration
`
`information describing the characteristics of the peripheral device.” (Ex. 1001,
`
`4:19–21.) Furthermore, the specification describes “configuration information sets
`
`70, which may include configuration data for a particular peripheral device
`
`(including which device driver to use), microprocessor code to be executed by a
`
`CPU located in the peripheral device, or logic configuration data to configure logic
`
`circuits in the peripheral device.” (Ex. 1001, 4:64–5:2.)
`
`B. Claim 14[c]: “electronically simulating a physical disconnection
`and reconnection of the peripheral device”
`
`The broadest reasonable interpretation of the term “electronically simulating
`
`a physical disconnection and reconnection of the peripheral device” is “using an
`
`
`
`12
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`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`electronic circuit to perform an action, such as an electronic reset, associated with
`
`physical disconnection and reconnection of a peripheral device.” (Ex. 1012 ¶ 64.)
`
`This interpretation is the broadest reasonable interpretation that is consistent
`
`with the claims of the ’103 patent and the rest of the specification. (Ex. 1012 ¶ 64;
`
`Ex. 1001, 3:14–24, claims 13, 23, and 33.) For example, independent claim 1
`
`recites a third circuit configured to electronically simulate a physical disconnection
`
`and reconnection of a peripheral device, and dependent claim 13 recites “wherein
`
`said third circuit comprises a reset circuit configured to reset the configuration of
`
`the peripheral device.” Independent claim 14 recites electronically simulating a
`
`physical disconnection and reconnection of a peripheral device, and dependent
`
`claim 23 recites “wherein said simulating comprises electronically resetting the
`
`configuration of the peripheral device, controllable by the peripheral device.”
`
`Similarly, independent claim 24 recites means for electronically simulating a
`
`physical disconnection and reconnection of a peripheral device, and dependent
`
`claim 33 recites “wherein said electronic simulating means comprises means for
`
`electronically resetting the configuration of the peripheral device.” Thus, the
`
`interpretation of the “electronically simulating” language must be broad enough so
`
`as not to exclude the reset circuit, resetting operation, and the means for
`
`electronically resetting recited in the dependent claims. The interpretation of the
`
`“electronically simulating” language proposed herein encompasses the claimed
`
`
`
`13
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`

`

`U.S. Patent 6,012,103
`Petition for Inter Partes Review
`
`reset circuit, operation, and means in the dependent claims, as well as the other
`
`aspects of electronically simulating (such as simulating with a switch) described in
`
`the patent (see, e.g., Ex. 1001, 6:48–7:11), and is therefore the broadest reasonable
`
`interpretation consistent with the claims and the rest of the specification. (Ex.
`
`1012 ¶ 64.)
`
`C. Claim 24[a]: “means for physically connecting a peripheral device
`to a computer system through the computer peripheral bus”
`
`The corresponding structure in the ’103 patent for physically connecting a
`
`peripheral device to a computer system through the computer peripheral bus is a
`
`connector and equivalents thereof. (Ex. 1012 ¶ 64.) The only structure disclosed
`
`in the ‘103 patent for physically connecting a peripheral device to a computer
`
`system through the computer peripheral bus is a connector. (Ex. 1012 ¶ 64; Ex.
`
`1001, 1:39–54, Figs. 1, 2, 5, 6, and 7.)
`
`D. Claim 24[b]: “means for receiving a second set of configuration
`information from a computer system over the computer
`peripheral bus and port”
`
`The corresponding structure in the ’103 patent for receiving a second set of
`
`configuration information from a computer system over the computer peripheral
`
`bus and port is a peripheral device interface and equivalents thereof. (Ex. 1012 ¶
`
`64.) For example, Fig. 2 shows an interface 76 for receiving configuration
`
`information over the computer bus and port. (Ex. 1012 ¶ 64; Ex. 1001, 5:12, Figs.
`
`2, and 5–7.)
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`E. Claim 24[c]: “means for electronically simulating a physical
`disconnection and reconnection of the peripheral device to
`reconfigure the peripheral device to a second configuration based
`on the second set of configuration information”
`
`The corresponding structure in the ’103 patent for electronically simulating a
`
`physical disconnection and reconnection of the peripheral device to reconfigure the
`
`peripheral device to a second configuration based on the second set of
`
`configuration information is an electronic circuit and equivalents thereof. (Ex.
`
`1012 ¶ 59.) For example, circuit 120 performs this function. (Ex. 1012 ¶ 64; Ex.
`
`1001, 6:48–7:11, Fig. 4.)
`
`VI. LEVEL OF ORDINARY SKILL IN THE ART
`The level of ordinary skill in the art is evidenced by the prior art. See
`
`
`In re GPAC Inc., 57 F.3d 1573, 1579 (Fed. Cir. 1995) (determining that the Board
`
`did not err in adopting the approach that the level of skill in the art was best
`
`determined by the references of record). The prior art references relied upon show
`
`that one of ordinary skill in the art was sufficiently skilled in the design of
`
`peripheral devices used in connection with computer systems. (See, e.g., Ex.
`
`1002–1005.)
`
`VII. IDENTIFICATION OF HOW THE CHALLENGED CLAIMS ARE
`UNPATENTABLE
`
`Pursuant to Rule 42.104(b)(4)–(5), this section demonstrates that the
`
`challenged claims are unpatentable.
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`
`
`A. Admitted Prior Art
`Inter Partes Review permits the consideration of an admission by a patent
`
`owner of record. See Intri-Plex Technologies Inc. v. Saint-Gobain Perf. Plastics
`
`Rencol Ltd., Case No. IPR 2014-00309, 2014 WL 2623456, at *5 (P.T.A.B. June
`
`10, 2014).
`
`In this case, the “Background of the Invention” section (“Background”) of
`
`the ’103 patent includes a discussion of a “new emerging technology called the
`
`Universal Serial Bus (USB)” for connecting peripheral devices to computers. (Ex.
`
`1001, 1:39–2:12.) The Background describes how, when a peripheral device is
`
`connected to a computer via a conventional USB port, the presence of the
`
`connected peripheral device is detected and a configuration process known as
`
`device enumeration is performed to, among other things, determine the device’s
`
`requirements and capabilities by reading configuration information stored in the
`
`device. (Ex. 1001, 1:39–2:12.) The Background also describes, in connection
`
`with known serial bus systems, that to “alter the configuration or personality of a
`
`peripheral device, such as downloading new code or configuration information
`
`into the memory of the peripheral device, the host computer system must detect a
`
`peripheral device connection or a disconnection and then a reconnection.” (Ex.
`
`1001, 2:13–17.)
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`U.S. Patent 6,012,103
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`The Background suggests that the requirement for a disconnection and
`
`reconnection is a problem because it does not allow for “easily altering the
`
`configuration data for a peripheral device” or “easily changing the software device
`
`driver associated with a particular peripheral device. (Ex. 1001, 2:20–24.)
`
`According to the Background, the invention “avoids these and other problems of
`
`known systems and methods, and it is to this end that the present invention is
`
`directed.” (Ex. 1001, 2:25–28, emphasis added.) Thus, it is clear from the
`
`Background section that the Applicant considered the above features to be known
`
`in the prior art. (Ex. 1012 ¶¶ 65–71.)
`
`Moreover, the totality of the circumstances indicates that the Applicant
`
`considered the above features to be in the prior art. (Ex. 1012 ¶¶ 65–71.) For
`
`example, the Applicant did not challenge the PTO’s characterization of the detecting
`
`and downloading features to be Admitted Prior Art during prosecution. (Ex. 1007
`
`pp. 53–54, 62–63; Ex. 1008 pp. 70–71, 90–91.) When the Examiner relied on
`
`“Applicant’s Admitted Prior Art” to teach the detection and downloading features of
`
`the claims, Applicant did not challenge this characterization. (Ex. 1007 pp. 53–
`
`54, 62–63; Ex. 1008 pp. 70–71, 90–91.) It instead argued that the feature of
`
`electronically simulating a physical disconnection and reconnection was not taught
`
`in the secondary references. (Ex. 1007 pp. 53–54, 62–63; Ex. 1008 pp. 70–71,
`
`90–91.)
`
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`
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`The Applicant exhibited this belief in prosecuting not only the U.S.
`
`applications, but in prosecuting the counterpart, European Patent Application No.
`
`98931675.7. In September 2005, it filed a set of claims which recited:
`
`1. A system (50) for reconfiguring a peripheral device (54)
`having a first configuration . . . comprising:
`means configured to download a second set of configuration
`information from the host computer into the peripheral device over
`the computer bus (60); and
`means (120) configured to reset the configuration of the
`peripheral device (54) from said first configuration to a second
`configuration based on the second set of configuration information;
`characterized in that said reset means (120) is configured to
`electronically simulate a physical disconnection and reconnection
`of the peripheral device (54) from said first configuration to said
`second configuration.
`(Ex. 1009, p. 136, emphasis added.)
`This is a standard two-part claim format under the European Patent
`
`Convention (EPC) in which the features preceding the “characterized in” language
`
`are admitted by the claim drafter to be prior art. (Ex. 1010, Rule 29(1) EPC,
`
`effective until 12/07.) Thus, much of the features recited in the claims of the ’103
`
`patent, as detailed below, should be treated as Admitted Prior Art (“APA”).
`
`
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`
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`B. Claims 14, 18–20, and 23–27 of the ’103 Patent Are Obvious
`under 35 U.S.C. §103(a) over APA and Yap
`
`The following subsections explain how the APA in combination with Yap
`
`renders obvious the subject matter encompassed by claims 14, 18–20, and 23–27
`
`of the ’103 patent.
`
`Claim 14[preamble]: “A method for reconfiguring a peripheral device
`connected by a computer bus and port to a host computer, the method
`comprising the steps of:”
`
`The ’103 patent admits that it was known in the prior art to connect a
`
`peripheral device to a host computer through a standard USB computer bus and
`
`port. (Ex. 1012 ¶¶ 121–122; Ex. 1001, 1:55–2:8, Fig. 1, 4:4–23.) The ’103 patent
`
`further admits that it was known in the USB prior art for the system “to alter the
`
`configuration or personality of a peripheral device, such as downloading new code
`
`or configuration information into the memory of the peripheral device . . . .” (Ex.
`
`1001, 2:13–17.) Altering the configuration or personality of the device is an
`
`example of reconfiguring a peripheral device. (Ex. 1012 ¶ 122.) Thus, the APA
`
`discloses reconfiguring a peripheral device connected by a computer bus and port
`
`to a host computer.
`
`Claim 14[a]: “detecting the peripheral device connected to the port,
`wherein the peripheral device has a first configuration;”
`The ’103 patent admits that it was known in the prior art that “[w]hen a
`
`peripheral device is first connected to the USB and the host computer through a
`
`
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`U.S. Patent 6,012,103
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`standard USB communications port, the presence of the connected peripheral
`
`device is detected and a configuration process of the USB for the connected
`
`peripheral device, known as device enumeration, begins.” (Ex. 1001, 1:55–60
`
`(emphasis added), Fig. 3, 6:6–32 (describing using the voltages on the USB D+
`
`or D- lines to detect a device); Ex. 1012 ¶ 124.)
`
`The ’103 patent further admits that it was known that the peripheral
`
`device in the prior art can have a first configuration. (Ex. 1012 ¶ 125; Ex. 1001,
`
`1:55–2:8.) It specifica