Second Edition
`
`Digital Control
`of Dynamic Systems
`
`Gene F. Franklin
`Stanford University
`J. David Powell
`Stanford University
`Michael L. Workman
`IBM Corporation
`
`.f... ADDISON-WESLEY PUBLISHING COMPANY
`Reading, Massachusetts· Menlo Park, California • New York
`Don Mills, Ontario· Wokingham, England • Amsterdam
`Bonn· Sydney· Singapore· Tokyo· Madrid· San Juan
`
`Micro Motion 1037
`
`1
`
`

`

`Moder
`Richar
`Digital
`Gene I
`Compl
`lohnC
`Feedb.
`Gene I
`Adapti
`JohnJ
`Moder
`Stanle
`
`Many of the designations used by manufacturers and sellers to distinguish their products
`are claimed as trademarks. Where those designations appear in this book, and Addison(cid:173)
`Wesley was aware of a trademark claim, the designations have been printed in initial caps
`or all caps.
`
`The programs and applications presented in this book have been included for their instruc(cid:173)
`tional value. They have been tested with care, but are not guaranteed for any particular
`purpose. The publisher does not offer any warranties or representations, nor does it accept
`any liabilities with respect to the programs or applications.
`
`Library of Congress Cataloging-in-Publication Data
`Franklin, Gene F.
`Digital control of dynamic systems / Gene F. Franklin, J. David
`Powell, Michael L. Workman. 2nd ed.
`p. cm.
`Bibliography: p.
`Includes index.
`ISBN 0-201-11938-2
`1. Digital control systems. 2. Dynamics. I. Powell, J. David.
`II. Workman, Michael L. III. Title.
`TJ223.M53F731990
`629.8-dc20
`
`89-32967
`CIP
`
`Reprinled with corrections June, 1990
`
`Copyright © 1990, 1980 by Addison-Wesley Publishing Company, Inc. All rights reserved.
`No part of this publication may be reproduced, stored in a retrieval system, or transmit(cid:173)
`ted, in any form or by any means, electronic, mechanical, photocopying,
`recording, or
`otherwise, without the prior written permission of the publisher. Printed in the United
`States of America.
`
`BCDEFGHIJ-DO-943210
`
`2
`
`

`

`CHAPTER 1
`
`Introduction
`
`1.1 PROBLEM DEFINITION
`The control of physical systems with a digital computer is becoming more
`and more common. Aircraft autopilots, mass-transit vehicles, oil refineries,
`paper-making machines, and countless electromechanical servomechanisms
`are among the many existing examples. Furthermore, many new digital
`control applications are being stimulated by microprocessor technology in(cid:173)
`cluding control of various aspects of automobiles and household appliances.
`Among the advantages of digital logic for control are the increased flexibility
`of the control programs and the decision-making or logic capability of digital
`systems, which can be combined with the dynamic control function to meet
`other system requirements.
`The digital controls studied in this book are for closed-loop (feedback)
`systems in which the dynamic response of the process being controlled ~s a
`major consideration in the design. A typical topology of the elementary type
`of system that will occupy most of our attention is sketched schematically in
`Fig. 1.1. This figure will help to define our basic notation and to introduce
`several features that distinguish digital controls from those implemented
`with analog devices. The process to be controlled is called the plant and
`may be any of the physical processes mentioned above whose satisfactory
`response requires control action.
`By "satisfactory response" we mean that the plant output, y(t), is to be
`forced to follow or track the reference input, r(t), despite the presence of
`disturbance inputs to the plant [w(t) in Fig. 1.1] and despite errors in the
`sensor [represented by v(t) in Fig. 1.1]. It is also essential that the tracking
`succeed even if the dynamics of the plant should change somewhat during
`
`1
`
`3
`
`

`

`2
`
`CHAPTER 1 INTRODUCTION
`
`r(kD +
`--+ !; }-----~
`
`y(kD
`
`w(t)
`
`y(t)
`
`v(t)
`
`Notation:
`r = reference or command inputs
`u = control or actuator input signal
`controlled or output signal
`y
`y = instrument or sensor output, usually an approximation to or estimate
`of y. (For any' variable, say e, the notation & is now commonly taken
`from statistics to mean an estimate of e.)
`e = r-y
`indicated error
`r-y = system error
`e
`= disturbance input to the plant
`w
`= disturbance or noise in the sensor
`v
`A/D
`analog-to-digital converter
`0/ A = digital-to-analog converter
`
`Figure 1.1 Block diagram of a basic control system.
`
`the operation. The process of holding y(t) close to r(t), including the case
`where r == 0, is referred to generally as the process of regulation. A system
`that has good regulation in the presence of disturbance signals is said to
`have good disturbance rejection. A system that has good regulation in the
`face of changes in the plant parameters is said to have low sensitivity to
`these parameters. A system that has both good disturbance rejection and
`low sensitivity we call robust.
`The means by which robust regulation is to be accomplished is through
`the control inputs to the plant [u(t) in Fig. 1.1]. It was discovered long agol
`that a scheme offeedback wherein the plant output is measured (or sensed)
`and compared directly with the reference input has many advantages in the
`effort to design robust controls over systems that do not use such feedback.
`Much of our effort in later parts of this book will be devoted to illustrating
`this discovery and demonstrating how to exploit the advantages of feedback.
`However, the problem of control as discussed thus far is in no way restricted
`
`1 See especially the book by Bode (1945).
`
`sari
`
`als(
`At
`of,
`(i.e
`rep
`the
`wit
`thE
`WE
`qu,
`0.1
`is i
`
`4
`
`

`

`1.1 PROBLEM DEFINITION
`
`3
`
`to digital controL For that we must consider the unique features of Fig. 1.1
`introduced by the use of a digital device to generate the control action.
`We consider first the action of the analog-to-digital (A/D) converter on a
`signal. This device acts on a physical variable, most commonly an electrical
`voltage, and converts it into a stream of numbers. In Fig. 1.1, the A/D
`converter acts on the sensor output and supplies numbers to the digital
`computer. It is common for the sensor output, y, to be sampled and to have
`the error formed in the computer. We need to know the times at which these
`numbers arrive if we are to analyze the dynamics of this system.
`In this book we will make the assumption that all the numbers arrive
`with the same fixed period T, called the sampling period. In practice, digi(cid:173)
`tal control systems sometimes have varying sample periods and/or different
`periods in different feedback paths. Usually there is a clock as part of the
`computer logic which supplies a pulse or interrupt every T seconds, and
`the A/D converter sends a number to the computer each time the interrupt
`arrives. An alternative implementation is simply to access the A/D upon
`completion of each cycle of the code execution, a scheme often referred to
`as free running. In the first case the sample period is precisely fixed; in the
`latter case the sample period is essentially fixed by the length of the code,
`providing no logic branches are present that could vary the amount of code
`executed. Thus in Fig. 1.1 we identify the sequence of numbers into the com(cid:173)
`puter as e{kT). We conclude from the periodic sampling action of the A/D
`converter that some of the signals in the digital control system, like e(kT),
`are variable only at discrete times. We call these variables discrete signals
`to distinguish them from variables like wand y, which change continuously
`in time. A system having both discrete and continuous signals is called a
`sampled-data system.
`. In addition to generating a discrete signal, however, the A/D converter
`also provides a quantized signal. By this we mean that the output of the
`A/D converter must be stored in digital. logic composed of a finite number
`of digits. Most commonly, of course, the logic is based on binary digits
`(Le., bits) composed of O's and l's, but the essential feature is that the
`representation has a finite number of digits. A common situation is that
`the conversion of y to Y is done so that y can be thought of as a number
`with a fixed number of places of accuracy. If we plot the values of y versus
`the resulting values of y we can obtain a plot like that shown in Fig. 1.2.
`We would say that y has been truncated to one decimal place, or that y is
`quantized with a q of 0.1, since y changes only in fixed quanta of, in this case,
`0.1 units. (We will use q for quantum size, in general.) Note that quantization
`is a nonlinear function. A signal that is both discrete and quantized is called
`
`le case
`5ystem
`laid to
`in the
`vity to
`In and
`
`trough
`~ ago1
`msed)
`in the
`[back.
`~ating
`lback.
`dcted
`
`5
`
`

`

`4
`
`CHAPTER 1 INTRODUCTION
`
`y
`0.5
`0.4
`0.3
`0.2
`
`-0.4
`-0.5
`
`Figure 1.2 Plot of output versus input characteristics of the AID converter.
`
`a digital signal. Not surprisingly, digital computers in this book process
`digital signals.
`In a real sense the problems of analysis and design of digital controls
`are concerned with taking account of the effects of the sampling period T
`and the quantization size q. If both T and q are extremely small (sampling
`frequency 50 or more times the system bandwidth with a 16-bit word size),
`digital signals are nearly continuous, and continuous methods of analysis and
`design can be used. The resulting design could be converted to the digital
`format for implementation by using the emulation method described in
`Chapter 5. We will be interested in this text in gaining an understanding of
`the effects of all sample rates, fast and slow, and the effects of quantization
`for large and small word sizes. Many systems are originally conceived with
`fast sample rates, and the computer is specified and frozen early in the
`design cycle; however, as the designs evolve, more demands are placed on the
`system, and the only way to accommodate the increased computer load is to
`slow down the sample rate. Furthermore, for cost-sensitive digital systems,
`the best design is the one with the lowest cost computer that will do the
`required job. That translates into being the computer with the slowest speed
`and the smallest word size. We will, however, treat the problems of varying
`T and q separately. We first consider q to be zero and study discrete and
`sampled-data (combined discrete and continuous) systems that are linear.
`In Chapter 7 we will analyze in more detail the source and the effects of
`quantization, and we will discuss in Chapters 5 and 10 specific effects of
`sample-rate selection.
`It is worthy to note that the single most important impact of imple(cid:173)
`menting a control system digitally is the delay associated with the D / A
`
`converteJ
`the next
`u(t) com
`as shown
`. delay in;
`for man~
`Chapterl
`Our
`in conti!
`continuo
`ginning,
`experien
`viewpoiI
`ingful tl:
`review t
`
`1.2 EJ
`In order
`models
`is a satE
`the dou
`
`This ex
`transfel
`
`6
`
`

`

`1.2 EXAMPLE SYSTEMS FOR STUDY
`
`5
`
`u
`
`3
`
`4
`
`5
`
`6
`
`7
`
`8
`
`kT
`
`Figure 1.3 The delay due to the hold operation.
`
`converter. Each value of u(kT) in Fig. 1.1 is typically held constant2 until
`the next value is available from the computer. Thus the continuous value of
`u(t) consists of steps (see Fig. 1.3) that, on the average, lag u(kT) by T/2,
`as shown by the dashed line in the figure. If one simply incorporates this T /2
`delay in a continuous analysis of a digital system, excellent agreement results
`for many reasonable sample rates. This point will be explained further in
`Chapters 3 and 5.
`Our approach to the design of digital controls is to assume a background
`in continuous systems and to relate the comparable digital problem to its
`continuous counterpart. We will develop the essential results, from the be(cid:173)
`ginning, in the domain of discrete systems, but we will call upon previous
`experience in' continuous-system analysis and in design to give alternative
`viewpoints and deeper understa!lding of the results. In order to make mean(cid:173)
`ingful these references to a background in continuous-system design, we will
`review the concepts and define our notation as required .
`
`1.2 ~EXAMPLE SYSTEMS FOR STUDY
`In order to guide the discussion in the following chapters we have developed
`models for six example control problems in Appendix A. The first of these
`is a satellite attitude control problem in which the plant transfer function is
`the double integrator
`
`This example is simple, but with two poles on the stability boundary, this
`transfer function must be controlled with care. The second example is a
`
`2Called a Zero Order Hold or ZOH.
`
`(1.1)
`
`;er.
`
`ocess
`
`ltrols
`3d T
`pIing
`,ize) ,
`; and
`gital
`~d in
`llg of
`ttion
`with
`. the
`1 the
`is to
`ems,
`• the
`peed
`ying
`and
`lear.
`es of
`;s of
`
`lple(cid:173)
`)/A
`
`7
`
`

`

`222 CHAPTER 5 DESIGN USING TRANSFORM TECHNIQUES
`
`in the fact that the control response is determined from
`
`ll(z)
`[T(z)
`1)
`R(z) = 1 + 1)G = G(z)'
`
`which for this example is
`
`[T(z)
`R(z) = 13.06 z2
`
`~---
`
`z - 0.0793
`0.7859z + 0.3679
`
`(z - l)(z - 0.9048)
`z + 0.9672
`
`There is a root at z = -0.9672!. This is the source of the oscillation in the
`control response, but it did not show up in the output response because it
`was exactly canceled by a zero. The control oscillation causes the "intersam(cid:173)
`pIe ripple" in the output response, and the designer should be alert to this
`if poorly behaved roots arise in the control response. An actual prediction
`of the output intersample ripple based on linear analysis was not possible
`with the z-transform method described so far; rather, one would need to
`apply the "modified z-transform," which is beyond the scope of this text.
`Alternatively, one can use a CAD simulation to find such oscillations quite
`easily, as was done here. To avoid this oscillation, we could introduce another
`term in ll(z), b3z-3, and require that ll(z) be zero at z = -0.9672, so this
`zero of G(z) is not canceled by 1)(z). The result will be a simpler 1)(z) with
`a slightly more complicated 1l (z). However, rather than pursue this method
`further, we will wait until the more powerful method of pole assignment
`by state-variable analysis is developed in the next chapter, where computer
`algorithms are more readily provided.
`
`5.8 PID CONTROL
`Just as in continuous systems, there are three basic types of control: Propor(cid:173)
`tional, Integral, and Derivative, hence the name, PID. In the design exam(cid:173)
`ples so far, we have been using the discrete equivalent of lead compensation,
`which is essentially a combination of proportional and derivative controL Let
`us now review these three controls as they pertain to a discrete implementa(cid:173)
`tion. The term PID is widely used because there are commercially available
`modules that have knobs for the user to turn that set the values of each of
`the three control types.
`
`5.8.1
`A dis(
`that i
`
`the di
`
`where
`
`5.8.2
`For cc
`
`where
`in the
`
`u(k) ==
`
`In
`tive co
`
`or, eqt
`
`which
`in the
`the pc
`for th,
`repres(
`the dL
`pole IT
`
`8
`
`

`

`5.8 PID CONTROL
`
`223
`
`5.8.1 Proportional Control
`
`A discrete implementation of proportional control is identical to continuous;
`that is, where the continuous is
`
`the discrete is
`
`u(k) = Kpe(k) ~ I D(z) = Kp I
`where e(t) is the error signal as shown in Fig 5.2.
`
`5.8.2 Derivative Control
`
`For continuous systems, derivative or rate control has the form
`
`where TD is called the derivative time. Differentiation can be approximated
`in the discrete domain as the first difference, that is,
`
`u(k) = KpTD (e(k) - e(k - 1))
`T
`
`In many designs, the compensation is a sum of proportional and deriva(cid:173)
`tive control (or PD control). In this case, we have
`
`or, equivalently,
`
`ID(Z)=Kz-al
`I
`z
`
`which is similar to the lead ~pmpensations that have been used in the designs
`in the previous sections. The difference is that the pole is at z = 0, whereas
`the pole has been placed at various locations along the z-plane real axis
`for the previous designs. In the continuous case, pure derivative control
`represents the ideal situation in that there is no destabilizing phase lag from
`the differentiation, or, equivalently, the pole is at s = -00. This s-plane
`
`pole maps into z = ° for discrete rate control; however, the z = 0 pole does
`
`9
`
`

`

`224 CHAPTER 5 DESIGN USING TRANSFORM TECHNIQUES
`
`add some phase lag because of the necessity to wait for one cycle in order
`to compute the first difference. Any other stable pole location, whether on
`the positive or negative real axis, would also have some delay or phase lag
`associated with it for the same reason.
`
`5.8.3 Integral Control
`
`For continuous systems, we integrate the error to arrive at the control,
`
`K it
`
`u(t) = J..
`TI
`
`to
`
`.
`
`e(t)dt =} D(s)
`
`where TI is called the integral, or reset time. The discrete equivalent is to
`sum all previous errors, yielding
`
`u(k) = u(k 1)+ ;1 e(k) =} D(z) =
`KT
`
`Just as for continuous systems, the primary reason for integral control is to
`reduce or eliminate steady-state errors, but this typically occurs at the cost
`of reduced stability.
`
`5.8.4 PID Control
`
`Combining all the above yields the PID controller
`
`D(z) Kp (1 + Tz + TD(Z -1)) .
`
`TI(Z - 1)
`
`Tz
`
`(5.61)
`
`This form of control law is able satisfactorily to meet the specifications for
`a large portion of control problems and is therefore paclG:tged commercially
`and sold for general use. The user simply has to determine the best values
`of K p , TD, and TI.
`
`5.8.5 Ziegler-Nichols PID Tuning
`
`The parameters in the PID controller could be selected by any of the design
`methods previously discussed. However, these methods require a dynamic
`model of the process which is not always readily available. Ziegler-Nichols
`tuning is a method for picking the parameters based on fairly simple exper(cid:173)
`iments on the process and thus bypasses the need to determine a complete
`dynamic model.
`
`t
`I
`
`f
`c
`a
`t
`
`c
`t:
`p
`d
`r.
`Ie
`
`10
`
`

`

`10.6 MEASUREMENT NOISE AND ANTIALIASING FILTERS
`
`501
`
`In summary, for the ideal case where the plant parameters are known
`exactly, there is no effect of sample rate on bending-mode damping or any
`other closed-loop dynamic characteristic. On the other hand, if there is some
`error between the plant parameters used for the controller design and the
`actual plant parameters, there will be an error in the desired closed-loop
`characteristics that increases with the sample period. In most cases, the use
`of reduced performance requirements or of robust design practice such as
`shown by the example can reduce the error to acceptable levels and thus
`does not impose extra criteria on the sample rate. However, sensitivity of
`the system to off-nominal parameters should be evaluated, and in some cases
`it might be necessary to design specifically for reduced sensitivity and, in
`rare cases, to increase the sample rate over that suggested by other consid(cid:173)
`erations.
`
`10.6 MEASUREMENT NOISE AND
`ANTIALIASING FILTERS
`In addition to the random plant disturbances., w, that were evaluated in
`Section 10.4, there are usually some errors in the measurement as indicated
`by v in (9.55). In this section, we wish to examine the effect of the sample
`rate on the response of the system to measurement errors. These errors are
`affected significantly by the presence of analog filters (called antialiasing
`jilters or prejilters) , which are typically placed between an analog sensor
`and the sampler in order to reduce aliasing of high-frequency components
`of the signal. Therefore, we will discuss antialiasing filters as well.
`Figure 10.11 depicts the typical arrangement of the antialiasing filter.
`Digital control systems are arranged this way for many cases in order to
`prevent the aliasing of the higher-frequency components of v. Exceptions
`are those cases where the sensor is fundamentally digital so that there is no
`analog signal that can contain high frequency noise; for example, an optical
`encoder provides a digitized signal directly. Antialiasing filters are low pass,
`and the simplest transfer function is5
`
`G (s)=~,
`s +wp
`p
`
`(10.16)
`
`5Higher-order filters are also used in order to obtain better high-frequency attenua(cid:173)
`tion with minimal low-frequency phase lag; common filter types are Bessel, Butter(cid:173)
`worth, and ITAE. See Franklin, Powell, and Emami-Naeini (1986) or Astrom and
`Wittenmark (1984) for details.
`
`11
`
`

`

`502
`
`CHAPTER 10 SAMPLE RATE SELECTION
`
`y
`
`Analog
`antialiasing
`filter
`
`T
`
`Figure 10.11 Block diagram showing the location of the antialiasing filter.
`
`so that the noise above the prefilter breakpoint [wp in (10.16)] is attenuated.
`The design goal is to provide enough attenuation at half the sample rate
`(w s /2) so that the noise above ws /2, when aliased into lower frequencies by
`the sampler, will not be detrimental to the control-system performance. The
`basic idea of aliasing was discussed in Section 3.3 and shown to be capable of
`transforming a very-high-frequency noise into a frequency that is well within
`the bandwidth of the control system, thus allowing the system to respond
`to it.
`
`the
`Example 10.6: Figure 10.12 shows how aliasing can affect
`sampled values of a signal and how prefiltering helps the situation.
`The plot in Fig. 10.12(a) is a I-Hz sine wave with a 60-Hz sine wave
`superimposed to represent measurement noise. If this analog signal is
`sampled as is, the high-frequency noise will be aliased; Fig. 10.12(b)
`shows the results for sampling at W s = 28 Hz and we see that the 60(cid:173)
`Hz noise has been changed to a much lower frequency and appears as
`a distortion of the original sine wave. Fig. 10.12(c) shows the results
`of passing the noisy signal in (a) through a first order antialiasing
`filter with a breakpoint, wp = 20 rad/sec (3.2 Hz). There is a large
`attenuation of the noise because the breakpoint is considerably below
`the noise frequency. Sampling this clean signal results in the faithful
`reproduction of the signal shown in Fig. 10.12(d).
`For an analog control system with a bandwidth on the order of
`1 Hz, the 60-Hz noise would be too fast for the system to respond,
`and the noise would not be apparent on the system output. For a
`I-Hz bandwidth digital control system without an analog prefilter,
`aliasing of the noise to a lower frequency as shown in Fig. 10.12(b)
`
`12
`
`

`

`10.6 MEASUREMENT NOISE AND ANTIALIASING FILTERS
`
`503
`
`o
`(a)
`
`0.5
`
`1.5
`
`Time (sec)
`
`o
`(c)
`
`0.5
`
`1.5
`
`Time (sec)
`
`o
`(h)
`
`0.5
`
`1.5
`
`2
`
`Time (sec)
`
`o
`(eI)
`
`0.5
`
`1.5
`
`2
`
`Time (sec)
`
`Figure 10.12 Demonstration of the effects of an antialiasing filter or prefilter,
`Example 10.6. (a) Signal plus noise; (b) signal in (a) sampled at W s = 28Hz; (c)
`signal in (a) passed through antialiasing filter; (d) sampling of signal in (c).
`
`thus producing sensitivity to
`would allow the system to respond,
`errors that do not exist for analog controllers. Thus we see the reason
`for using antialiasing filters.
`
`To study the effect of sensor noise on sample-rate selection, we use
`the same analysis procedures that were used for the random plant distur(cid:173)
`bances. Equation (10.5) is used to determine the system output errors due
`to continuous-measurement noise acting on a continuous controller for com(cid:173)
`parison purposes, and then (10.6) is used to determine the degradation for
`digital controllers with various sample rates. The only difference from the
`cases examined in Section 10.4 is that the noise enters on the plant output
`instead of on the plant input, and thus G 1 will be changed. A complication
`arises, however, because the prefilter breakpoint, wp , is a design variable
`whose selection is intimately connected with the sample rate. It is therefore
`necessary to examine both quantities simultaneously.
`A conservative design procedure is to select the breakpoint and Ws suf(cid:173)
`ficiently higher than the system bandwidth so that the phase lag from the
`prefilter does not significantly alter the system stability; thus the prefilter
`can be ignored in the basic control system design. Furthermore, for a good
`
`13
`
`

`

`504
`
`CHAPTER 10 SAMPLE RATE SELECTION
`
`reduction in the high-frequency noise at ws /2, the sample rate should be
`selected about five times higher than the prefilter breakpoint. The impli(cid:173)
`cation of this prefilter design procedure is that sample rates need to be on
`the order of 30 to 50 times faster than the system bandwidth. This kind of
`conservative prefilter and sample-rate design procedure is likely to suggest
`that the sample rate needs to be higher than the other factors discussed in
`this chapter.
`An alternative design procedure, due to Peled (1978), is to allow sig(cid:173)
`nificant phase lag from the prefilter at the system bandwidth and thus to
`require that the control design be carried out with the analog prefilter char(cid:173)
`acteristics included. Furthermore, the analysis procedure described above is
`carried out to determine more precisely what the effect of sampling is on
`the system performance. This procedure allows us to use sample rates as
`low as 10 to 30 times the system bandwidth, but at the expense of increased
`complexity in the design procedure. In addition, some cases can require
`increased complexity in the control implementation to maintain sufficient
`stability in the presence of prefilter phase lag; that is, the existence of the
`prefilter might, itself, lead to a more complex digital control algorithm.
`
`Example 10.7: To illustrate, we use the double integrator plant
`as used in Examples 10.1, 10.2, and 10.3. However, in this case we
`assume that only the attitude is available for measurement and the
`controller will contain an estimator to reconstruct the state. The an(cid:173)
`tialiasing filter is as shown in (10.16). The results of the digital con(cid:173)
`trollers with the various prefilter breakpoints, wp , were all normalized
`to the results from a continuous controller with no prefilter. The ex(cid:173)
`act evaluation of the integral in (10.7) was required because the sam(cid:173)
`ple rate was on the same order as wp for some sample rates studied.
`The continuous system was designed using the LQR and LQE meth(cid:173)
`ods of Chapter 9 so that the control roots were at 8 = -1.5 ± j1.5
`rad/sec and the estimator roots were at 8 = -3.3 ±j3.3 rad/sec. All
`the digital controllers had roots at the discrete equivalent of those 8(cid:173)
`plane locations by using z = esT. The results of the normalized rms
`values of the attitude error due to white continuous-measurement
`noise entering the system as shown in Fig. 10.11 are shown in Fig.
`10.13 for four different values of the prefilter breakpoint.
`Note in the figure that, for sampling multiples below Ws/Wb = 40,
`the performance improves as the prefilter breakpoint decreases, even
`though it includes the case where the breakpoint is only twice the
`bandwidth. If a system is dominated by measurement noise as in this
`
`l
`
`s
`
`14
`
`

`

`10.6 MEASUREMENT NOISE AND ANTIALIASING FILTERS
`
`505
`
`Uj)/Wh =20
`Wp/wh=IO
`wp /wh = 5
`=2
`W
`p
`
`102
`10'
`Sampling multiple, ~~ /wh
`Figure 10.13 Root mean square response of Example 10.7 to white sensor noise
`showing effects of prefiltering, wp , and sampling, W S '
`
`10 J
`
`example and the designer chooses to limit the discrete degradation
`to 20% compared to the continuous case, the figure shows that a
`sampling multiple of
`
`(10.17)
`
`is adequate providing the prefilter breakpoint ratio Wp/Wb = 5,
`whereas a sampling multiple of Ws/Wb = 40 is required if the more
`conservative prefilter breakpoint ratio of Wp/Wb = 10 i~ used. An
`even slower sample rate would be adequate if a slower breakpoint
`was acceptable.
`Also note in the figure at the very fast sample rates (Ws/Wb > 200)
`that the rms response decreased as the prefilter breakpoint increased,
`the opposite trend to that at the lower sample rates. This observation
`has little effect on the overall design because all values were within
`10% of the continuous case for all the fast sample rates. However,
`there are detrimental effects of prefilters that can be more serious,
`(see Hirata, 1989) and their influence on random plant disturbances
`should also be evaluated according to Section 10.4 before a design is
`finalized.
`
`15
`
`

`

`506
`
`CHAPTER 10 SAMPLE RATE SELECTION
`
`In summary, there are two main conclusions. The first is that prefilters
`for removing measurement noise are effective; a methodology has been pre(cid:173)
`sented for their design. The second is that the bandwidth of the prefilter
`should be selected primarily for the reduction of sensor noise effects, and
`values approaching the system closed-loop bandwidth (Wp/Wb ~ 2) should
`be considered even though their phase lag needs to be adjusted for in the
`controller design. An exception to this would occur if the prefilter lag was
`sufficient to require a more complicated controller, because this increase in
`computation could offset any gains from slower sampling.
`
`10.7 MULTIRATE SAMPLING
`In multi-input, multi-output (MIMO) systems, it is sometimes useful to use
`different sample rates on the various measurements and control variables. For
`example, in the tape-drive design in Chapter 9, one could logically sample
`the tension measurement, Te in Fig. 9.17, faster than the tape position mea(cid:173)
`surement, X3, because the tension results from faster natural dynamics than
`the tape positioning. In the paper-machine example in Chapter 9, the air
`control changes faster than the stock control, thus suggesting that one might
`wish to output the air control command with a faster sample rate than the
`stock control. For MIMO systems with significant time constant differences
`in some natural modes or control loops, improvements in performance can
`be realized by sampling at different rates; such a system is referred to as a
`multirate (MR) system. In this section we will address the issues of analysis
`of a MR system and selection of the sample rates.
`The z-transform method that is presented in Chapter 2 and is the basis
`for the analysis of discrete systems throughout this book does not apply to
`MR systems. Considerable research on the subject was carried out in the
`1950s and resulted in the "switch decomposition" method, which has been
`reviewed by Ragazzini and Franklin (1958) and Amit (1980) and extended
`to multivariable systems by Whitbeck and Didaleusky (1980). The key idea
`in this method is that it is possible to analyze a MR system by reducing it
`to an equivalent single-rate system operating at the longest sample period
`of the system. The "Krane" operator6 facilitates this transformation and
`has been relied on in the multirate CAD routines use by Program CC (see
`KRANC in Table E.1).
`Another approach uses a state-space description due to Kalman and
`Bertram (1959). The difference equations have coefficients in q> and I' that
`
`6See Krane (1957).
`
`16
`
`

`

`654
`CHAPTER 12 APPLICATION OF DIGITAL CONTROL
`
`
`
`
`
`Referred to as analog I/O, A/D’s and D/A’s form a basic part of the
`digital control system. In almost all applications of A/D converters, the
`
`
`sample and hold device allows the analog signal to be held at a constant value
`
`
`(sampled) while the A/ D converts the signal to a binary representation. Once
`the conversion is complete, the sample and hold circuit is taken out of the
`
`
`hold mode and allowed to track or follow the input signal. It is for this reason
`that sample and,hold devices are often referred to as track-and-holds. When
`
`
`switched from sample to hold (via a logic or control signal), the value of the
`analog input is represented as charge stored on a capacitor, and the charge
`
`
`is held as constant as possible while in the hold ‘mode (see Chapter 3).
`
`
`As long as a number remains at the input of a D/ A converter, the output
`voltage will remain at the corresponding value. If the number is changed,
`
`
`the output changes accordingly. Thus, if the D / A contains an input register
`or latch, once the register is loaded the output signal will correspond to that
`
`
`number until the register is changed. D/ A converters with latches are often
`referred to as latching D/A’s. Latching D/A converters are very common
`in small microprocessor systems.
`In the rest of this section, we will discuss some additional characteristics
`of analog I/O devices which are of import to the control system designer.
`
`
`
`
`
`
`
`
`A/D Converter Specifications. A brief description of the features and
`characteristics of an A /D converter will provide the reader with basic un-
`derstanding of the nature of obtaining digitized representations of analog
`
`
`signals. An abreviated data sheet for an A/D converter is contained in Ap-
`pendix