`
`Th is claim ch artm aps som e ofth e claim s ofU.S. PatentNo. 6,49 3,770 (‘770
`patent)to Anch or Ch ips’EZ -USB product(e.g., partno. AN2131xx)and to
`Cypress’EZ -USB FX product(e.g., partno. CY7C646xx).
`
`Anch or Ch ips’EZ -USB: Th e EZ -USB Integrated Circuit
`(IC)is a solution for h igh -speed USB periph eraldevices (i.e.,
`USB periph erals)th atare attach ed to a h ostPC th rough a
`USB port.
`
`CLAIM 1
`1. A system for
`reconfiguring a
`periph eral
`device h aving a
`first
`configuration
`connected by a
`com puter bus to
`a h ostcom puter,
`th e system
`com prising:
`
`Ex. 2025, pp. 2.
`
`1
`
`Exhibit 2024 - Page 01 of 21
`
`
`
`Ex. 2025, pp. 4.
`
`Th e USB periph eralw ith th e EZ -USB IC h as an initial
`configuration upon start-up.
`
`Ex. 2025, p. 5.
`
`Cypress’EZ -USB FX: Th e EZ -USB FX ch ip is a com pact
`IC th atprovides a h igh ly integrated solution for a USB
`periph eraldevice.
`
`Ex. 2032, pp. 29 (docum entpage 1-1).
`
`A USB periph eraldevice can attach to a h ostcom puter
`th rough a USB bus and connector (e.g., h aving pins D+ and
`D–).
`
`2
`
`Exhibit 2024 - Page 02 of 21
`
`
`
`Ex. 2032, pp. 30 (docum entpage 1-2).
`
`Ex. 2032, pp. 33 (docum entpage 1-5).
`
`Th e USB periph eraldevice w ith th e EZ -USB FX IC h as an
`initialconfiguration (e.g., upon pow er-on).
`
`Ex. 2032, pp. 85 (docum entpage 5-1).
`
`Anch or Ch ips’EZ -USB: Th e EZ -USB IC includes one or
`m ore circuits to dow nload inform ation for a second
`configuration from th e h ostPC into th e USB periph eralover
`th e USB bus. For exam ple, in th e figure below , th e Anch or
`Sm artUSB Engine Core is coupled to th e USB bus (w h ich
`includes th e D+ and D- lines)and includes one or m ore
`circuits configured to dow nload inform ation from th e h ost
`PC.
`
`a firstcircuit
`configured to
`dow nload
`inform ation for
`a second
`configuration
`from th e h ost
`com puter into
`th e periph eral
`
`3
`
`Exhibit 2024 - Page 03 of 21
`
`
`
`device over th e
`com puter bus;
`and
`
`Ex. 2025, pp. 1.
`
`Th e circuits connected to th e USB bus are configured to
`dow nload second configuration inform ation from th e h ostPC
`to th e USB periph eralover th e USB bus.
`
`Ex. 2025, pp. 5.
`
`Cypress’EZ -USB FX: Th e EZ -USB FX IC includes one or
`m ore circuits to dow nload inform ation for a second
`configuration from th e h ostcom puter into th e USB periph eral
`over th e USB bus. For exam ple, in th e figure below , th e
`SerialInterface Engine (SIE)is coupled to th e USB bus over
`
`4
`
`Exhibit 2024 - Page 04 of 21
`
`
`
`a USB connector and includes one or m ore circuits
`configured to dow nload inform ation from th e h ostcom puter.
`
`Ex. 2032, pp. 30 (docum entpage 1-2).
`
`Anch or Ch ips’EZ -USB: Th e EZ -USB IC includes one or
`m ore circuits to electronically sim ulate a ph ysical
`disconnection and reconnection ofth e periph eraldevice over
`th e USB bus. For exam ple, in th e figure below , th e Anch or
`Sm artUSB Engine Core includes one or m ore circuits
`configured to sim ulate a ph ysicaldisconnection and
`reconnection after th e second configuration is dow nloaded in
`RAM .
`
`a second circuit
`configured to
`electronically
`sim ulate a
`ph ysical
`disconnection
`and
`reconnection of
`th e periph eral
`device to
`reconfigure th e
`periph eral
`device to said
`second
`configuration
`
`5
`
`Exhibit 2024 - Page 05 of 21
`
`
`
`w h ile supplying
`electricalpow er
`to said
`periph eral
`device.
`
`Ex. 2025, p. 1.
`
`Th e EZ -USB IC’s USB Engine Core sim ulates a ph ysical
`disconnectand re-connectand th e h ostPC recognizes
`attach m entofth e new USB periph eraldevice w ith th e
`updated second configuration.
`
`Ex. 2025, p. 5.
`
`As partofth e ReNum eration™ process, th e USB periph eral
`is notph ysically disconnected from th e USB bus since th e
`disconnect/reconnectis only sim ulated. Th us, since th e EZ -
`USB IC com plies w ith th e pow er specifications ofUSB, th e
`EZ -USB IC can be supplied w ith up to 220 m W ofpow er
`over th e USB bus during th e sim ulated disconnect/reconnect
`ofReNum eration™ process.
`
`6
`
`Exhibit 2024 - Page 06 of 21
`
`
`
`Ex. 2025, pp. 11.
`
`Cypress’EZ -USB FX: Th e EZ -USB FX IC includes one or
`m ore circuits to electronically sim ulate a ph ysical
`disconnection and reconnection ofth e periph eraldevice over
`th e USB bus. For exam ple, in th e figure below , th e SIE
`includes one or m ore circuits configured to sim ulate a
`ph ysicaldisconnection and reconnection after th e second
`configuration is dow nloaded in RAM .
`
`7
`
`Exhibit 2024 - Page 07 of 21
`
`
`
`Ex. 2032, pp. 30 (docum entpage 1-2).
`
`Ex. 2032, pp. 85 (docum entpage 5-1).
`
`M ore specifically, th ree EZ -USB FX controlbits in th e
`USBCS (USB Controland Status)Register controlth e
`ReNum eration™ process: DISCO N, DISCO E, and RENUM .
`To sim ulate a USB disconnect, th e 8051 (m icroprocessor)
`w rites a specific value to th e USBCS Register. To re-connect
`to th e USB, th e 8051 w rites anoth er specific value to th e
`USBCS Register. A typicaldisconnect/reconnectcircuitis
`illustrated in th e figure below .
`
`8
`
`Exhibit 2024 - Page 08 of 21
`
`
`
`Ex. 2032, pp. 9 5-9 6 (docum entpages 5-11, 5-12).
`
`As partofth e ReNum eration™ process, th e USB periph eral
`is notph ysically disconnected from th e USB bus since th e
`disconnect/reconnectis only sim ulated. Th us, since th e EZ -
`USB FX IC com plies w ith th e pow er specifications ofUSB
`and is configured to receive pow er supplied in th e USB
`connector, th e EZ -USB FX IC is supplied w ith pow er over
`th e USB bus during th e sim ulated disconnect/reconnectof
`ReNum eration™ process.
`
`Ex. 2032, pp. 30 (docum entpage 1-2).
`
`9
`
`Exhibit 2024 - Page 09 of 21
`
`
`
`Anch or Ch ips’EZ -USB: Th e EZ -USB Integrated Circuit
`(IC)is a single-ch ip low -pow er solution for USB periph erals.
`
`CLAIM 5
`5. Th e system
`ofclaim 1,
`w h erein said
`com puter bus
`com prises a
`UniversalSerial
`Bus.
`
`Ex. 2025, pp. 1.
`
`Th e USB periph eral(w ith th e EZ -USB IC)is attach ed to th e
`h ostPC th rough a USB port.
`
`Ex. 2025, pp. 2.
`
`Cypress’EZ -USB FX: Th e EZ -USB FX ch ip is a com pact
`IC th atprovides a h igh ly integrated solution for a USB
`periph eraldevice.
`
`Ex. 2032, pp. 29 (docum entpage 1-1).
`
`10
`
`Exhibit 2024 - Page 10 of 21
`
`
`
`A USB periph eraldevice can attach to a h ostcom puter
`th rough a USB bus and connector (e.g., h aving pins D+ and
`D–).
`
`Ex. 2032, pp. 30 (docum entpage 1-2).
`
`Ex. 2032, pp. 33 (docum entpage 1-5).
`
`11
`
`Exhibit 2024 - Page 11 of 21
`
`
`
`CLAIM 11
`11. A m eth od
`for
`reconfiguring a
`periph eral
`device h aving a
`first
`configuration
`connected by a
`com puter bus to
`a h ostcom puter,
`th e m eth od
`com prising th e
`steps of:
`(A)
`dow nloading
`inform ation for
`a second
`configuration
`from th e h ost
`com puter into
`th e periph eral
`device over th e
`com puter bus;
`and
`(B)
`electronically
`sim ulating a
`ph ysical
`disconnection
`and
`reconnection of
`th e periph eral
`device to
`reconfigure th e
`periph eral
`device to said
`second
`configuration
`
`Anch or Ch ips’EZ -USB: Th e EZ -USB IC is configured to
`perform a m eth od for reconfiguring a USB periph eraldevice
`th atis connected to h ostcom puter. See th e pream ble of
`Claim 1.
`
`Cypress’EZ -USB FX: Th e EZ -USB FX IC is configured to
`perform a m eth od for reconfiguring a USB periph eraldevice
`th atis connected to h ostcom puter. See th e pream ble of
`Claim 1.
`
`See th e firstlim itation ofClaim 1.
`
`See th e second lim itation ofClaim 1.
`
`12
`
`Exhibit 2024 - Page 12 of 21
`
`
`
`See Claim s 1 and 5.
`
`w h ile supplying
`electricalpow er
`to said
`periph eral
`device.
`
`CLAIM 15
`15. Th e m eth od
`ofclaim 11,
`w h erein step
`(A)com prises
`com m unicating
`said inform ation
`for th e second
`configuration to
`th e periph eral
`device over a
`UniversalSerial
`Bus.
`
`13
`
`Exhibit 2024 - Page 13 of 21
`
`
`
`Anch or Ch ips’EZ -USB: Th e EZ -USB Integrated Circuit
`(IC)is a solution for h igh -speed USB periph eraldevices
`(i.e., USB periph erals)th atare attach ed to a h ostPC
`th rough a USB port.
`
`CLAIM 18
`18. A system
`for
`reconfiguring a
`periph eral
`device h aving a
`configuration
`connected by a
`com puter bus to
`a h ostcom puter,
`th e system
`com prising:
`
`Ex. 2025, pp. 2.
`
`Ex. 2025, pp. 4.
`
`Th e USB periph eralw ith th e EZ -USB IC h as a
`configuration upon start-up.
`
`14
`
`Exhibit 2024 - Page 14 of 21
`
`
`
`Ex. 2025, p. 5.
`
`Cypress’EZ -USB FX: Th e EZ -USB FX ch ip is a
`com pactIC th atprovides a h igh ly integrated solution for a
`USB periph eraldevice.
`
`Ex. 2032, pp. 29 (docum entpage 1-1).
`
`A USB periph eraldevice can attach to a h ostcom puter
`th rough a USB bus and connector (e.g., h aving pins D+ and
`D–).
`
`Ex. 2032, pp. 30 (docum entpage 1-2).
`
`15
`
`Exhibit 2024 - Page 15 of 21
`
`
`
`Ex. 2032, pp. 33 (docum entpage 1-5).
`
`Th e USB periph eraldevice w ith th e EZ -USB FX IC h as a
`configuration (e.g., upon pow er-on).
`
`a firstcircuit
`configured to
`detectth e
`periph eral
`device
`connected to th e
`com puter bus;
`and
`
`Ex. 2032, pp. 85 (docum entpage 5-1).
`
`Anch or Ch ips’EZ -USB: Th e h ostPC includes one or
`m ore circuits configured to detectconnection ofth e USB
`periph eralw ith th e EZ -USB IC to th e h ostPC over th e
`USB bus. Se e e.g., Ex. 1013 (USB 1.0 Spec), Sections
`7.1.3, 7.1.4.1, 9 .1.2.
`
`Cypress’EZ -USB FX: Th e h ostcom puter includes one
`or m ore circuits configured to detectconnection ofth e USB
`periph eralw ith th e EZ -USB FX IC to th e h ostcom puter
`over th e USB bus. Se e e.g., Ex. 1013 (USB 1.0 Spec),
`Sections 7.1.3, 7.1.4.1, 9 .1.2.
`
`a second circuit
`configured to
`electronically
`sim ulate a
`ph ysical
`disconnection
`and
`reconnection of
`th e periph eral
`
`Anch or Ch ips’EZ -USB: Th e EZ -USB IC includes one or
`m ore circuits to electronically sim ulate a ph ysical
`disconnection and reconnection ofth e periph eraldevice
`over th e USB bus. For exam ple, in th e figure below , th e
`Anch or Sm artUSB Engine Core includes one or m ore
`circuits configured to sim ulate a ph ysicaldisconnection and
`reconnection after th e second configuration is dow nloaded
`in RAM .
`
`16
`
`Exhibit 2024 - Page 16 of 21
`
`
`
`device to reset
`said
`configuration of
`said periph eral
`device w h ile
`supplying
`electricalpow er
`to said
`periph eral
`device.
`
`Ex. 2025, p. 1.
`
`Th e EZ -USB IC’s USB Engine Core sim ulates a ph ysical
`disconnectand re-connectand th e h ostPC recognizes
`attach m entofth e new USB periph eraldevice w ith th e
`updated second configuration.
`
`Ex. 2025, p. 5.
`
`Th e USB core ofth e EZ -USB IC includes core logic th at
`perform s initialenum eration and code dow nload w h ile
`h olding th e 8051 (m icroprocessor)core in reset.
`
`17
`
`Exhibit 2024 - Page 17 of 21
`
`
`
`Ex. 2025, pp. 5.
`
`As partofth e ReNum eration™ process, th e USB
`periph eralis notph ysically disconnected from th e USB bus
`since th e disconnect/reconnectis only sim ulated. Th us,
`since th e EZ -USB IC com plies w ith th e pow er
`specifications ofUSB, th e EZ -USB IC can be supplied w ith
`up to 220 m W ofpow er over th e USB bus during th e
`sim ulated disconnect/reconnectofReNum eration™
`process.
`
`Ex. 2025, pp. 11.
`
`18
`
`Exhibit 2024 - Page 18 of 21
`
`
`
`Cypress’EZ -USB FX: Th e EZ -USB FX IC includes one
`or m ore circuits to electronically sim ulate a ph ysical
`disconnection and reconnection ofth e periph eraldevice
`over th e USB bus. For exam ple, in th e figure below , th e
`SIE includes one or m ore circuits configured to sim ulate a
`ph ysicaldisconnection and reconnection after th e second
`configuration is dow nloaded in RAM .
`
`Ex. 2032, pp. 30 (docum entpage 1-2).
`
`Ex. 2032, pp. 85 (docum entpage 5-1).
`
`M ore specifically, th ree EZ -USB FX controlbits in th e
`USBCS (USB Controland Status)Register controlth e
`ReNum eration™ process: DISCO N, DISCO E, and
`RENUM . To sim ulate a USB disconnect, th e 8051
`(m icroprocessor)w rites a specific value to th e USBCS
`Register. To re-connectto th e USB, th e 8051 w rites
`anoth er specific value to th e USBCS Register. A typical
`disconnect/reconnectcircuitis illustrated in th e figure
`
`19
`
`Exhibit 2024 - Page 19 of 21
`
`
`
`below .
`
`Ex. 2032, pp. 9 5-9 6 (docum entpages 5-11, 5-12).
`
`Th e EZ -USB FX IC includes a circuitto resetth e 8051
`m icroprocessor ofth e IC, w h ere th e circuitis controlled by
`a program m able register. For exam ple, a loader program
`executing on th e h ostcom puter can w rite th e 0x01 and
`0x00 values to th e CPUCS register to putth e 8051
`m icroprocessor in RESET and to tak e itoutofRESET,
`respectively.
`
`Ex. 2032, pp. 9 0 (docum entpage 5-6).
`
`In oth er w ords, th e internalRESET signalfor th e 8051
`m icrocontroller is notdirectly controlled by th e RESET pin
`on th e EZ -USB FX ch ip, butis controlled by a register bit
`accessible to th e USB h ostcom puter.
`
`20
`
`Exhibit 2024 - Page 20 of 21
`
`
`
`Ex. 2032, pp. 51 (docum entpage 2-7).
`
`As partofth e ReNum eration™ process, th e USB
`periph eralis notph ysically disconnected from th e USB bus
`since th e disconnect/reconnectis only sim ulated. Th us,
`since th e EZ -USB FX IC com plies w ith th e pow er
`specifications ofUSB and is configured to receive pow er
`supplied in th e USB connector, th e EZ -USB FX IC is
`supplied w ith pow er over th e USB bus during th e sim ulated
`disconnect/reconnectofReNum eration™ process.
`
`Ex. 2032, pp. 30 (docum entpage 1-2).
`
`See Claim s 1 and 5.
`
`CLAIM 19
`19 . Th e system
`ofclaim 18,
`w h erein said
`com puter bus
`com prises a
`UniversalSerial
`Bus.
`
`21
`
`Exhibit 2024 - Page 21 of 21
`
`