United States Patent [19J
`Yap
`
`111111111111111111111111111111111111111111111111111111111111111111111111111
`US006073193A
`[11] Patent Number:
`[45] Date of Patent:
`
`6,073,193
`Jun.6,2000
`
`[54] FAIL SAFE METHOD AND APPARATUS FOR
`A USB DEVICE
`
`[75]
`
`Inventor: Kok-Kean Yap, Milpitas, Calif.
`
`[73] Assignee: Cypress Semiconductor Corp., San
`Jose, Calif.
`
`[21] Appl. No.: 08/839,981
`
`[22] Filed:
`
`Apr. 24, 1997
`
`Int. Cl? ...................................................... G06F 13/00
`[51]
`[52] U.S. Cl . .............................. 710/100; 7101131; 714/1;
`714/3
`[58] Field of Search ..................................... 395/280, 180,
`395/181, 182.01, 182.o3, 828, 830; 710/100,
`8, 10, 131; 714/1, 2, 3, 5
`
`[56]
`
`References Cited
`
`U.S. PATENT DOCUMENTS
`
`3,800,090
`3,810,120
`3,864,670
`4,195,351
`4,481,625
`4,775,976
`5,282,166
`5,404,480
`5,471,524
`5,566,296
`5,675,813
`
`3/1974 Malena ...................................... 379/33
`5/1974 Huettner et a!. ..................... 340/172.5
`2/1975 Inoue et a!. .......................... 340/172.5
`3/1980 Barner et a!. ...................... 340/825.05
`11/1984 Roberts et a!. ........................... 370/85
`10/1988 Yokoyama .................................. 371/9
`1/1994 Ozaki ...................................... 365/203
`4/1995 Suzuki .................................... 711/117
`11/1995 Colvin et a!. ........................... 379/200
`10/1996 Ohmori eta!. ......................... 395/180
`10/1997 Holmdahl.
`
`FOREIGN PATENT DOCUMENTS
`
`WO 97/36230 10/1997 WIPO.
`Primary Examiner--Ayaz R. Sheikh
`Assistant Examiner-Aria Etienne
`Attorney, Agent, or Firm-Christopher P. Maiorana, P.C.
`ABSTRACT
`[57]
`
`A method and apparatus for determining and recovering
`from a USB micro-controller busy condition, wherein a
`toggle variable indicative of whether the USB micro(cid:173)
`controller is in the busy condition or not is stored in a
`memory, and a counter is incremented if the toggle variable
`is set. The counter is checked to determine if the counter has
`reached a predetermined count, and if so data lines of the
`USB micro-controller are disconnected from a USB bus
`coupled to the USB micro-controller for a predetermined
`amount of time to cause a USB host computer coupled to the
`USB micro-controller to re-initialize the USB micro(cid:173)
`controller. The memory contains a data structure including
`fields for storing the toggle variable, and a count indicative
`of bow many times the toggle variable has been set for
`implementing the counter. Firmware in the memory includes
`code segments configured to store the toggle variable in the
`data structure, determine if the toggle variable is set, incre(cid:173)
`ment the count field if the toggle variable is set, determine
`if the counter has reached the predetermined count, and
`disconnect the data lines of the processor from the USB bus
`for a predetermined amount of time if the counter has
`reached the predetermined count.
`
`20 Claims, 7 Drawing Sheets
`
`NO
`
`rNCREMENT
`COUNTER
`(e.g., COUNT= COUNT+!,
`seeFig. 5)
`
`300
`
`500
`
`EXHIBIT 1002
`IPR Petition for U.S. Patent No. 6,012,103
`
`

`
`.... =
`
`~
`\C
`~
`~ ....
`......::.
`
`0\
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`
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`N c c c
`~ = ?
`
`~~
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`
`Fig. 1
`
`L------------------------------------------------------------------
`I USB DEVICE
`
`--------------~--------------------------------,
`
`10
`
`. --------------------
`
`I
`1
`
`PERIPHERAL
`
`LOGIC
`
`USB
`
`"'
`
`.....
`
`/Sa
`
`CONTROLLER
`
`MICRO-
`
`USB
`
`L
`
`8
`
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`
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`USB
`
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`
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`......::.
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`~ = ?
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`~~
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`~ = ......
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`•
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`
`Fig. 2
`
`L-------------------------------------------------------------------------------------
`
`USB DEVICE
`
`PERIPHERAL
`
`LOGIC
`
`USB
`
`!8
`
`-f -
`Sa
`
`""
`
`D-
`
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`
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`I GND
`1/0
`
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`
`___________ _,
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`I
`
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`lfl
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`I
`
`S-
`I
`
`1/ I
`S+
`
`I
`
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`
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`vee
`
`J
`
`4
`
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`
`2a
`
`f
`
`I
`I
`I
`I
`I
`I
`I
`I
`
`HOST
`USB
`
`{2
`
`______________________________________________ J( _____________________________________ ,
`
`10
`
`

`
`U.S. Patent
`
`Jun.6,2000
`
`Sheet 3 of 7
`
`6,073,193
`
`r-----------------------------------------------~
`I
`I
`I
`I
`I
`I
`I
`I
`
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`
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`~-------------------------
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`::J:
`
`

`
`U.S. Patent
`
`Jun.6,2000
`
`Sheet 4 of 7
`
`6,073,193
`
`I
`I
`
`I
`
`I
`I
`
`------·
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`
`6g
`
`6f
`
`I FIRMWARE~
`if
`
`Fig. 5
`
`VARIABLE
`
`COUNT
`
`VARIABLE
`TOGGLE
`
`6b
`
`-
`
`6e
`
`f
`
`MEMORY
`
`6
`
`6h
`
`6d
`
`TNTERNAL
`
`LOGIC
`
`RECEIVED
`PACKET
`NAKBIT
`
`6c
`
`CONTROLLER
`
`MICRO(cid:173)
`USB
`
`

`
`U.S. Patent
`
`Jun.6,2000
`
`Sheet 6 of 7
`
`6,073,193
`
`PACKET
`RECEIVED
`BIT SET
`AND
`NAK.
`BIT CLEARED
`(see Fig. 5)
`
`12
`
`RESET
`
`CLEAR TOGGLE
`VARIABLE AND
`COUNTER
`(see Fig. 5)
`
`SET
`TOGGLE
`VARIABLE
`(see Fig. 5)
`
`Fig. 6a
`
`NAK.
`BIT SET
`(see Fig. 5)
`
`

`
`U.S. Patent
`
`Jun.6,2000
`
`Sheet 7 of 7
`
`6,073,193
`
`NO
`
`INCREMENT
`COUNTER
`(e.g., COUNT= COUNT +1,
`see Fig. 5)
`
`300
`
`NO
`
`CLEAR I/0 PIN (or ENB)
`FOR Z MICROSECONDS
`THEN SET I/0 PIN (or ENB)
`(see Figs. 2 and 3)
`
`500
`
`RETURN
`
`FIG. 6b
`
`

`
`6,073,193
`
`1
`FAIL SAFE METHOD AND APPARATUS FOR
`A USB DEVICE
`
`2
`the second method requires additional USB host computer
`operating system overhead to keep track of and recover from
`the USB device brown out condition.
`
`CROSS REFERENCES TO RELATED
`APPLICATIONS
`
`5
`
`SUMMARY OF THE INVENTION
`
`This application may be related to U.S. patent application
`Ser. No. 08/705,807 filed Aug. 30, 1996, entitled "DUAL
`ROM MICROPROGRAMMABLE MICROPROCESSOR
`AND UNIVERSAL SERIAL BUS MICROCONTROLLER
`DEVELOPMENT SYSTEM" Now U.S. Pat. No. 5,859,993,
`and U.S. patent application Ser. No. 08/711,419 filed Aug.
`30, 1996, entitled "MICROCONTROLLER DEVELOP(cid:173)
`MENT SYSTEM AND APPLICATIONS THEREOF FOR
`DEVELOPMENT OF A UNIVERSAL SERIAL BUS 15
`MICROCONTROLLER", both of which are incorporated
`herein by reference.
`
`10
`
`BACKGROUND OF THE INVENTION
`
`Accordingly, one object of the present invention is to
`provide a method and apparatus for recovering from a USB
`device brown out condition which requires no user inter(cid:173)
`vention.
`Another object of the present invention is to provide a
`method and apparatus for recovering from a USB device
`brown out condition which is independent from a USB host
`computer operating system.
`It is another object of the present invention to provide a
`method and apparatus wherein no additional USB host
`computer operating system overhead is required to keep
`track of and recover from a USB device brown out condi(cid:173)
`tion.
`It is also an object of the present invention to provide a
`method and apparatus for recovering from a USB device
`brown out condition without a need to re-boot the USB
`device or physically disconnect and then re-connect the USB
`device.
`It is a further object of the present invention to provide a
`method and apparatus for recovering from a USB device
`brown out condition which requires minimum additional
`hardware and firmware overhead.
`The above and other objects are achieved according to the
`present invention by a providing a method for determining
`and recovering from a processor busy condition, including
`incrementing a counter if a variable indicative of the pro(cid:173)
`cessor busy condition is set, determining if the counter has
`reached a predetermined count, and disconnecting at least
`one of a plurality of data lines of the processor from a bus
`coupled to the data lines for a predetermined amount of time
`if the counter has reached the predetermined count.
`According to a second aspect of the present invention,
`there is provided a device for determining and recovering
`from a processor busy condition, including a means for
`storing a variable indicative of whether or not the processor
`is in the busy condition; a means for incrementing a counter
`if the variable indicative of the processor busy condition is
`45 set; a means for determining if the counter has reached a
`predetermined count; and a means for disconnecting at least
`one of a plurality of data lines of the processor from a bus
`coupled to the data lines for a predetermined amount of time
`if the counter has reached the predetermined count.
`According to a third aspect of the present invention, there
`is provided an apparatus for determining and recovering
`from a processor busy condition, including a memory
`coupled to the processor configured to store a variable
`indicative of whether or not the processor is in the busy
`55 condition; a counter; and one or more devices configured to:
`(a) increment the counter if the variable indicative of the
`processor busy condition is set, (b) determine if the counter
`has reached a predetermined count, and (c) disconnect at
`least one of a plurality of data lines of the processor from a
`60 bus coupled to the data lines for a predetermined amount of
`time if the counter has reached the predetermined count.
`According to a fourth aspect of the present invention,
`there is provided a computer program product, including a
`computer storage medium and a computer program code
`mechanism embedded in the computer storage medium for
`causing a computer to determine and recover from a pro(cid:173)
`cessor busy condition. The computer program code mecha-
`
`20
`
`25
`
`1. Field of the Invention
`This invention relates to a fail safe method and apparatus
`for a Universal Serial Bus ("USB") device, and more
`particularly to a method and apparatus for allowing a USB
`device to recover from a malfunction condition.
`2. Discussion of Background
`USB is a peripheral bus standard that allows computer
`peripherals to be attached to a personal computer without the
`need for specialized cards or other vendor specific hardware
`attachments. The USB standard specifies a common con- 30
`figuration for the connection of well known peripherals,
`such as CD-ROM, tape and floppy disk drives, scanners,
`printers, keyboards, joysticks, mice, telephones, modems,
`etc. to a USB host computer. In addition to well known
`peripheral devices, the USB standard has flexibility to 35
`accommodate less known and newly developed devices,
`such as plug-and-play devices which are automatically con(cid:173)
`figured by the host computer when these devices are added.
`Information about the USB standard, including the USB
`specification vl.O, incorporated herein by reference, for 40
`building USB compliant devices, is currently available free
`of charge over the Internet.
`However, a malfunction condition may occur in a USB
`device, such as a plug-and-play device, wherein the USB
`device after being configured by the host computer may
`malfunction and stop communicating with the host com(cid:173)
`puter due to problems, such as transmission errors, USB
`protocol errors, bugs in the host operating system or device
`firmware, etc. For example, a host operating system may
`terminate the function of the USB device, which may be 50
`busy at the moment or fails to acknowledge incoming data
`packets more than three times, for not communicating with
`the host computer. The above situation is referred to as a
`"brown out" condition.
`According to the USB specification vl.O, page 201, the
`host operating system is supposed to record the last error
`type without trying to re-establish communications with the
`non-communicating USB device. When this occurs, (1) the
`user may have to re-boot the USB device or physically
`disconnect and then re-connect the USB device to allow the
`host computer to recognize and then re-configure the USB
`device, or (2) the host computer operating system must be
`smart enough to avoid terminating the USB device when the
`USB device is terminally busy not communicating (e.g.,
`continuously returning non-acknowledge (NAK) signals) 65
`and reset and re-configure the USB device. The first method
`defeats the whole purpose of plug-and-play technology, and
`
`

`
`6,073,193
`
`3
`nism includes a first computer code segment configured to
`store a variable indicative of whether or not the processor is
`in the busy condition; a second computer code segment
`configured to determine if the variable indicative of the
`processor busy condition is set; a third computer code
`segment configured to increment a counter if the variable
`indicative of the processor busy condition is set; a fourth
`computer code segment configured to determine if the
`counter has reached a predetermined count; and a fifth
`computer code segment configured to disconnect at least one
`of a plurality of data lines of the processor from a bus
`coupled to the data lines for a predetermined amount of time
`if the counter has reached the predetermined count.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`A more complete appreciation of the invention and many
`of the attendant advantages thereof will be readily obtained
`as the same becomes better understood by reference to the
`following detailed descriptions when considered in connec(cid:173)
`tion with the accompanying drawings, wherein:
`FIG. 1 is a block diagram illustrating a USB system
`configuration;
`FIG. 2. is a block diagram illustrating a USB fail safe
`configuration in the system configuration of FIG. 1, accord(cid:173)
`ing to a first embodiment of the present invention;
`FIG. 3. is a block diagram illustrating a USB fail safe
`configuration in the system configuration of FIG. 1, accord(cid:173)
`ing to a second embodiment of the present invention;
`FIG. 4. is a block diagram illustrating details of a USB
`micro-controller of the system configuration of FIG. 1;
`FIG. 5. is a block diagram illustrating details of a USB fail
`safe firmware and hardware configuration in the USB micro(cid:173)
`controller of FIG. 4, according to the present invention;
`FIG. 6a. is a state diagram illustrating details of a USB
`fail safe configuration in the USB micro-controller of FIG.
`5, according to the present invention; and
`FIG. 6b. is a flow chart illustrating details of a USB fail
`safe configuration, according to the present invention.
`
`DESCRIPTION OF THE PREFERRED
`EMBODIMENTS
`
`Referring now to the drawings, wherein like reference
`numerals designate identical or corresponding parts
`throughout the several views, and more particularly to FIG.
`1 thereof, there is illustrated a USB system including a USB
`host computer 2, and a USB device 10, according to the
`present invention.
`In FIG. 1, the USB device 10 includes a USB connector
`4 and a USB micro-controller 6, such as a Cypress Semi(cid:173)
`conductor CY7C6300, etc. The USB device 10 is coupled
`via signal lines Sa to USB peripheral logic 8, such as logic
`for a plug-and-play CD-ROM, tape or floppy disk drive,
`scanner, printer, keyboard, joystick, mouse, telephone,
`modem, etc. The USB host computer 2 is coupled to the
`USB device 10 via signal lines 2a and the USB micro(cid:173)
`controller 6 communicates with the USB host computer 2
`via signal lines 2a and the USB connector 4.
`In FIG. 2, a first embodiment of the USB device 10 of
`FIG. 1 further includes switching devices S+ and S-, such
`as transistors, contact switches, etc., coupled to positive data
`(D+) and negative data (D-) lines of the signal lines 6a.
`Please note that only one pair of complementary data lines
`of a plurality of complementary data lines and vee and
`GND connections are shown in FIG. 2 for simplicity. An
`enable line (or gate in the case of a transistor) of each of the
`
`5
`
`4
`switching devices S+ and S- is coupled to, for example, an
`unused general purpose 1!0 pin of the USB micro-controller
`6. Accordingly, when the USB micro-controller 6 drives the
`1!0 pin to an appropriate logic state, the D+ and D- data
`lines may be opened or shorted via switching devices S+ and
`S-. By disconnecting the D+ and D- data lines via switching
`devices S+ and S-, a physical removal of the USB device 10
`may be simulated in order to allow the USB host to
`re-configure the USB device 10 during a brown out condi-
`10 tion. In addition, the general purpose 1!0 pin of the USB
`micro-controller 6 is configured such that during and after a
`reset condition due to power up the data lines stay connected
`(e.g., the 1!0 pin enables switching devices S+ and S(cid:173)
`during and after reset). Firmware in the USB micro-
`15 controller 6 keeps the data lines connected via switching
`devices S+ and S- during normal operation. However, when
`a brown out condition is detected, as will be described later,
`the USB micro-controller 6 opens the data lines via the
`switching devices S+ and S- for a duration greater than 2.5
`20 micro-seconds and then reconnects them again. This
`procedure, for example, emulates the disconnect and
`re-connect procedure as specified in the USB specification
`vl.O, page 116.
`FIG. 3, is a second embodiment of the USB device 10
`25 wherein the switching devices S+ and S-, of FIG. 2 are
`included within the USB micro-controller 6. In this way, use
`of the general purpose 1!0 pin of the USB micro-controller
`6 is not required. The switching devices S+ and S- are
`coupled to positive (D+) and negative (D-) data lines of the
`30 signal lines 6a and an enable line (or gate in the case of a
`transistor) of each of the switching devices S+ and S- is
`enabled via an internal enable signal ENE of the USB
`micro-controller 6. The internal ENE signal may be
`implemented, for example, by using a bit from an internal
`35 register of internal logic (not shown) of the USB micro(cid:173)
`controller 6 as an enable signal. Otherwise, the operation of
`the circuit of FIG. 3 is identical to the operation of the circuit
`of FIG. 2.
`In FIG. 4, further details of the USB micro-controller 6 of
`40 FIGS. 1-3 are shown. The USB micro-controller 6 includes
`a memory 6b internal to the USB micro-controller 6, and/or
`a memory 6b' external to the USB micro-controller 6. The
`memory 6b is used for storing program information,
`variables, and/or for implementing firmware logic functions
`45 such as counters, state machines, etc. and may be imple(cid:173)
`mented by means of a ROM, RAM, EEPROM, etc., or a
`combination of such memory devices.
`In FIG. 5, further details of the USB micro-controller 6 of
`FIG. 4 are shown. The USB micro-controller 6 includes, for
`50 example, register 6c (e.g., NAK_to_Out bit in the USB
`control register of the CY7C6300) for storing a non(cid:173)
`acknowledge (NAK) bit, register 6d (e.g., Out bit in the USB
`Endpoint 0 RX register of the CY7C6300) for storing a
`packet received bit, and internal logic 6h for performing
`55 other logic functions. The NAK bit is set by the internal
`logic 6h of the USB micro-controller 6 when the USB
`micro-controller 6 is busy and cannot receive a data packet
`from the USB host computer, and the packet received bit is
`set by the internal logic 6h of the USB micro-controller 6
`60 when the USB micro-controller has successfully received a
`data packet from the USB host computer. The memory 6b
`includes, for example, memory locations for storing toggle
`variable 6e, count variable 6f, and firmware 6g. The toggle
`variable 6e, and the count variable 6f (e.g., implemented as
`65 a data structure in the memory 6b) are set and cleared by the
`firmware 6g running in the memory 6b. The firmware 6g will
`only clear the toggle variable 6e after the NAK bit 6c is
`
`

`
`6,073,193
`
`20
`
`5
`clea~ed and the J?acket received bit 6d is set by, for example,
`!he. mt~rnal logic 6h of the USB micro-controller 6 (e.g.,
`m~hcatmg that a packet has been received by the USB
`micro-controller 6). The count variable 6g is used to imple(cid:173)
`ment a counter function and is cleared and incremented by 5
`the firmware 6g.
`FIGS. 6a and 6b are explained with reference to FIGS. 2,
`3 and 5 to describe a method of detecting and recovering
`from a brown out condition according to the present inven(cid:173)
`tion. In the state diagram of FIG. 6a (e.g., implemented as 10
`a state machine running in memory 6b), after the USB
`micro-controller device 6 receives a reset signal at step 12
`(e.g., due to power up, re-boot etc.), the logic flows to state
`Sl where the toggle variable 6e and the count variable 6f are
`cleared by the firmware 6g. When the NAK bit 6c is set by 15
`the internal logic 6h of the USB micro-controller 6 (e.g.,
`during a busy condition indicating that no data packets can
`be received), at step 14 the logic flows to state S2 where the
`toggle variable 6e is set by the firmware 6g. When the
`internal logic 6h of the USB micro-controller 6 clears the
`NAK bit (e.g., because data packets can be received) and
`sets the packet received bit 6d (e.g., indicating that a data
`packet has been received) at step 16, the logic returns to state
`Sl. In this way, the toggle variable 6e is, for example, used
`by the firmware 6g as an indicator of a busy condition (i.e., 25
`NAK bit is set) and for detecting and recovering from a
`brown out condition as will be explained with reference to
`the flow chart of FIG. 6b (e.g., implemented as firmware 6g
`in memory 6b).
`In the flow chart of FIG. 6b, after the USB micro- 30
`controller 6 is reset, the logic flows to step 100 where an
`interrupt routine, for example which is executed every 1
`millisecond, is initiated (i.e., X=1 millisecond) which per(cid:173)
`form steps 200 through 500. At step 200, it is determined
`whether the toggle variable 6e has been set (i.e., by the state 35
`machine of FIG. 6a). If the toggle variable 6e has been set
`(e.g, during a busy condition), then logic flows to step 300,
`and if the toggle variable 6e has not been set (e.g., during a
`non-busy condition), logic flows to step 600 where the
`interrupt routine is ended and a return to normal processing 40
`occurs until the next 1 millisecond interrupt routine is
`executed.
`At step 300, the counter is incremented (e.g., the count
`variable 6f is incremented by one) and then at step 400 it is
`determined whether the counter is at a predetermined value
`Y of, for example, three (e.g., the count variable 6fis equal
`to three, Y =3). If the counter has reached the predetermined
`value, step 500 is performed, and if the counter has not
`reached the predetermined value, logic flows to step 600
`where the interrupt routine is ended and a return to normal
`processing occurs until the next 1 millisecond interrupt
`routine is executed.
`At step 500, it is determined that a brown out condition
`has occurred since the counter has reached the predeter(cid:173)
`mined count (i.e, the USB micro-controller has been busy 55
`for 3 milliseconds) and (1) the 1/0 pin (or ENE line) is
`cleared, for example, for at least 2.5 microseconds (e.g.,
`Z=2.5 microseconds), disconnecting the data lines of the
`USB micro-controller, then (2) the 1!0 pin is set,
`re-connecting the data lines of the USB micro-controller 60
`and then logic flows to step 600 where the interrupt routin~
`is ended and a return to normal processing occurs until the
`next 1 millisecond interrupt routine is executed. In this way,
`when brown out occurs (i.e., the USB micro-controller has
`been busy for 3 milliseconds), the data lines of the USB
`micro-controller 6 are opened via the switching devices S+
`and S- for a duration greater than 2.5 micro-seconds and
`
`6
`re-connected again. This procedure, for example, emulates
`the disconnect and re-connect procedure as specified in the
`USB specification vl.O, page 116, as previously discussed.
`Although in the preferred embodiment the USB fail safe
`device is described in terms of a USB micro-controller and
`switching devices S+ and S-, this invention may be imple(cid:173)
`mented using a conventional general purpose digital com(cid:173)
`puter or microprocessor programmed according to the teach(cid:173)
`ings of the present specification, as will be apparent to those
`skilled in the computer art. Appropriate software coding can
`readily be prepared by skilled programmers based on the
`teachings of the present disclosure, as will be apparent to
`those skilled in the software art. The invention may also be
`implemented by the preparation of application specific inte(cid:173)
`grated circuits or by interconnecting an appropriate network
`of conventional component circuits, as will be readily appar(cid:173)
`ent to those skilled in the art.
`Although the preferred embodiment of the USB fail safe
`device is described in terms of a USB specification, the
`present invention could be adapted for other specifications
`such as Nubus, PCI, VESA, etc. by simply modifying the
`USB device 10 logic, as will be apparent to those skilled in
`the art.
`Although the preferred embodiment of the USB fail safe
`device is described in terms of executing the interrupt
`routine every millisecond (i.e., X=1 at step 100 of FIG. 6b),
`detecting a brown condition when the USB micro-controller
`6 is busy for 3 milliseconds (i.e., Y=3 at step 400 FIG. 6b),
`and disconnecting the data lines of the USB micro-controller
`6 for 2.5 microseconds (i.e., Z=2.5 at step 500 of FIG. 6b),
`other values of X, Y and Z could be used to detect the brown
`condition, as will be apparent to those skilled in the art.
`The present invention includes a computer program prod(cid:173)
`uct (firmware 6g and the state machine of FIG. 6a) which
`may be on a storage medium including instructions which
`can be used to program memory 6 to perform a process of
`the invention. The storage medium can include, but is not
`li~ited to, any type of disk including floppy disks, optical
`discs, CD-ROMs, and magneto-optical disks, ROMs,
`RAMs, EPROMS, EEPROMS, magnetic or optical cards, or
`any type of media suitable for storing electronic instructions.
`Obviously, numerous modifications and variations of each
`embodiment of the present invention are possible in light of
`the above teachings. It is therefore to be understood that
`within the scope of the appended claims, the invention may
`be practiced otherwise than as specifically described herein.
`What is claimed as new and desired to be secured by
`Letters Patent of the United States is:
`1. A method for determining and recovering from a
`processor busy condition, comprising the steps of:
`incrementing a counter if a variable indicative of the
`processor busy condition is set;
`determining if the counter has reached a predetermined
`count; and
`disconnecting at least one of a plurality of data lines of the
`processor from a bus coupled to the data lines for a
`predetermined amount of time if the counter has
`reached the predetermined count.
`2. The method of claim 1, wherein the incrementing step
`further comprises:
`determining if the variable indicative of the processor
`busy condition is set.
`3. The method of claim 1, wherein the disconnecting step
`65 comprises:
`disconnecting the at least one of a plurality of data lines
`for at least 2.5 microseconds.
`
`45
`
`50
`
`

`
`6,073,193
`
`7
`4. A device for determining and recovering from a pro(cid:173)
`cessor busy condition, comprising:
`a first circuit configured to increment a counter if a
`variable indicative of a processor busy condition is set;
`a second circuit configured to determine if the counter has 5
`reached a predetermined count; and
`a third circuit configured to disconnect at least one of a
`plurality of data lines of the processor from a bus
`coupled to the data lines for a predetermined time if the
`counter has reached the predetermined count.
`5. The device of claim 4, wherein the predetermined time
`is at least 2.5 microseconds.
`6. The method according to claim 1, further comprising
`the step of:
`repeating the determining step and, if the counter has not
`reached the predetermined count again, reconnecting
`said disconnected data lines.
`7. The method according to claim 4, wherein said device
`determines if said counter has reached the predetermined
`count again and, reconnects said disconnected data lines if
`said counter has not reached the predetermined count again.
`8. The device of claim 4, wherein the processor comprises
`a universal serial bus (USB) micro-controller and the bus
`comprises a USB bus.
`9. An apparatus for determining and recovering from a
`processor busy condition, comprising:
`a memory coupled to the processor configured to store a
`variable indicative of whether or not the processor is in
`the busy condition;
`a counter; and
`one or more devices configured to:
`(a) increment the counter if the variable indicative of
`the processor busy condition is set,
`(b) determine if the counter has reached a predeter- 35
`mined count, and
`(c) disconnect at least one of a plurality of data lines of
`the processor from a bus coupled to the data lines for
`a predetermined amount of time if the counter has
`reached the predetermined count.
`10. The apparatus of claim 9, wherein the one or more
`devices are further configured to determine if the variable
`indicative of the processor busy condition is set.
`11. The apparatus of claim 9, wherein the predetermined
`time is at least 2.5 microseconds.
`
`30
`
`10
`
`8
`12. The apparatus of claim 9, further comprising:
`a switch between each of the plurality of data lines and
`each corresponding data line of the bus, and wherein
`the switch is disconnected by the one or more devices.
`13. The apparatus of claim 9, wherein the processor is a
`universal serial bus (USB) micro-controller and the bus is a
`USB bus.
`14. The apparatus of claim 12, wherein the switch com(cid:173)
`prises a transistor having a gate coupled to a general purpose
`1!0 pin of the processor configured to be controlled by the
`one or more devices.
`15. The device of claim 12, wherein the switch comprises
`a transistor having a gate configured to be controlled by the
`15 one or more devices.
`16. The device of claim 10, wherein any one of the
`counter, and the one or more devices are implemented via
`firmware running in the memory.
`17. The device of claim 9, wherein the memory is internal
`20 or external to the processor.
`18. The apparatus according to claim 9, further compris(cid:173)
`ing determining if the counter has reached the predetermined
`count again and, if the counter has not reached the prede-
`25 termined count again, reconnecting said disconnected data
`lines.
`19. An electronically readable set of instructions execut(cid:173)
`able by a processor, comprising:
`determining whether the processor is in a busy condition;
`incrementing a counter if the processor is in said busy
`condition;
`determining whether the counter has reached a predeter(cid:173)
`mined count; and
`disconnecting at least one of a plurality of data lines of the
`processor from a bus coupled to the data lines for a
`predetermined amount of time if the counter reaches
`the predetermined count.
`20. The method according to claim 19, further comprising
`40 the step of:
`repeating the determining step and, if the counter has not
`reached the predetermined count again, reconnecting
`said disconnected data lines.
`
`* * * * *