`Technical Reference
`Manual
`
`• Cypress Semiconductor (cid:127) Interface Products Division (cid:127)
`(cid:127) 15050 Avenue of Sci ence (cid:127) Suite 200 (cid:127) San Diego, CA 92128 (cid:127)
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`Cypress Disclaimer Agreement
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`
`The EZ-USB FX Technical Reference Manual,
`Version 1.2.
`
`Copyright 2000, Cypress Semiconductor Cor-
`poration.
`
`All rights reserved.
`
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`Table of Contents
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`Chapter 1. Introducing EZ-USB FX - - - - - - - - - - - - - - - - - - - - 1-1
` 1.1 Introduction ................................................................................................... 1-1
` 1.2 EZ-USB FX Block Diagrams ......................................................................... 1-2
` 1.3 The USB Specification.................................................................................. 1-3
` 1.4 Tokens and PIDs ........................................................................................... 1-4
` 1.5 Host is Master................................................................................................ 1-5
` 1.5.1 Receiving Data from the Host.............................................................1-5
` 1.5.2 Sending Data to the Host....................................................................1-6
` 1.6 USB Direction ................................................................................................ 1-6
` 1.7 Frame ............................................................................................................. 1-6
` 1.8 EZ-USB FX Transfer Types .......................................................................... 1-6
` 1.8.1 Bulk Transfers.....................................................................................1-7
` 1.8.2 Interrupt Transfers...............................................................................1-7
` 1.8.3 Isochronous Transfers........................................................................1-7
` 1.8.4 Control Transfers...............................................................................1-8
` 1.9 Enumeration .................................................................................................. 1-8
` 1.10 The USB Core .............................................................................................. 1-9
` 1.11 EZ-USB FX Microprocessor ..................................................................... 1-10
` 1.12 ReNumeration™ ........................................................................................ 1-11
` 1.13 EZ-USB FX Endpoints............................................................................... 1-11
` 1.13.1 EZ-USB FX Bulk Endpoints............................................................1-12
` 1.13.2 EZ-USB FX Control Endpoint Zero.................................................1-12
` 1.13.3 EZ-USB FX Interrupt Endpoints......................................................1-13
` 1.13.4 EZ-USB FX Isochronous Endpoints................................................1-13
` 1.14 Interrupts ................................................................................................... 1-13
` 1.15 Reset and Power Management ................................................................ 1-14
` 1.16 Slave FIFOs................................................................................................ 1-14
` 1.17 GPIF (General Programmable Interface) ................................................. 1-14
` 1.18 EZ-USB FX Product Family ...................................................................... 1-15
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`Chapter 2. EZ-USB FX CPU- - - - - - - - - - - - - - - - - - - - - - - - 2-1
` 2.1 Introduction................................................................................................... 2-1
` 2.2 8051 Enhancements ..................................................................................... 2-1
` 2.3 EZ-USB FX Enhancements .......................................................................... 2-2
` 2.4 EZ-USB FX Register Interface ..................................................................... 2-2
` 2.5 EZ-USB FX Internal RAM.............................................................................. 2-3
` 2.6 I/O Ports......................................................................................................... 2-3
` 2.7 Interrupts ....................................................................................................... 2-4
` 2.8 Power Control ............................................................................................... 2-5
` 2.9 SFRs............................................................................................................... 2-5
` 2.10 Internal Bus ................................................................................................. 2-7
` 2.11 Reset ............................................................................................................ 2-7
`Chapter 3. EZ-USB FX Memory- - - - - - - - - - - - - - - - - - - - - - 3-1
` 3.1 Introduction................................................................................................... 3-1
` 3.2 8051 Memory ................................................................................................. 3-2
` 3.2.1 About 8051 Memory Spaces..............................................................3-2
` 3.3 Expanding EZ-USB FX Memory................................................................... 3-4
` 3.4 CS# and OE# Signals ................................................................................... 3-5
`Chapter 4. EZ-USB FX Input/Output - - - - - - - - - - - - - - - - - - - 4-1
` 4.1 Introduction................................................................................................... 4-1
` 4.2 I/O Ports......................................................................................................... 4-2
` 4.3 Input/Output Port Registers......................................................................... 4-4
` 4.4 Port Configuration Tables............................................................................ 4-8
` 4.5 I2C-Compatible Controller .......................................................................... 4-14
` 4.6 8051 I2C-Compatible Controller................................................................. 4-14
` 4.7 Control Bits ................................................................................................. 4-16
` 4.7.1 START..............................................................................................4-16
` 4.7.2 STOP................................................................................................4-16
` 4.7.3 LASTRD...........................................................................................4-17
` 4.8 Status Bits ................................................................................................... 4-17
` 4.8.1 DONE...............................................................................................4-17
` 4.8.2 ACK..................................................................................................4-17
` 4.8.3 BERR................................................................................................4-17
` 4.8.4 ID1, ID0............................................................................................4-18
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` 4.9 Sending I2C-Compatible Data .................................................................... 4-18
` 4.10 Receiving I2C-Compatible Data................................................................ 4-18
` 4.11 I2C-Compatible Boot Loader .................................................................... 4-19
` 4.12 SFR Addressing ........................................................................................ 4-21
` 4.13 SFR Control of PORTs A-E....................................................................... 4-25
`Chapter 5. EZ-USB FX Enumeration & ReNumeration™ - - - - - - - - - 5-1
` 5.1 Introduction ................................................................................................... 5-1
` 5.2 The Default USB Device ............................................................................... 5-2
` 5.3 USB Core Response to EP0 Device Requests ........................................... 5-3
` 5.3.1 Port Configuration Bits........................................................................5-4
` 5.4 Firmware Load............................................................................................... 5-5
` 5.5 Enumeration Modes..................................................................................... 5-6
` 5.6 No Serial EEPROM ........................................................................................ 5-7
` 5.7 Serial EEPROM Present, First Byte is 0xB4 ............................................... 5-8
` 5.8 Serial EEPROM Present, First Byte is 0xB6 ............................................... 5-9
` 5.9 Configuration Byte 0.................................................................................. 5-10
` 5.10 ReNumeration™ ........................................................................................ 5-11
` 5.11 Multiple ReNumeration™ ......................................................................... 5-13
` 5.12 Default Descriptor ..................................................................................... 5-13
`Chapter 6. EZ-USB FX Bulk Transfers - - - - - - - - - - - - - - - - - - 6-1
` 6.1 Introduction ................................................................................................... 6-1
` 6.2 Bulk IN Transfers .......................................................................................... 6-4
` 6.3 Interrupt Transfers ........................................................................................ 6-5
` 6.4 EZ-USB FX Bulk IN Example ........................................................................ 6-5
` 6.5 Bulk OUT Transfers ...................................................................................... 6-6
` 6.6 Endpoint Pairing ........................................................................................... 6-8
` 6.7 Paired IN Endpoint Status ............................................................................ 6-8
` 6.8 Paired OUT Endpoint Status ........................................................................ 6-9
` 6.9 Reusing Bulk Buffer Memory....................................................................... 6-9
` 6.10 Data Toggle Control .................................................................................. 6-10
` 6.11 Polled Bulk Transfer Example ................................................................. 6-11
` 6.12 Enumeration Note ..................................................................................... 6-12
` 6.13 Bulk Endpoint Interrupts .......................................................................... 6-13
` 6.14 Interrupt Bulk Transfer Example ............................................................. 6-14
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` 6.15 Enumeration Note..................................................................................... 6-19
` 6.16 The Autopointer ........................................................................................ 6-19
`Chapter 7. EZ-USB FX Slave FIFOs- - - - - - - - - - - - - - - - - - - - 7-1
` 7.1 Introduction................................................................................................... 7-1
` 7.1.1 8051 FIFO Access..............................................................................7-2
` 7.1.2 External Logic FIFO Access...............................................................7-2
` 7.1.3 ASEL, BSEL in 8-Bit Mode.................................................................7-3
` 7.1.4 ASEL, BSEL in Double-Byte Mode.....................................................7-4
` 7.1.5 FIFO Registers...................................................................................7-4
` 7.1.6 FIFO Flags and Interrupts ..................................................................7-5
` 7.2 Slave FIFO Register Descriptions ............................................................... 7-6
` 7.2.1 FIFO A Read Data..............................................................................7-7
` 7.2.2 A-IN FIFO Byte Count........................................................................7-8
` 7.2.3 A-IN FIFO Programmable Flag...........................................................7-9
`7.2.3.1 Filling FIFO..............................................................................7-10
`7.2.3.2 Emptying FIFO........................................................................7-10
`7.2.3.3 A-IN FIFO Pin Programmable Flag.........................................7-11
` 7.2.4 B-IN FIFO Read Data.......................................................................7-13
` 7.2.5 B-IN FIFO Byte Count......................................................................7-14
` 7.2.6 B-IN FIFO Programmable Flag.........................................................7-15
`7.2.6.1 Filling FIFO..............................................................................7-16
`7.2.6.2 Emptying FIFO........................................................................7-16
` 7.2.7 B-IN FIFO Pin Programmable Flag...................................................7-17
` 7.2.8 Input FIFOs A/B Toggle CTL and Flags...........................................7-18
` 7.2.9 Input FIFOs A/B Interrupt Enables...................................................7-20
` 7.2.10 Input FIFOs A/B Interrupt Requests...............................................7-22
` 7.2.11 FIFO A Write Data..........................................................................7-24
`7.2.11.1 A-OUT FIFO Byte Count.......................................................7-25
` 7.2.12 A-OUT FIFO Programmable Flag...................................................7-26
`7.2.12.1 Filling FIFO............................................................................7-27
`7.2.12.2 Emptying FIFO......................................................................7-27
` 7.2.13 A-OUT FIFO Pin Programmable Flag.............................................7-28
` 7.2.14 B-OUT FIFO Write Data.................................................................7-30
` 7.2.15 B-OUT FIFO Byte Count................................................................7-31
` 7.2.16 B-OUT FIFO Programmable Flag...................................................7-32
`7.2.16.1 Filling FIFO............................................................................7-33
`7.2.16.2 Emptying FIFO......................................................................7-33
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` 7.2.17 B-OUT FIFO Pin Programmable Flag.............................................7-34
` 7.2.18 Output FIFOs A/B Toggle CTL and Flags.......................................7-35
` 7.2.19 Output FIFOs A/B Interrupt Enables...............................................7-37
` 7.2.20 Output FIFOs A/B Interrupt Requests.............................................7-39
` 7.2.21 FIFO A/B Setup...............................................................................7-40
` 7.2.22 FIFO A/B Control Signal Polarities..................................................7-43
` 7.2.23 FIFO Flag Reset..............................................................................7-44
` 7.3 FIFO Timing ................................................................................................. 7-45
`Chapter 8. General Programmable Interface (GPIF) - - - - - - - - - - - 8-1
` 8.1 What is GPIF?................................................................................................ 8-1
` 8.2 Applicable Documents and Tools ............................................................... 8-2
` 8.3 Typical GPIF Interface .................................................................................. 8-3
` 8.4 External GPIF Connections .......................................................................... 8-4
` 8.4.1 The External GPIF Interface...............................................................8-4
` 8.4.2 Connecting GPIF Signal Pins to Hardware.........................................8-5
` 8.4.3 Example GPIF Hardware Interconnect...............................................8-5
` 8.5 Internal GPIF Operation ................................................................................ 8-6
` 8.5.1 The Internal GPIF Engine...................................................................8-6
` 8.5.2 Global GPIF Configuration..................................................................8-6
`8.5.2.1 Data Bus Width..........................................................................8-6
`8.5.2.2 Control Output Modes...............................................................8-6
`8.5.2.3 Synchronous/Asynchronous Mode............................................8-7
` 8.5.3 Programming GPIF Waveforms..........................................................8-7
`8.5.3.1 The GPIF IDLE State.................................................................8-8
`8.5.3.2 Defining Intervals.....................................................................8-10
`8.5.3.3 Interval Waveform Descriptor..................................................8-14
`8.5.3.4 Physical Structure of the Waveform Memories........................8-18
` 8.5.4 Starting GPIF Waveform Transactions.............................................8-20
`8.5.4.1 Performing a Single Read Transaction....................................8-20
`8.5.4.2 Performing a Single Write Transaction....................................8-22
` 8.5.5 GPIF FIFO Transactions...................................................................8-22
`8.5.5.1 The GPIF_PF Flag..................................................................8-22
`8.5.5.2 Performing a FIFO Read Transaction.....................................8-23
`8.5.5.3 Performing a FIFO Write Transaction......................................8-23
`8.5.5.4 Burst FIFO Transactions.........................................................8-24
`8.5.5.5 Waveform Selector..................................................................8-25
` 8.5.6 Data/Trigger Registers......................................................................8-26
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` 8.5.7 FIFO Operation Trigger Registers....................................................8-28
` 8.5.8 Transaction Count Registers............................................................8-29
` 8.5.9 READY Register...............................................................................8-30
` 8.5.10 CTLOUTCFG Register...................................................................8-31
` 8.5.11 IDLE State Registers......................................................................8-32
` 8.5.12 Address Register GPIFADRL.........................................................8-34
` 8.5.13 GPIF_ABORT Register..................................................................8-35
`Chapter 9. EZ-USB FX Endpoint Zero - - - - - - - - - - - - - - - - - - 9-1
` 9.1 Introduction................................................................................................... 9-1
` 9.2 Control Endpoint EP0................................................................................... 9-2
` 9.3 USB Requests ............................................................................................... 9-5
` 9.3.1 Get Status...........................................................................................9-6
` 9.3.2 Set Feature.......................................................................................9-10
` 9.3.3 Clear Feature....................................................................................9-12
` 9.3.4 Get Descriptor..................................................................................9-12
`9.3.4.1 Get Descriptor-Device.............................................................9-14
`9.3.4.2 Get Descriptor-Configuration..................................................9-15
`9.3.4.3 Get Descriptor-String..............................................................9-15
` 9.3.5 Set Descriptor...................................................................................9-16
`9.3.5.1 Set Configuration....................................................................9-19
` 9.3.6 Get Configuration.............................................................................9-19
` 9.3.7 Set Interface.....................................................................................9-20
` 9.3.8 Get Interface.....................................................................................9-21
` 9.3.9 Set Address......................................................................................9-21
` 9.3.10 Sync Frame....................................................................................9-22
` 9.3.11 Firmware Load................................................................................9-23
`Chapter 10. EZ-USB FX Isochronous Transfers - - - - - - - - - - - - 10-1
` 10.1 Introduction............................................................................................... 10-1
` 10.2 Isochronous IN Transfers ........................................................................ 10-2
` 10.2.1 Initialization.....................................................................................10-2
` 10.2.2 IN Data Transfers...........................................................................10-3
` 10.3 Isochronous OUT Transfers .................................................................... 10-3
` 10.3.1 Initialization.....................................................................................10-4
` 10.3.2 OUT Data Transfer.........................................................................10-4
` 10.4 Setting Isochronous FIFO Sizes.............................................................. 10-5
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` 10.5 Isochronous Transfer Speed ................................................................... 10-7
` 10.6 Other Isochronous Registers................................................................... 10-9
` 10.6.1 Disable ISO.....................................................................................10-9
` 10.6.2 Zero Byte Count Bits.....................................................................10-10
` 10.7 ISO IN Response with No Data .............................................................. 10-10
` 10.8 Restrictions Near SOF ............................................................................ 10-11
`Chapter 11. EZ-USB FX DMA System- - - - - - - - - - - - - - - - - - 11-1
` 11.1 Introduction ............................................................................................... 11-1
` 11.2 DMA Register Descriptions ...................................................................... 11-2
` 11.2.1 Source, Destination, Transfer Length Address Registers...............11-2
` 11.2.2 DMA Start and Status Register.......................................................11-6
` 11.2.3 DMA Synchronous Burst Enables Register....................................11-6
` 11.2.4 Dummy Register.............................................................................11-9
` 11.3 External DMA Transfers - Strobes......................................................... 11-10
` 11.3.1 Selection of RD/FRD and WR/FWR DMA Strobes.......................11-10
` 11.4 Interaction of DMA Strobe Waveforms and Stretch Bits ..................... 11-10
` 11.4.1 DMA External Writes.....................................................................11-11
` 11.4.2 DMA External Reads.....................................................................11-12
`11.4.2.1 Modes 0 and 1.....................................................................11-13
`11.4.2.2 Modes 2 and 3.....................................................................11-13
`Chapter 12. EZ-USB FX Interrupts - - - - - - - - - - - - - - - - - - - 12-1
` 12.1 Introduction ............................................................................................... 12-1
` 12.2 USB Core Interrupts.................................................................................. 12-2
` 12.3 Resume Interrupt ...................................................................................... 12-2
` 12.4 USB Signaling Interrupts.......................................................................... 12-2
` 12.5 SUTOK, SUDAV Interrupts ....................................................................... 12-7
` 12.6 SOF Interrupt ............................................................................................. 12-7
` 12.7 Suspend Interrupt ..................................................................................... 12-8
` 12.8 USB RESET Interrupt................................................................................ 12-8
` 12.9 Bulk Endpoint Interrupts .......................................................................... 12-8
` 12.10 USB Autovectors..................................................................................... 12-8
` 12.11 Autovector Coding................................................................................ 12-10
` 12.12 I2C-Compatible Interrupt....................................................................... 12-12
` 12.13 In Bulk NAK Interrupt............................................................................ 12-12
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` 12.14 I2C-Compatible STOP Complete Interrupt .......................................... 12-13
` 12.15 Slave FIFO Interrupt (INT4) .................................................................. 12-15
`Chapter 13. EZ-USB FX Resets- - - - - - - - - - - - - - - - - - - - - 13-1
` 13.1 Introduction............................................................................................... 13-1
` 13.2 EZ-USB FX Power-On Reset (POR)......................................................... 13-1
` 13.3 Releasing the 8051 Reset......................................................................... 13-3
` 13.3.1 RAM Download...............................................................................13-4
` 13.3.2 EEPROM Load...............................................................................13-4
` 13.3.3 External ROM.................................................................................13-4
` 13.4 8051 Reset Effects .................................................................................... 13-4
` 13.5 USB Bus Reset.......................................................................................... 13-5
` 13.6 EZ-USB FX Disconnect ............................................................................ 13-7
` 13.7 Reset Summary......................................................................................... 13-8
`Chapter 14. EZ-USB FX Power Management - - - - - - - - - - - - - - 14-1
` 14.1 Introduction............................................................................................... 14-1
` 14.2 Suspend..................................................................................................... 14-2
` 14.3 Resume...................................................................................................... 14-3
` 14.4 Remote Wakeup........................................................................................ 14-5
`Chapter 15. EZ-USB FX Registers - - - - - - - - - - - - - - - - - - - 15-1
` 15.1 Introduction............................................................................................... 15-1
` 15.1.1 Example Register Formats.............................................................15-1
` 15.1.2 Other Conventions..........................................................................15-2
` 15.2 Slave FIFO Registers................................................................................ 15-3
` 15.2.1 FIFO A Read Data..........................................................................15-3
` 15.2.2 A-IN FIFO Byte Count....................................................................15-3
` 15.2.3 A-IN FIFO Programmable Flag.......................................................15-4
` 15.2.4 A-IN FIFO Pin Programmable Flag.................................................15-4
` 15.2.5 B-IN FIFO Read Data.....................................................................15-5
` 15.2.6 B-IN FIFO Byte Count....................................................................15-5
` 15.2.7 B-IN FIFO Programmable Flag.......................................................15-6
` 15.2.8 B-IN FIFO Pin Programmable Flag.................................................15-6
` 15.2.9 Input FIFOs A/B Toggle CTL and Flags.........................................15-7
` 15.2.10 Input FIFOs A/B Interrupt Enables...............................................15-7
` 15.2.11 Input FIFOs A/B Interrupt Requests.............................................15-7
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` 15.2.12 FIFO A Write Data.........................................................................15-8
` 15.2.13 A-OUT FIFO Byte Count...............................................................15-8
` 15.2.14 A-OUT FIFO Programmable Flag.................................................15-9
` 15.2.15 A-OUT FIFO Pin Programmable Flag...........................................15-9
` 15.2.16 B-OUT FIFO Write Data..............................................................15-10
` 15.2.17 B-OUT FIFO Byte Count.............................................................15-10
` 15.2.18 B-OUT FIFO Programmable Flag...............................................15-11
` 15.2.19 B-OUT FIFO Pin Programmable Flag.........