Petition for Inter Partes Review of U.S. 5,652,084
`
`Docket No. 34789.101
`Filed on behalf of Taiwan Semiconductor Manufacturing Company, ltd.
`By: David M. O’Dell, Reg. No. 42,044
`David L. McCombs, Reg. No. 32,271
`
`UNITED STATES PATENT AND TRADEMARK OFFICE
`__________________
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`___________________
`
`TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
`(TSMC),
`Petitioner
`
`v.
`
`DSS TECHNOLOGY MANAGEMENT, INC.
`Patent Owner
`___________________
`
`Patent 5,652,084
`
`Title: METHOD FOR REDUCED PITCH LITHOGRAPHY
`_____________________
`
`PETITION FOR INTER PARTES REVIEW OF
`U.S. PATENT NO. 5,652,084
`CHALLENGING CLAIMS 1-16
`
`

`

`Petition for Inter Partes Review of U.S. 5,652,084
`
`PETITION FOR INTER PARTES REVIEW
`
`Pursuant to the provisions of 35 U.S.C. §§ 311-319, Petitioner Taiwan
`
`Semiconductor Manufacturing Company (“TSMC”) hereby petitions the Patent
`
`Trial and Appeal Board to institute an inter partes review of claims 1-16 (all
`
`claims) of United States Patent No. 5,652,084 (“the ’084 Patent,” Exhibit TSMC-
`
`1001) that issued on July 29, 1997, to James M. Cleeves. According to USPTO
`
`records, the ’084 Patent is currently assigned to DSS Technology Management,
`
`Inc.
`
`–2–
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`

`

`Petition for Inter Partes Review of U.S. 5,652,084
`
`TABLE OF CONTENTS
`
`I. Mandatory Notices .......................................................................................... 1
`
`A. Real Party-in-Interest............................................................................. 1
`
`B. Related Matters...................................................................................... 1
`
`C. Lead and Back-up Counsel and Service Information.............................. 1
`
`II. Grounds for Standing....................................................................................... 2
`
`III. Relief Requested.............................................................................................. 2
`
`IV. The Reasons for the Requested Relief.............................................................. 2
`
`A.
`
`Summary of the Related Technology and the ’084 Patent ...................... 2
`
`B. The Prosecution History......................................................................... 7
`
`C. The Prior Art of the Present Petition ...................................................... 9
`
`V. Identification of Challenges and Claim Construction......................................13
`
`A. Challenged Claims................................................................................13
`
`B. Claim Construction...............................................................................13
`
`1. Imaging Layer.......................................................................................14
`
`2. Stabilizing.............................................................................................14
`
`3. Single Patterned Layer .........................................................................15
`
`4. Disposable Post ....................................................................................16
`
`C.
`
`Statutory Grounds for Challenges .........................................................18
`
`1. Challenge #1: Claims 1-8, 12, 15, and 16 are anticipated under 35 U.S.C.
`§ 102(b) by Jinbo ......................................................................................18
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`Petition for Inter Partes Review of U.S. 5,652,084
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`2. Challenge #2: Claims 1-8, 12, 15, and 16 are obvious under 35 U.S.C. §
`103 over Jinbo in view of Brownell ..........................................................29
`
`3. Challenge #3 – Claim 9 is obvious over Jinbo in view of McColgin
`under 35 U.S.C. §103(a) ...........................................................................32
`
`4. Challenge #4 – Claims 10 and 11 are obvious over Jinbo in view of
`Matthews under 35 U.S.C. §103(a) ...........................................................34
`
`5. Challenge #5 – Claims 13 and 14 are obvious over Jinbo in view of
`Brownell and Cooper under 35 U.S.C. §103(a).........................................37
`
`VI. Conclusion......................................................................................................41
`
`–2–
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`

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`Petition for Inter Partes Review of U.S. 5,652,084
`
`I.
`
`Mandatory Notices
`
`A.
`
`Real Party-in-Interest
`
`The real party-in-interest is TSMC.
`
`B.
`
`Related Matters
`
`As of the filing date of this petition and to the best knowledge of TSMC, the
`
`’084 Patent is involved in the following litigation:
`
` DSS Technology Mgmt., Inc. v. Taiwan Semiconductor Manufacturing
`
`Company, Ltd. et al., 2-14-CV-00199 (EDTX).
`
`C.
`
`Lead and Back-up Counsel and Service Information
`
`Lead Counsel
`
`Back-up Counsel
`
`David M. O’Dell
`HAYNES AND BOONE, LLP
`2323 Victory Ave. Suite 700
`Dallas, TX 75219
`
`David L. McCombs
`HAYNES AND BOONE, LLP
`2323 Victory Ave. Suite 700
`Dallas, TX 75219
`
`Phone: (972) 739-8635
`Fax: (214) 200-0853
`david.odell.ipr@haynesboone.com
`
`Phone: (214) 651-5533
`Fax: (214) 200-0853
`david.mccombs.ipr@haynesboone.com
`
`USPTO Customer No. 27683
`USPTO Reg. No. 42,044
`
`USPTO Customer No. 27683
`USPTO Reg. No. 32,271
`
`Please address all correspondence to lead and back-up counsel. TSMC also
`
`consents to electronic service by email.
`
`–1–
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`

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`Petition for Inter Partes Review of U.S. 5,652,084
`
`II. Grounds for Standing
`
`TSMC certifies that the ’084 Patent for which review is sought is available
`
`for inter partes review and that TSMC is not barred or estopped from requesting
`
`inter partes review challenging the patent claims on the grounds identified in the
`
`petition.
`
`III. Relief Requested
`
`TSMC asks that the Board review the accompanying prior art and analysis,
`
`institute a trial for inter partes review of claims 1-16 (all claims) of the ’084
`
`Patent, and cancel those claims as unpatentable.
`
`IV. The Reasons for the Requested Relief
`
`The full statement of the reasons for the relief requested is as follows:
`
`A.
`
`Summary of the Related Technology and the ’084 Patent
`
`Photolithography (often shortened to “lithography”) is the use of light or
`
`other radiation to form a pattern in a material. Photolithographic techniques are
`
`commonly used in semiconductor fabrication to form the minute features of
`
`modern integrated circuit devices. Driven in part by the demand for smaller and
`
`more efficient devices, circuit fabrication presses the limits of photolithography,
`
`and many circuit features are sized at or near the minimum lithographic resolution.
`
`The ’084 Patent recognizes the limits imposed by conventional lithography and the
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`Petition for Inter Partes Review of U.S. 5,652,084
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`potential for lithographic improvements to enable integrated circuit devices with
`
`relatively smaller sizes. TSMC-1001, Cleeves at 1:14-35, 12:28-38.
`
`The ’084 Patent is particularly concerned with reducing the spacing between
`
`adjacent features (shapes) in a single patterned layer. The single patterned layer is
`
`formed by two separate patterned resist layers, with features in different layers
`
`being interleaved with each other. By interleaving the shapes of the patterned
`
`resists, the spacing between the resist shapes can be at a very close pitch (a
`
`measure of distance between features) – closer than would otherwise be possible
`
`with either one of the patterned resists alone. The single patterned layer is then
`
`used to pattern a material layer at the reduced spacing or pitch.
`
`The ’084 Patent teaches that the first resist (imaging layer 220) is formed
`
`over the material layer (210) and exposed using a lithographic mask as shown in
`
`FIG. 2, reproduced below.
`
`TSMC-1001, Cleeves, FIG. 2
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`Petition for Inter Partes Review of U.S. 5,652,084
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`For the illustrated positive resist:
`
`The radiation serves to render soluble in a suitable
`
`developer that portion of imaging layer 220 exposed to
`
`radiation through clear features 221 and 223.
`
`That
`
`portion of imaging layer 220 that has not been exposed to
`
`radiation remains relatively insoluble in the developer.
`
`TSMC-1001, Cleeves at 3:66-4:4. The first imaging layer (220) is then developed,
`
`leaving the portion (232) of the imaging layer that has not been exposed to
`
`radiation as shown in FIG. 3, reproduced below.
`
`TSMC-1001, Cleeves, FIG. 3
`
`The patterned portion (232) is “stabilized” before applying the second resist. With
`
`respect to this stabilization, the ’084 Patent teaches:
`
`First patterned layer 232 may be stabilized to withstand
`
`subsequent lithographic processing steps. First patterned
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`Petition for Inter Partes Review of U.S. 5,652,084
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`layer 232 may be stabilized to withstand chemical
`
`transformation as a result of any subsequent exposure to
`
`radiation, for example. First patterned layer 232 may
`
`also be stabilized to withstand dissolution by solvents
`
`during a subsequent spin-on of photoresist, for example.
`
`First patterned layer 232 may further be stabilized to
`
`withstand dissolution by a subsequent developer, for
`
`example.
`
`TSMC-1001, Cleeves at 4:34-42.
`
`After the patterned layer (232) has been stabilized, a second resist (second
`
`imaging layer 240) is formed over the patterned layer (232) and exposed in a
`
`lithographic process as shown in FIG. 4, reproduced below.
`
`TSMC-1001, Cleeves, FIG. 4
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`Petition for Inter Partes Review of U.S. 5,652,084
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`The second imaging layer (240) is then developed, which leaves some features
`
`from the first imaging layer (e.g., feature 232) and some features (e.g., features 251
`
`and 253) from the second imaging layer as shown in FIG. 5, reproduced below.
`
`TSMC-1001, Cleeves, FIG. 5
`
`The ’084 Patent refers to this structure having interleaved features from two
`
`different imaging layers as a “single patterned layer”. TSMC-1001, Cleeves at
`
`7:36-40. Subsequent processing, such as an etching of layer 210, take advantage
`
`of the shape of the remaining features within the single patterned layer to
`
`selectively process portions of the underlying layers. The ’084 Patent teaches that,
`
`due to the use of two different imaging layers, “features for the resulting single
`
`patterned layer, such as the patterned layer illustrated in FIGS. 5, 11, and 16
`
`respectively, may be formed relatively closer to one another” when compared with
`
`a single exposure process. TSMC-1001, Cleeves at 12:28-34.
`
`–6–
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`

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`Petition for Inter Partes Review of U.S. 5,652,084
`
`B.
`
`The Prosecution History
`
`The ’084 Patent issued on July 29, 1997 from U.S. Patent Application No.
`
`08/740,145 filed by James M. Cleeves on October 22, 1996. The ’084 Patent is a
`
`continuation of U.S. Patent Application No. 08/361,595, filed on December 22,
`
`1994 (now abandoned). The file wrapper of the ’595 Application was used as the
`
`basis for ’145 Application, and the ’145 Application includes all amendments
`
`made to the ’595 Application, upon which it is based.
`
`During prosecution of the ’595 Application, the claims were repeatedly
`
`rejected in view of the prior art. In the first Office Action, some of the claims were
`
`rejected in view U.S. Patent No. 4,548,688, issued to John C. Matthews
`
`(hereinafter “Matthews,” TSMC-1007), and some were rejected in view of U.S.
`
`Patent No. 4,931,351, issued to William C. McColgin (hereinafter “McColgin,”
`
`TSMC-1006, both of which are cited in this petition for other teachings.
`
`With respect to Matthews, the Applicant argued:
`
`Matthews teaches a process of hardening the photoresist
`
`pattern wherein the photoresist pattern is hardened by
`
`exposing it to radiation with wavelengths of about 320
`
`nanometers or less at an elevated temperature. Like
`
`Orvek, however, Matthews fails to teach or
`
`render
`
`obvious Applicant's claimed steps of “...forming a second
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`Petition for Inter Partes Review of U.S. 5,652,084
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`imaging layer over the first patterned layer...” and
`
`“...patterning the second imaging layer...”
`
`Exhibit TSMC-1002 at p. 92, Applicants’ Amendment dated 8-01-1995 at p. 4,
`
`emphasis in original. With respect to McColgin, the Applicant argued:
`
`McColgin teaches a photolithographic process whereby a
`
`photoresist pattern is
`
`formed and then silylated.
`
`McColgin, however, fails to teach “forming a second
`
`imaging layer over the first patterning layer...” and
`
`“...patterning the second imaging layer...” as claimed by
`
`Applicant.
`
`Exhibit TSMC-1002 at pp. 92-93, Applicants’ Amendment dated 8-01-1995 at pp.
`
`4-5, emphasis in original. The Applicant’s arguments appear to have been
`
`persuasive. However, the claims remained rejected in view of other prior art.
`
`In response to the second Office Action, the claims were amended to recite,
`
`for example, “the second patterned layer and the first patterned layer form a single
`
`patterned layer having adjacent features which are formed relatively closer to one
`
`another than is possible through a single exposure to radiation”. Exhibit TSMC-
`
`1002 at p. 102, Applicants’ Amendment dated 2-27-1996 at p. 2. These
`
`amendments were not persuasive. The claims were subsequently amended to
`
`recite, for example, “a first patterned layer having a first feature”, and “a second
`
`–8–
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`Petition for Inter Partes Review of U.S. 5,652,084
`
`patterned layer having a second feature distinct from the first feature”, “wherein
`
`the first and second features which are formed relatively closer to one another than
`
`is possible through a single exposure to radiation.” Exhibit TSMC-1002 at pp.
`
`128-129, Applicants’ Amendment dated 9-24-1996 at pp. 1-2. These amendments
`
`were received but not entered in the prosecution of the ’595 Application.
`
`However, upon being entered in the ’145 Application, the claims were allowed
`
`with the reasons for allowance indicating that a first cited reference “does not teach
`
`the formation of two distinct features in the two layers,” and a second cited
`
`reference “forms two distinct patterns in two different layers[,] but the patterns are
`
`not formed closer to one another than possible in a single exposure.” Exhibit
`
`TSMC-1002 at pp. 156-157, Notice of Allowance dated 2-10-1997 at pp. 2-3.
`
`C.
`
`The Prior Art of the Present Petition
`
`The primary reference of the present petition, Jinbo, Japanese Patent
`
`Application No. H04-71222 (Exhibit TSMC-1011), is directed to a double
`
`patterning technique for forming shapes that are closer than is possible using a
`
`comparable single exposure technique. For convenience, further reference is made
`
`to a certified English translation of the published Japanese Patent Application
`
`(Exhibit TSMC-1004, “Jinbo”).
`
`Just like the ’084 Patent, Jinbo recognizes that single patterning techniques
`
`have been limited by the minimum resolvable distance, an optical property of a
`
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`

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`Petition for Inter Partes Review of U.S. 5,652,084
`
`photolithographic system. In order to reduce device spacing beyond this resolution
`
`limit, Jinbo teaches exposing and developing a first resist to form a first resist
`
`pattern. The first resist is then exposed to a plasma to fix the resist and render it
`
`“insoluble” to the solvents and developers used in forming subsequent resists. A
`
`second resist is then formed on the patterned first resist. The second resist is
`
`exposed and developed to form a second resist pattern interleaved with the first
`
`resist pattern. The two resist patterns are then used to selectively process an
`
`underlying material layer. Jinbo teaches that this technique provides reduced
`
`shape spacing than single resist techniques using the same lithographic system.
`
`For the sake of quick comparison, FIG. 5 from the ’084 patent is reproduced
`
`below, next to FIG. 1(e) from Jinbo. As annotated, both figures show a single
`
`patterned layer with a first feature from a first patterned layer and a second
`
`feature from a second patterned layer, as recited in claim 1 of the ’084 patent.1
`
`first feature
`second feature
`single
`patterned
`layer
`
`’084 patent, FIG. 5
`
`TSMC-1004, Jinbo, FIG. 1(e)
`
`1
`
`For reference, claim terms from the ’084 patent are presented in bold italics.
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`–10–
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`Petition for Inter Partes Review of U.S. 5,652,084
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`Claim 1 also recites that the first and second features … are formed
`
`relatively closer to one another than is possible through a single exposure to
`
`radiation. Jinbo teaches the same thing: “when the resolution limit is 0.4 µm, a
`
`0.3 µm line and space pattern, which exceeds the resolution limit of the system,
`
`can be obtained by applying the pattern forming method of this invention to the
`
`system.” TSMC-1004, Jinbo at p. 6.
`
`With respect to stabilizing the first patterned layer, the ’084 patent teaches
`
`that a patterned layer may be “stabilized to withstand” various processing steps,
`
`with two examples being “stabilized to withstand dissolution by solvents” and
`
`“stabilized to withstand dissolution by a subsequent developer.” TSMC-1001,
`
`Cleeves at 4:34-42. Jinbo teaches the same thing. For example, Jinbo teaches that
`
`exposing the first resist to a fluorine-containing plasma makes the resist insoluble
`
`to solvents and developers used to form the second resist. TSMC-1004, Jinbo at p.
`
`5.
`
`As discussed above, Jinbo refers to making the first patterned layer
`
`“insoluble,” while claim 1 refers to making the first patterned layer “stabilize[d].”
`
`The Petitioner submits, as discussed above, that Jinbo’s insoluble-ization process is
`
`the same as Cleeves’s stabilization process. It is further noted that both processes
`
`are describing the same thing, i.e., making the first patterned layer resistant to the
`
`formation and patterning of the second patterned layer. To the extent the Patent
`
`–11–
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`

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`Petition for Inter Partes Review of U.S. 5,652,084
`
`Owner argues that Jinbo’s and Cleeves’s processes are different, using a
`
`stabilization process as recited in the claims would have been obvious.
`
`For one, Brownell (U.S. Patent No. 4,591,547) (Exhibit TSMC-1005,
`
`“Brownell”) teaches that exposing a patterned resist to a fluorine-containing
`
`plasma also makes the resist insensitive to further radiation. This is the exact same
`
`process described in Cleeves. TSMC-1001, Cleeves at 4:65-5:4. Thus, Brownell
`
`provides further explanation of how a fluorine-containing plasma, as described in
`
`Jinbo, stabiliz[es] the first patterned layer. Thus, Brownell is not cumulative of
`
`Jinbo, but rather provides more specific details about stabilization, such details
`
`being the same as in Cleeves, than does Jinbo.
`
`Other prior art references teach even more techniques for stabilizing a
`
`patterned layer. These include:
`
` McColgin (U.S. Patent No. 4,931,351) (Exhibit TSMC-1006,
`
`“McColgin”); and
`
` Matthews (U.S. Patent No. 4,548,688) (Exhibit TSMC-1007,
`
`“Matthews”).
`
`As shown below in the present petition, it would have been obvious to use the
`
`stabilization techniques taught by these references in the double-patterning
`
`lithographic technique of Jinbo. McColgin and Matthews are not cumulative of
`
`–12–
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`Petition for Inter Partes Review of U.S. 5,652,084
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`Jinbo (and Brownell) because they are provided to address further limitations in
`
`some of the dependent claims.
`
`Finally, while Jinbo discloses patterning a resist to form resist shapes, some
`
`of the claims of the ’084 Patent (e.g., claim 13) recite using the patterned resist as a
`
`disposable post. In the same way, Cooper (U.S. Patent No. 5,158,910) (Exhibit
`
`TSMC-1008, “Cooper”) teaches that resist shapes, such as those formed by the
`
`pattern forming technique of Jinbo, may be used to form sacrificial plugs used to
`
`defining openings for contacts and other structures.
`
`As is shown below in the present petition, each element recited by the claims
`
`of the ’084 Patent was well known to one of ordinary skill in the art at the time of
`
`the invention, and the cited combinations would have been obvious to the person
`
`of ordinary skill. Accordingly, the combined references of Jinbo, Brownell,
`
`McColgin, Matthews, and Cooper render claims 1-16 of the ’084 Patent obvious
`
`under 35 U.S.C § 103.
`
`V.
`
`Identification of Challenges and Claim Construction
`
`Challenged Claims
`A.
`Claims 1-16 of the ’084 Patent are challenged in this petition.
`
`Claim Construction
`B.
`This petition presents claim analysis in a manner that is consistent with the
`
`broadest reasonable interpretation in light of the specification. See 37 C.F.R. §
`
`–13–
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`Petition for Inter Partes Review of U.S. 5,652,084
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`42.100(b). For the sake of reference, claim terms will be identified in bold italics:
`
`1.
`
`Imaging Layer
`
`The claims recite first and second imaging layers. According to the
`
`specification of the ’084 Patent, an imaging layer may include “a suitable positive
`
`photoresist”, “a suitable negative photoresist”, “a suitable radiation-sensitive
`
`polyimide”, or “other suitable radiation-sensitive materials.” TSMC-1001, Cleeves
`
`at 3:34-42. Accordingly, the term imaging layer should be construed to include a
`
`photoresist or other radiation-sensitive material. See TSMC-1009, “Declaration of
`
`Richard Blanchard (“Blanchard Decl.”) at p. 10, ¶ 26.
`
`2.
`
`Stabilizing
`
`The claims refer to stabilizing the first patterned layer (see e.g., claims 1 and
`
`15). The specification of the ’084 Patent discloses stabilizing a patterned imaging
`
`layer “to withstand subsequent lithographic processing steps.” TSMC-1001,
`
`Cleeves at 4:34-35. The ’084 Patent gives three examples of subsequent
`
`lithographic processing steps that a patterned imaging layer may be stabilized to
`
`withstand:
`
`1) “First patterned layer 232 may be stabilized to withstand chemical
`
`transformation as a result of any subsequent exposure to radiation,
`
`for example.”
`
`2) “First patterned layer 232 may also be stabilized to withstand
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`Petition for Inter Partes Review of U.S. 5,652,084
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`dissolution by solvents during a subsequent spin-on of photoresist,
`
`for example.”
`
`3) “First patterned layer 232 may further be stabilized to withstand
`
`dissolution by a subsequent developer, for example.”
`
`TSMC-1001, Cleeves at 4:35-42, emphasis added. These three examples are
`
`repeated throughout the specification. See e.g., TSMC-1001, Cleeves at 5:12-22,
`
`5:32-36, 8:51-57, etc.
`
`Thus, the term stabilizing refers to performing a process that renders a
`
`material able to withstand subsequent processing steps, such as exposure to
`
`radiation, exposure to a solvent, and/or exposure to a developer. See TSMC-1009,
`
`Blanchard Decl. at pp. 10-11, ¶ 27.
`
`3.
`
`Single Patterned Layer
`
`The ’084 Patent claims recite that “the second patterned layer and the first
`
`patterned layer form a single patterned layer”. The specification of the ’084
`
`Patent teaches that “[t]his single patterned layer is formed from the patterning of
`
`imaging layer 220 and the subsequent patterning of imaging layer 240,” and is
`
`illustrated in FIG. 5 of the ’084 Patent, reproduced below. TSMC-1001, Cleeves at
`
`7:36-40.
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`Petition for Inter Partes Review of U.S. 5,652,084
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`TSMC-1001, Cleeves, FIG. 5
`
`FIG. 5 shows that the single patterned layer is one layer that includes features from
`
`the first imaging layer (e.g., feature 232) and features from the second imaging
`
`layer (e.g., features 251 and 253).
`
`Thus, the recited single patterned layer should be construed to mean a single
`
`layer of patterned features, even if the patterned features are from more than one
`
`imaging layer. See TSMC-1009, Blanchard Decl. at p. 11, ¶ 28.
`
`4.
`
`Disposable Post
`
`Claim 13 recites “patterning the first imaging layer in accordance with a first
`
`pattern to form a first patterned layer having a first disposable post.” The
`
`specification of the ’084 Patent discloses that “disposable posts are removed to
`
`form openings for a subsequent layer, such as a contact, via, or interconnect layer
`
`for example” and refers to U.S. Application No. 08/179,615 for more details.
`
`TSMC-1001, Cleeves at 12:53-62. U.S. Application No. 08/179,615 became
`
`–16–
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`Petition for Inter Partes Review of U.S. 5,652,084
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`(through a continuation) U.S. Patent No. 5,710,061 (Exhibit TSMC-1003, the
`
`“‘061 Patent”), which provides additional detailed description about the term
`
`“disposable post.” TSMC-1003, ’061 Patent. The ‘061 patent describes a post as
`
`a patterned material, such as a photosensitive resist, disposed within a second
`
`material that is removed to form an opening in the second material. TSMC-1003,
`
`’061 Patent at 2:43-49. In the embodiments of Figs. 2A-2E, the ’061 Patent
`
`teaches “photosensitive material 220 has been patterned to form post 221 over
`
`diffusion region 201 so as to later form a contact opening in an insulative layer to
`
`be formed over the surface of the wafer.” TSMC-1003, ’061 Patent at 5:39-42.
`
`TSMC-1003, ’061 Patent, FIG. 2C
`
`Thus, the term disposable post should be construed to mean a patterned
`
`feature that can be disposed within another layer of material, and that may be
`
`removed to define an opening such as a contact, via, or interconnect layer opening.
`
`See TSMC-1009, Blanchard Decl. at pp. 11-12, ¶ 29.
`
`–17–
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`Petition for Inter Partes Review of U.S. 5,652,084
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`Statutory Grounds for Challenges
`C.
`Challenge #1: Claims 1-8, 12, 15, and 16 are anticipated under 35 U.S.C.
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`§ 102(b) by Jinbo (Exhibit TSMC-1004).
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`Challenge #2: Claims 1-8, 12, 15, and 16 are obvious under 35 U.S.C.
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`§ 103(a) over Jinbo in view of Brownell (Exhibit TSMC-1005).
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`Challenge #3: Claim 9 is obvious under 35 U.S.C. § 103(a) over Jinbo in
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`view of McColgin (Exhibit TSMC-1006).
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`Challenge #4: Claims 10 and 11 are obvious under 35 U.S.C. § 103(a) over
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`Jinbo in view of Matthews (Exhibit TSMC-1007).
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`Challenge #5: Claims 13 and 14 are obvious under 35 U.S.C. § 103(a) over
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`Jinbo in view of Brownell and Cooper (Exhibit TSMC-1008).
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`For the sake of cross-reference, the following analysis assigns reference
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`numbers, such as “[1.0],” to refer to specific portions of the claims.
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`Challenge #1: Claims 1-8, 12, 15, and 16 are anticipated
`1.
`under 35 U.S.C. § 102(b) by Jinbo
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`The following analysis explains how each claim limitation is met by the
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`combined references. Detailed factual support is provided in the included TSMC-
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`1009, Blanchard Decl. beginning at page 21.
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`–18–
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`Petition for Inter Partes Review of U.S. 5,652,084
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`Claim 1 recites:
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`[1.0] A lithography method for semiconductor fabrication using a
`semiconductor wafer, comprising the steps of:
`Jinbo teaches a “pattern forming method used in the process of
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`manufacturing semiconductor devices or the like.” TSMC-1004, Jinbo at p. 2.
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`The technique includes lithographically patterning two resist layers formed on a
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`substrate. TSMC-1004, Jinbo at pp. 4-5. Exemplary substrates include
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`semiconductor substrates such as “a silicon substrate, a GaAs substrate or other
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`type of substrate”. TSMC-1004, Jinbo at p. 3. Accordingly, Jinbo teaches a
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`lithography method for semiconductor fabrication using a semiconductor wafer as
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`recited by claim element [1.0].
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`[1.1]
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`(a) forming a first imaging layer over the semiconductor wafer;
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`The term imaging layer should be construed to include a photoresist or other
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`radiation-sensitive material. See TSMC-1009, Blanchard Decl. at p. 10, ¶ 26.
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`Jinbo teaches forming a first photoresist over the semiconductor substrate. In
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`particular, Jinbo teaches: “TSMR-365iR (positive resist for i rays made by Tokyo
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`Ohka Kogyo Co. (Ltd.)) is formed, in this application example to a thickness of 1
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`µm, as first resist 13 on substrate 11 using spin coating.” TSMC-1004, Jinbo at p.
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`4. Thus, Jinbo teaches forming a first imaging layer over the semiconductor wafer
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`as recited by claim element [1.1].
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`–19–
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`Petition for Inter Partes Review of U.S. 5,652,084
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`[1.2]
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`(b) patterning the first imaging layer in accordance with a first
`pattern to form a first patterned layer having a first feature;
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`Jinbo discloses patterning the first resist to form a patterned first resist
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`having a number of features as shown in FIG. 1B, reproduced and annotated below
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`to shown a first feature.
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`TSMC-1004, Jinbo, FIG. 1B, annotated
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`In that regard, Jinbo teaches that “first resist 13 is exposed with exposure light of
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`300 mJ/cm2” and then “the exposed first resist 13 is puddle-developed . . . and first
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`resist pattern 13a is obtained”. TSMC-1004, Jinbo at p. 4. Thus, Jinbo teaches
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`claim element [1.2].
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`[1.3]
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`(c) stabilizing the first patterned layer,
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`As discussed above, the ’084 Patent discloses stabilizing a patterned imaging
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`layer “to withstand subsequent lithographic processing steps,” and gives three
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`examples of subsequent lithographic processing steps that a patterned imaging
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`layer may be stabilized to withstand:
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`–20–
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`Petition for Inter Partes Review of U.S. 5,652,084
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`1) “chemical transformation as a result of any subsequent exposure to
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`radiation”,
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`2) “dissolution by solvents during a subsequent spin-on of photoresist”, or
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`3) “dissolution by a subsequent developer”.
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`TSMC-1001, Cleeves at 4:34-42.
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`Jinbo teaches examples 2 and 3. Specifically, Jinbo teaches exposing to
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`patterned first resist to fluorine-containing plasma in order to make it insoluble
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`“relative to the solvent and developer for the second resist.” TSMC-1004, Jinbo
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`at p. 5, emphasis added. Being insoluble to the solvent corresponds to example 2,
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`and being insoluble to the developer corresponds to example 3. Thus, Jinbo
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`teaches stabilizing the first patterned layer as recited in claim element [1.3].
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`(d) forming a second imaging layer over the first pattern layer; and
`[1.4]
`Jinbo teaches forming a second resist (15) over the patterned first resist
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`(13b) as shown in FIG. 1D, reproduced below.
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`TSMC-1004, Jinbo, FIG. 1D
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`Because the first resist (13b) has been rendered insoluble, “even though first resist
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`pattern 13b is covered by second resist 15, no destruction of the first resist pattern
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`–21–
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`Petition for Inter Partes Review of U.S. 5,652,084
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`itself occurs, and no mixing with the second resist occurs either. TSMC-1004,
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`Jinbo at p. 5. Thus, Jinbo teaches forming a second imaging layer over the first
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`pattern layer as recited in claim element [1.4].
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`[1.5]
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`(e) patterning the second imaging layer in accordance with a second
`pattern to form a second patterned layer having a second feature
`distinct from the first feature,
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`Jinbo discloses patterning the second resist to form a patterned second resist
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`having a number of features as shown in FIG. 1E, reproduced and annotated below
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`to show the first feature of the first resist and a second feature of the second resist.
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`TSMC-1004, Jinbo, FIG. 1E, annotated
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`In that regard, Jinbo teaches that “second resist 15 is exposed with exposure light
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`of 300 mJ/cm2” and then “the second resist which has been exposed is developed
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`under the same conditions as those for the first resist, and a second resist pattern
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`15a is obtained”. TSMC-1004, Jinbo at p. 5. “After second resist developing, a
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`resist pattern 17 constructed with first resist pattern 13b, which has been
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`–22–
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`Petition for Inter Partes Review of U.S. 5,652,084
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`insolubilized, and second resist pattern 15a is formed on substrate 11.” TSMC-
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`1004, Jinbo at p. 5, emphasis added. Thus, Jinbo teaches claim element [1.5].
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`[1.6] wherein the second patterned layer and the first patterned layer
`form a single patterned layer, and
`A single patterned layer as described in the specification of the ’084 Patent
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`includes a feature of the first patterned imaging layer (232) positioned between the
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`features (251 and 253) of the second patterned imaging layer. Jinbo teaches that
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`“[a]fter second resist developing, a resist pattern 17 constructed with first resist
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`pattern 13b, which has been insolubilized, and second resist pattern 15a is
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`formed on substrate 11”. TSMC-1004, Jinbo at p. 5, emphasis added.
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`TSMC-1004, Jinbo, FIG. 1E, annotated
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`As can be seen, after this second resist developing, the resist pattern (17) of Jinbo
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`has the configuration described in the ’084 Patent. Thus, Jinbo teaches claim
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`element [1.6].
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`[1.7] wherein the first and second features which are formed relatively
`closer to one another than is possible through a single exposure to
`radiation.
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`–23–
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`Petition for Inter Partes Review of U.S. 5,652,084
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`Jinbo compares the resist pattern 17 formed in the disclosed pattern forming
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`method against a comparable single exposure process and determines that the
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`double exposure method produced a 0.3µm spacing compared to a 0.4 µm spacing
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`for the single exposure method. TSMC-1004, Jinbo at pp. 5-6. “[W]hen the
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`resolution limit is 0.4 µm, a 0.3 µm line and space pattern, which exceeds the
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`resolution limit of the system, can be obtained by applying the pattern forming
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`method of this invention to the system.” TSMC-1004, Jinbo at p. 6. Thus, Jinbo
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`teaches claim element [1.7].
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`Accordingly, Jinbo teaches all of the elements of claim 1.
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`Claim 2 depends on claim 1 and further recites:
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`[2.1] wherein the first imaging layer includes a positive photoresist.
`Jinbo discloses that the first resist includes