Exhibit 2004
`Exhibit 2004
`
`
`
`

`
`(12) United States Patent
`Chiang et al.
`
`(10) Patent N0.:
`
`(45) Date of Patent:
`
`US 6,398,929 B1
`Jun. 4, 2002
`
`US006398929B1
`
`(54) PLASMA REACTOR AND SHIELDS
`GENERATING SELF-IONIZED PLASMA FOR
`SPUTTERING
`
`Primary Examiner—Rodney G. McDonald
`(74) Attorney, Agent, or Firm—Law Offices of Charles
`Guenzer
`
`Inventors: Tony P. Chiang, San Jose; Yu D.
`Cong, Sunnyvale; Peijun Ding, San
`Jose; Jianming Fu, San Jose; Howard
`t
`.
`.
`H. Tang, San Jose, Anish Tolia, San
`Jose’ ah of CA (US)
`
`ABSTRACT
`(57)
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`A DC
`magne ron spu er. reac or or spu ering copper,.1 s
`method of use, and shields and other parts promoting
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`(*) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`Utstct 154(h) by 0 days.
`
`(21) Appl' No: 09/414’614
`(22)
`Filed:
`Oct. 8, 1999
`
`7
`
`.............................................. .. C23C 14/34
`Int. Cl.
`(51)
`................................................ .. 204/298.11
`(52) U.S. Cl.
`Of Search ................................... ..
`_
`References Clted
`Us. PATENT DOCUMENTS
`
`(56)
`
`---- ~~ 204/298-12
`8/1997 V311 G0gh ‘*1 31-
`5,658,442 A *
`---- -- 204/192-1
`5590795 A * 11/1997 Rosehstehl et 31-
`5,736,021 A
`4/1998 Ding et al.
`.......... .. 204/298.11
`5379523 A
`3/1999 Wang et al‘ """"" " 204/29811
`FOREIGN PATENT DOCUMENTS
`
`EP
`
`0 878 843
`
`11/1998
`
`* cited by examiner
`
`73
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`a small magnetron having poles of unequal magnetic
`Shehgth ahd 3 high POW“ aPPhed 10 the target dhhhg
`sputtering. The target power for a 200 mm wafer 1S prefer-
`ably at least 10 kW, more preferably, at least 18. kW, and
`most preferably, at least 24 kW. Hole filling with SIP 1S
`'
`dbl
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`preferably at least 80%, most preferably at least 140%. The
`SIP copper layer can act as a seed and nucleation layer for
`hole fiihhg with Conventional Sputtering (PVD) or with
`electrochemical plating (ECP). For Very high aSpect_iatic
`hgles, a Cgpper Seed layer is depgsited
`Chemical Vapgr
`deposition (CVD) over the SIP copper nucleation layer, and
`PVD or ECP completes the hole filling. The copper seed
`layer may be deposited by a combination of SIP and
`high-density plasma sputtering. For very narrow holes, the
`CVD copper layer may fill the hole. Preferably, the plasma
`is ignited in a cool process in which low power is applied to
`the target in the hresehee of a higher pressure of argon
`working gas After ignition the pressure is reduced and
`target power is ramped up to a relatively high operational
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`Jun. 4, 2002
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`Sheet
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`US 6,398,929 B1
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`U.S. Patent
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`Jun. 4, 2002
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`Sheet 2 of 6
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`US 6,398,929 B1
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`U.S. Patent
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`Jun. 4, 2002
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`Sheet 3 of 6
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`US 6,398,929 B1
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`U.S. Patent
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`Jun. 4, 2002
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`Sheet 4 of 6
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`US 6,398,929 B1
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`U.S. Patent
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`Jun. 4, 2002
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`Sheet 5 of 6
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`US 6,398,929 B1
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`

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`U.S. Patent
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`Jun. 4, 2002
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`Sheet 6 of 6
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`US 6,398,929 B1
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`246
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`240
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`BARRIER
`
`CVD
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`214
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`US 6,398,929 B1
`
`1
`PLASMA REACTOR AND SHIELDS
`GENERATING SELF-IONIZED PLASMA FOR
`SPUTTERING
`
`FIELD OF THE INVENTION
`
`The invention relates generally to sputtering. In particular,
`the invention relates to the apparatus for sputter deposition
`of copper in the formation of semiconductor integrated
`circuits.
`
`BACKGROUND ART
`
`Semiconductor integrated circuits typically include mul-
`tiple levels of metallization to provide electrical connections
`between the large number of active semiconductor devices.
`Advanced integrated circuits, particularly those for
`microprocessors, may include five or more metallization
`levels.
`In the past, aluminum has been the favored
`metallization, but copper has been developed as a metalli-
`zation for advanced integrated circuits.
`A typical metallization level is illustrated in the cross-
`sectional view of FIG. 1. A lower-level layer 10 includes a
`conductive feature 12. If the lower-level
`layer 10 is a
`lower-level dielectric layer, such as silica or other insulating
`material, the conductive feature 12 may be a lower-level
`copper metallization, and the vertical portion of the upper-
`level metallization is referred to as a via since it intercon-
`
`nects two levels of metallization. If the lower-level layer 10
`is a silicon layer, the conductive feature 12 may a doped
`silicon region, and the vertical portion of the upper-level
`metallization is referred to as a contact because it electrically
`contacts silicon. An upper-level dielectric layer 14 is depos-
`ited over the lower-level level dielectric layer 10 and the
`lower-level metallization 12. There are yet other shapes for
`the holes including lines and trenches. Also, in dual dama-
`scene and similar interconnect structures, as described
`below,
`the holes have a complex shape.
`In some
`applications, the hole may not extend through the dielectric
`layer. The following discussion will refer to only via holes,
`but in most circumstances the discussion applies equally
`well to other types of holes with only a few modifications
`well known in the art.
`
`Conventionally, the dielectric is silicon oxide formed by
`plasma-enhanced chemical vapor deposition (PECVD)
`using tetraethylorthosilicate (TEOS) as the precursor.
`However, low-k materials of other compositions and depo-
`sition techniques are being considered, and the invention is
`equally applicable to them. Some of the low-k dielectrics
`being developed can be characterized as silicates, such as
`fluorinated silicate glasses. Hereafter, only silicate (oxide)
`dielectrics will be directly described, but the invention is
`applicable in large part to other dielectric compositions.
`Avia hole is etched into the upper-level dielectric layer 14
`typically using, in the case of silicate dielectrics, a fluorine-
`based plasma etching process.
`In advanced integrated
`circuits, the via holes may have widths as low as 0.181 pm
`or even less. The thickness of the dielectric layer 14 is
`usually at least 0.7 gm, and sometimes twice this, so that the
`aspect ratio of the hole may be 4 or greater. Aspect ratios of
`6 and greater are being proposed. Furthermore,
`in most
`circumstances, the via hole should have a vertical profile.
`Aliner layer 16 is conformally deposited onto the bottom
`and sides of the hole and above the dielectric layer 14. The
`liner 16 performs several functions. It acts as an adhesion
`layer between the dielectric and the metal since metal films
`tend to peel from oxides. It acts as a barrier against the
`inter-diffusion between the oxide-based dielectric and the
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`2
`metal. It may also act as a seed and nucleation layer to
`promote the uniform adhesion and growth and possibly
`low-temperature reflow for the deposition of metal filling the
`hole and to nucleate the even growth of a separate seed layer.
`A metal layer 18, for example, of copper is then deposited
`over the liner layer 16 to fill the hole and to cover the top of
`the dielectric layer 14. Conventional aluminum metalliza-
`tions are patterned into horizontal interconnects by selective
`etching of the planar portion of the metal layer 18. However,
`a preferred technique for copper metallization, called dual
`damascene, forms the hole in the dielectric layer 14 into two
`connected portions, the first being narrow vias through the
`bottom portion of the dielectric and the second being wider
`trenches in the surface portion which interconnect the vias.
`After the metal deposition, chemical mechanical polishing
`(CMP)
`is performed which removes the relatively soft
`copper exposed above the dielectric oxide but which stops
`on the harder oxide. As a result, multiple copper-filled
`trenches of the upper level, similar to the conductive feature
`12 of the next lower level, are isolated from each other. The
`copper filling the trenches acts as horizontal interconnects
`between the copper-filled vias. The combination of dual
`damascene and CMP eliminates the need to etch copper.
`Several layer structures and etching sequences have been
`developed for dual damascene, and other metallization
`structures have similar fabrication requirements.
`Filling via holes and similar high aspect-ratio structures,
`such as experienced in dual damascene, has presented a
`continuing challenge as their aspect ratios continue to
`increase. Aspect ratios of 4: 1 are common and the value will
`further increase. An aspect ratio of defined as the ratio of the
`depth of the hole to narrowest width of the hole, usually near
`its top surface. Via widths of 0.18 pm are also common and
`the value will further decrease. For advanced copper inter-
`connects formed in oxide dielectrics, the formation of the
`barrier layer tends to be distinctly separate from the nucle-
`ation and seed layer. The diffusion barrier may be formed
`from a bilayer of Ta/TaN, W/WN, or Ti/TiN, or of other
`structures. Barrier thicknesses of 10 to 50 nm are typical. For
`copper interconnects, it has been found necessary to deposit
`one or more copper layers to fulfill the nucleation and seed
`functions. The following discussion will address the forma-
`tion of the copper nucleation and seed layer as well as the
`final copper hole filling.
`The deposition of the metallization by conventional
`physical vapor deposition (PVD), also called sputtering, is
`relatively fast. A DC magnetron sputtering reactor has a
`target composed of the metal to be sputter deposited and
`which is powered by a DC electrical source. The magnetron
`is scanned about the back of the target and projects its
`magnetic field into the portion of the reactor adjacent the
`target
`to increase the plasma density there to thereby
`increase the sputtering rate. However, conventional DC
`sputtering (which will be referred to as PVD in distinction
`to other types of sputtering to be introduced) predominantly
`sputters neutral atoms. The typical ion densities in PVD are
`less than 109 cm‘3. PVD also sputters atoms into a wide
`angular distribution, typically having a cosine dependence
`about the target normal. Such a wide distribution is disad-
`vantageous for filling a deep and narrow via hole 22 illus-
`trated in FIG. 2, in which a barrier layer 24 has already been
`deposited. The large number of off-angle sputter particles
`cause a copper layer 26 to preferentially deposit around the
`upper corners of the hole 22 and form overhangs 28. Large
`overhangs further restrict entry into the hole 22 and at a
`minimum cause inadequate coverage of the sidewalls 30 and
`bottom 32 of the hole 22. At worst, the overhangs 28 bridge
`
`

`
`US 6,398,929 B1
`
`3
`the hole 22 before it is filled and create a void 34 in the
`metallization within the hole 22. Once a void 34 has formed,
`it
`is almost
`impossible to reflow it out by heating the
`metallization to near its melting point. Even a small void
`introduces serious reliability problems. If a second copper
`deposition step is planned, such as by electroplating, the
`bridged overhangs make it impossible.
`One approach to ameliorate the overhang problem is
`long-throw sputtering in a conventional reactor. In long-
`throw sputtering the target is spaced relatively far from the
`wafer being sputter coated. For example, the target-to-wafer
`spacing is at least 50% of wafer diameter, preferably is more
`than 90%, and more preferably is more than 140%. As a
`result, the off-angle portion of the sputtering distribution is
`preferentially directed to the chamber walls, but the central-
`angle portion remains directed to the wafer. The truncated
`angular distribution causes a higher fraction of the sputter
`particles to be directed deeply into the hole 22 and reduces
`the extent of the overhangs 28. A similar effect is accom-
`plished by positioning a collimator between the target and
`wafer. Because the collimator has a large number of holes of
`high aspect ratio, the off-angle sputter particles strike the
`sidewalls of the collimator, and only the central-angle par-
`ticles are passed. Both long-throw targets and collimators
`disadvantageously reduce the flux of sputter particles reach-
`ing the wafer. That is, they reduce the sputter deposition rate.
`The reduction becomes more pronounced as longer throws
`and stricter collimation become required for via holes of
`increasing aspect ratios. Long throw is further limited by the
`the longer substrate-to-target distance over which the sput-
`tered particles must travel. At the few milliTorr of argon
`pressure used in conventional PVD even with long throw,
`there is a greater possibility of the argon scattering the
`sputtered particles. Hence, the geometric selection of the
`forward particles is decreased. A yet further problem with
`both long throw and collimation is that the reduced copper
`flux necessitates a longer deposition period. This not only
`reduces throughput, it also tends to increase the maximum
`temperature the wafer experiences during sputtering. Long
`throw reduces over hangs and provides good coverage in the
`middle and upper portions of the sidewalls, but the lower
`sidewall and bottom coverage are inferior.
`Another technique for deep hole filling is sputtering using
`a high-density plasma (HDP) in a sputtering process called
`ionized metal plating (IMP). A high-density plasma is
`defined as one having an average plasma density across the
`plasma, exclusive of the plasma sheaths, of at least 1011cm‘
`3, and preferably at least 1012cm‘3. In IMP deposition, a
`separate plasma source region is formed in a region away
`from the wafer, for example, by inductively coupling RF
`power into an electrical coil wrapped around a plasma
`source region between the target and the wafer. This con-
`figuration is commercially available from Applied Materials
`of Santa Clara, Calif. as the HDP PVD Reactor. Other HDP
`sputter reactors are available. The higher power ionizes not
`only the argon working gas, but also significantly increases
`the ionization fraction of the sputtered atoms, that is, pro-
`duces metal ions. The wafer either self-charges to a negative
`potential or is RF biased to control its DC potential. The
`metal ions are accelerated across the plasma sheath as they
`approach the negatively biased wafer. As a result,
`their
`angular distribution becomes strongly peaked in the forward
`direction so that they are drawn deeply into the via hole.
`Overhangs become much less of a problem in IMP
`sputtering, and bottom coverage and bottom sidewall cov-
`erage are relatively high.
`IMP deposited metals, however, suffer many problems.
`First, HDP sputter reactors are expensive. Secondly, IMP
`
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`sputtering using a remote plasma source is usually per-
`formed at a higher pressure of at least 30 milliTorr. The
`higher pressures and a high-density plasma produce a very
`large number of argon ions, which are also accelerated
`across the plasma sheath to the surface being sputter depos-
`ited. The high-energy argon ions cause a number of prob-
`lems. The argon ion energy is dissipated as heat directly into
`the film being formed. Copper will dewet from tantalum
`nitride and other barrier materials at the elevated tempera-
`tures experienced in IMP, even at temperatures as low at 50
`to 75° C. Further, the argon tends to become embedded in
`the developing film, which cannot be a good effect.
`Experimentally, it is observed that IMP deposits a copper
`film 36, as illustrated in the cross-sectional view of FIG. 3,
`having a surface morphology that is very rough or even
`discontinuous. Such a film does not promote hole filling,
`particularly when the liner is being used as the electrode for
`electroplating.
`Another technique for depositing copper is sustained
`self-sputtering (SSS), as is described by Fu et al. in U.S.
`patent application Ser. No. 08/854,008 pending, filed May 8,
`1997 and by Fu in U.S. Ser. No. 09/373,097, filed Aug. 12,
`1999 now U.S. Pat. No. 6,183,614. At a sufficiently high
`plasma density adjacent a copper target, a sufficiently high
`density of copper ions develops that the copper ions will
`resputter the copper target with yield over unity. The supply
`of argon working gas can then be eliminated or at least
`reduced to a very low pressure while the copper plasma
`persists. Aluminum is not subject
`to SSS. Some other
`materials, such as Pd, Pt, Ag, and Au can also undergo SSS.
`Depositing copper by sustained self-sputtering of copper
`has a number of advantages. The sputtering rate in SSS tends
`to be high. There is a high fraction of copper ions which can
`be accelerated across the plasma sheath and toward a biased
`wafer, thus increasing the directionality of the sputter flux.
`Chamber pressures may be made very low, often limited by
`leakage of backside cooling gas, thereby reducing wafer
`heating from the argon ions and decreasing scattering of the
`metal particles by the argon. It has, however, been found that
`standard long-throw PVD chambers will not support SSS of
`copper.
`Techniques and reactor structures have been developed to
`promote sustained self-sputtering. It has been observed that
`some sputter materials not subject to SSS because of sub-
`unity resputter yields nonetheless benefit from these same
`techniques and structures, presumably because of partial
`self-sputtering, which results in a partial self-ionized plasma
`(SIP). Furthermore,
`it
`is often advantageous to sputter
`copper with a low but finite argon pressure even though SSS
`without any argon working gas is achievable. Hence, SIP
`sputtering of copper is the preferred terminology for the
`more generic sputtering process involving a reduced or zero
`pressure of working gas so that SSS is a type of SIP.
`Copper may also be deposited by chemical vapor depo-
`sition (CVD) using metallo-organic precursors, such as
`Cu-HFAC-VTMS, commercially available from Schuma-
`cher in a proprietary blend with additional additives under
`the trade name CupraSelect. Athermal CVD process may be
`used with this precursor, as is very well known in the art, but
`plasma enhanced CVD (PECVD) is also possible. The CVD
`process is capable of depositing a nearly conformal film
`even in the high aspect-ratio holes being considered here.
`The original concept was to CVD deposit a copper film as
`a thin seed layer, and then use PVD or other technique for
`final copper hole filling. The proposed concept was based on
`the expense associated with CVD processes and equipment
`needed for filling a relatively wide via hole of perhaps 0.25
`
`

`
`US 6,398,929 B1
`
`5
`to 0.5 pm width. However, CVD copper seed layers have
`been observed to be almost invariably rough. The roughness
`detracts from its use as a seed layer and more particularly as
`a reflow layer promoting the low temperature reflow of after
`deposited copper deep into hole. Also, the roughness indi-
`cates that a relatively thick CVD copper layer of the order
`of 50 nm needs to be deposited to reliably coat a continuous
`seed layer. For the narrower via holes now being considered,
`a CVD copper seed layer of the necessary thickness may
`nearly fill the hole anyway. However, complete fills per-
`formed by CVD tend to suffer from center seams, which
`may impact device reliability.
`Another, combination technique uses IMP sputtering to
`deposit a thin copper nucleation layer, sometimes referred to
`as a flash deposition, and a thicker CVD copper seed layer
`is deposited on the IMP layer. However, as was illustrated in
`FIG. 3, the IMP layer 36 tends to be rough, and the CVD
`layer tends to conformally follow the roughened substrate.
`Hence, the CVD layer over an IMP layer will also be rough.
`Electrochemical plating (ECP)
`is yet another copper
`deposition technique that is being developed and is likely to
`become the preferred commercial filling process. In this
`method, the wafer is immersed in a copper electrolytic bath.
`The wafer is electrically biased with respect to the bath, and
`copper electrochemically deposits on the wafer in a gener-
`ally conformal process. Electroless plating techniques are
`also available. Electroplating and its related processes are
`advantageous because they can be performed with simple
`equipment at atmospheric pressure, the deposition rates are
`high, and the liquid processing is consistent with the sub-
`sequent chemical mechanical polishing.
`Electroplating, however, imposes its own requirements. A
`seed and adhesion layer is required on top of the barrier
`layer, such as of Ta/TaN, to nucleate the electroplated copper
`and adhere it
`to the barrier material. Furthermore,
`the
`generally insulating structure surrounding the via hole 22
`requires that an electroplating electrode be formed between
`the dielectric layer 14 and the via hole 22. Tantalum and
`other barrier materials are typically relatively poor electrical
`conductors, and the usual nitride sublayer of the barrier layer
`24 which faces the via hole 22 (containing the copper
`electrolyte) is even less conductive for the long transverse
`current paths needed in electroplating. Hence, a good con-
`ductive seed and adhesion layer must be deposited if the
`electroplating is to effectively fill the bottom of the via hole.
`Acopper seed layer deposited over the barrier layer 24 is
`typically used as the electroplating electrode. However, its
`integrity must be assured, and a continuous, smooth, and
`uniform film is preferred. Otherwise,
`the electroplating
`current will be directed only to the areas covered with
`copper or be preferentially directed to areas covered with
`thicker copper. Depositing the copper seed layer presents its
`own difficulties. An IMP deposited seed layer provides good
`bottom coverage in high aspect-ratio holes, but its sidewall
`coverage is so small that the resulting thing films can be
`rough to the point of discontinuity,
`leading to sidewall
`voiding. A thin CVD deposited seed is also too rough. A
`thicker CVD seed layer or CVD copper over IMP copper,
`may require an excessively thick seed layer to achieve the
`required continuity. Also, the electroplating electrode pri-
`marily operates on the entire hole sidewalls so that high
`sidewall coverage is desired. Long throw provides a
`adequate sidewall coverage, but the bottom coverage is not
`sufficient.
`
`Accordingly, a better method is desired for filling a via
`hole with copper.
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`Sputtering of copper has been observed to create prob-
`lems not observed with sputtering of other electronic mate-
`rials. Scattered copper atoms have been observed to diffuse
`much further into narrow recesses in the sputtering
`apparatus, especially for low-pressure SSS and SIP. Since
`sputtering, particularly at the high power levels associated
`with SSS and SIP, involves high voltages, dielectric isolators
`must separate the differently biased parts. These isolators
`tend, however, to become coated with copper during SSS
`sputtering and thus require frequent replacement or clean-
`ing.
`As a result, it is desired to protect such isolators from
`copper deposition.
`A standard part of a sputtering chamber is a chamber
`shield which protects the chamber walls from deposition.
`The shield rather than the wall is coated and is much more
`
`easily removed or cleaned when the sputter coating builds
`up to excessive thickness. Typically, the shield is metallic
`and is electrically grounded to act as the grounding plane for
`the cathode target. However, it has become known that an
`auxiliary electrically floating shield placed around the upper
`part of the chamber near the target allows for sputtering at
`lower pressure. Such a floating shield has typically been
`simply supported on a shield isolator without any clamping.
`However, an unclamped shield introduces additional
`mechanical motion during the thermal cycling, which
`impacts the tolerances required of plasma dark spaces and
`proper target biasing. Shield flexing may cause excessive
`particulate flaking.
`Improper gaps and configurations
`between the shields and isolators cause electrical shorts. If
`
`the unclamped shield has moved during thermal cycling,
`there often is no assurance that it returns to its original
`position upon cooling so that on the next cycle it may be
`even further askew.
`
`For these reasons, better alignment
`unclamped shields.
`low pressures, particularly those
`Plasma sputtering at
`associated with SIP and SSS, may introduce a problem with
`igniting the plasma.
`Ignition of the plasma involves a
`different set of conditions than does its continued excitation.
`
`is desired for
`
`Often, a higher-pressure working gas, such as argon, needs
`to be admitted to the chamber to produce ignition. However,
`the film sputter coated in the presence of a larger amount of
`argon is not likely to conform to the type of film desired in
`low-pressure sputtering. Furthermore, igniting the plasma
`can be problematical resulting in long and undependable
`ignition sequences.
`Accordingly, it is desired to provide better ignition of
`plasma for low-pressure sputtering, particularly of copper.
`SUMMARY OF THE INVENTION
`
`The invention may be summarized as a method of sputter
`depositing copper combining long-throw sputtering with
`self-ionized plasma (SIP) sputtering. Long-throw sputtering
`is characterized by a relatively high ratio of the target-to-
`substrate distance and the substrate diameter. Long-throw
`SIP sputtering promotes deep hole coating of both the
`ionized and neutral copper components.
`SIP is promoted by low pressures of less than 5 milliTorr,
`preferably less than 2 milliTorr, and more preferably less
`than 1 milliTorr. SIP, particularly at these low pressures, is
`promoted by magnetrons having relatively small areas to
`thereby increase the target power density, and by magne-
`trons having asymmetric magnets causing the magnetic field
`to penetrate far toward the substrate. SIP is also promoted by
`an electrically floating sputtering shield extending relatively
`
`

`
`US 6,398,929 B1
`
`7
`far away from the target, preferably in the range of 6 to 10
`cm. Advantageously, a first narrow convolute channel is
`formed between the floating shield and a grounded shield
`and a second narrow convolute channel is formed between
`
`the floating shield and the target. Such channels prevent
`copper or other metal atoms ions from penetrating to the area
`of dielectric spacers and O-rings separating the target, the
`floating shield, and the grounded shield. The widths of such
`channels are preferably in the range of 100 to 120 mils (2.5
`to 3
`The aspect ratio of the bottom cylindrical portion
`of the channel between the two shields preferably has an
`aspect ratio of at least 4:1, more preferably at least 8:1. The
`channels preferably include two 90° turns.
`Accordingly to one aspect of the invention, the sputtering
`conditions are controlled to provide a balance between SIP
`and conventional sputtering using a working gas to thereby
`control the ratio of copper ions and neutral copper atoms in
`the sputter flux.
`The invention may be used to deposit a copper seed layer,
`promoting the nucleation or seeding of an after deposited
`layer, particularly useful for forming narrow and deep vias
`or contacts through a dielectric layer. The second copper
`layer may be deposited by electrochemical plating (ECP).
`In another embodiment of the inventive process for filling
`the hole, the second copper layer is be deposited by chemical
`vapor deposition (CVD). The CVD layer may itself be used
`as a seed layer for subsequent ECP, or the CVD layer may
`completely fill the hole, especially for very high aspect-ratio
`holes.
`
`In yet another embodiment of the inventive process for
`forming a copper seed layer, a first step deposits a portion of
`a thin copper seed layer in a high-density plasma in a process
`referred to as ionized metal plating (IMP), and a second step
`deposits another portion of the copper seed layer in a SIP
`process.
`
`Another aspect of the invention involves the chamber
`shields. A longer floating shield promotes plasma ignition.
`Furthermore, a narrow convolute channel
`is preferably
`formed between the floating and grounded shields, whereby
`isolators involved with supporting and isolating the shields
`are protected from being coated with the sputtered metal.
`Centering means keep an electrically and mechanically
`floating shield aligned through the temperature cycling.
`Barriers are formed between the processing volume and
`sliding surfaces existing between the isolator, the floating
`shield, and the support surfaces.
`Yet another aspect of the invention involves the ignition
`sequence. Preferably, the plasma is ignited at a relatively
`high pressure of the working gas but at a reduced target
`power level. After plasma ignition, the chamber pressure is
`reduced and the target power is increased to their operational
`sputtering levels.
`BRIEF DESCRIPTION OF THE DRAWINGS
`FIG. 1 is a cross-sectional view of a via filled with a
`
`metallization, which also covers the top of the dielectric, as
`practiced in the prior art.
`FIG. 2 is a cross-sectional view of a via during its filling
`with metallization, which overhangs and closes off the via
`hole.
`
`FIG. 3 is a cross-sectional view of a via having a rough
`seed layer deposited by ionized metal plating.
`FIG. 4 is a schematic representation of a sputtering
`chamber usable with the invention.
`
`FIG. 5 is an exploded view of a portion of FIG. 4 detailing
`the target, shields, isolators and target O-ring.
`
`10
`
`15
`
`20
`
`25
`
`30
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`8
`FIG. 6 is a graph illustrating the relationship between the
`length of the floating shield and the minimum pressure for
`supporting a plasma.
`FIG. 7 is a cross-sectional view of via metallization
`
`according to one embodiment of the invention.
`FIGS. 8 and 9 are graphs plotting ion current flux across
`the wafer for two different magnetrons and different oper-
`ating conditions.
`FIG. 10 is a cross-sectional view of a via metallization
`
`according to a second embodiment of the invention.
`FIG. 11 is a cross-sectional view of a via metallization
`
`according to a third embodiment of the invention.
`FIG. 12 is a flow diagram of a plasma ignition sequence
`which reduces heating of the wafer.
`FIG. 13 is a schematic view of a integrated processing
`tool on which the invention may be practiced.
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENTS
`
`The distribution between ionized and neutral atomic flux
`
`in a DC magnetron sputtering reactor can be tailored to
`produce a smooth conformal copper liner in a hole in a
`dielectric layer, either by itself or in combination with a
`copper seed layer deposited by chemical vapor deposition
`(CVD) over a sputtered copper nucleation layer. The copper
`liner layer is particularly useful as a thin seed layer for
`electroplated copper.
`The DC magnetron sputtering reactors of the prior art
`have been directed to either conventional, working gas
`sputtering or
`to sustained self-sputtering. The two
`approaches emphasize different types of sputtering. It is, on
`the other hand, preferred that the reactor for the copper liner
`combine various aspects of the prior art
`to control
`the
`distribution between ionized copper atoms and neutrals. An
`example of such a reactor 50 is illustrated in the schematic
`cross-sectional view of FIG. 4. This reactor is based on a
`modification of the Endura PVD Reactor available from
`
`Applied Materials, Inc. of Santa Clara, Calif. The reactor 50
`includes a vacuum chamber 52, usually of metal and elec-
`trically grounded, sealed through a target isolator 54 to a
`PVD target 56 having at least a surface portion composed of
`the material, in this case copper or a copper alloy,
`to be
`sputter deposited on a wafer 58. The alloying element is
`typically present to less than 5 wt %, and essentially pure
`copper may be used if adequate barriers are otherwise
`formed. A wafer clamp 60 holds the wafer 58 on a pedestal
`electrode 62. Unillustrated resistive heaters,
`refrigerant
`channels, and thermal transfer gas cavity in the pedestal 62
`allow the temperature of the pedestal to be controlled to
`temperatures of less than —40° C. to thereby allow t