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`Skyworks Ex. 2005
` Kinetic v. Skyworks
` Case IPR2014-00530
`
`

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`Page 2
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`Page 2
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`

`
`DIGITAL DESIGl\_l
`
`THIRD EDITION
`
`M. Morris Mano
`CALIFORNIA STATE UNIVERSITY; LOS ANGELES
`
`
`
`Prentice Hail
`
`Upper Saddle River, N] OM53
`
`Page 3
`
`Page 3
`
`

`
`Library of Congress Cataloging-in-Publication Data
`CIP Data on File.
`
`Vice President and Editorial Director. ECS: Marcia J. Hurlon
`Publisher: Tom Robbin:
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`Managing Editor: Duw'1lA_ George
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`Manufacturing Buyer: Lisa McDowell
`Marketing Manager: Holly Stark
`Marketing Assistant: Karen Moon
`
`P1‘(§1]ij(jc
`Haj]
`
`
`
`© 2002, 1991, 1984 by Prentice-Hall, Inc.
`Pearson Education
`Upper Saddle River, New Iersey 07458
`
`All rights reserved. No part of this book may be reproduced, in any form or by any means,
`without permission in writing from the publisher.
`
`Vcrilogger Pro and SynapLiCAD are trademarks of SynaptiCAD, inc,, Blacksburg. VA 24-062——0608.
`
`Printed in the United States of America
`
`10987654321
`
`ISBN O-‘I3-O62’|2’|—8
`
`Prentice-Hail International (UK) Limited, London
`Prentice-Hall of Australia Pty, Limited, Sydney
`Prentice-Hall of Canada, 1nc., Toronto
`Prentice-Hall I-iispanoamericana, S. A., Mexico City
`Preniice—Hall of India Private Limited, New Delhi
`Prenh‘ce—I-Iall of Japan, Inc, Tokyo
`Pearson Asia Pte. Ltd., Singapore
`Editora Prenh'ce—I-Iail do Brasil, Ltd:-1., Rio tie janeiro
`
`Page 4
`
`Page 4
`
`

`
`Page 5
`
`Page 5
`
`

`
`Page 6
`
`Page 6
`
`

`
`
`
`CONTENTS
`
`ix
`
`ii
`
`P R E F A C E
`
`1
`
`BINARY SYSTEMS
`
`1+1
`1-2
`1-3
`
`14
`1 5
`I-6
`1-?
`1-3
`1»?
`
`Digibai Systems
`Binary Numbers
`Number Base Colwersions
`
`Octal and Hexadecimal Numbers
`Complements
`Signed Binary Numbers
`Binary Codes
`Binary Storage and Registers
`Binary Logic
`
`I
`3
`5
`
`.7‘
`'5'
`I3
`In‘;
`24
`2?
`
`2
`BOOLEAN ALGEBRA AND LOGIC GATES
`33
`
`
`L1
`2-2
`2-3
`
`24
`2~5
`2~6
`2-?
`2-8
`
`Basic Definitions
`Axiornatic Definition of Boolean Algebra
`Basic Theorems and Properties
`of Booiean Algebra
`Boolean Functions
`Canonical and Standard Forms
`Other Logic Operations
`Digital Logic Gates
`Integrated Circuits
`
`33
`34
`
`3.7
`40
`44
`51
`54
`5.9
`
`Page 7
`
`Page 7
`
`

`
`vi
`
`Contents
`
`
`
` 3 GATE-LEVEL MINIMIZATION 64
`
`
`
`3-1
`3-2
`3-3
`3-4
`3-5
`3-6
`3-7
`3-8
`3-9
`
`The Map Method
`Four-Variable Map
`Five-Variable Map
`Product of Sums Simplification
`Don't-Care Conditions
`NAND and NOR Implementation
`Other Two-Level Implementations
`Exclusive-OR Function
`Hardware Description Language (HDL)
`
`4
`
`COMBINATIONAL LOGIC
`
`4-1
`4-2
`4-3
`4-4
`4-5
`4-6
`4-7
`4-8
`
`4-9
`4-70
`4-17
`
`Combinational Circuits
`Analysis Procedure
`Design Procedure
`Binary Adder-Subtractor
`Decimal Adder
`Binary Multiplier
`Magnitude Comparator
`Decoders
`
`Encoders
`Multiplexers
`HDL For Combinational Circuits
`
`64
`70
`74
`76
`80
`82
`89
`94
`99
`
`777
`7 72
`775
`7 79
`729
`737
`733
`734
`
`739
`747
`747
`
`771
`
`S
`
`SYNCHRONOUS SEQUENTIAL LOGIC
`
`767
`
`5-1
`5-2
`5-3
`5-4
`5-5
`5-6
`5-7
`
`Sequential Circuits
`Latches
`Flip-Flops
`Analysis of Clocked Sequential Circuits
`HDL For Sequential Circuits
`State Reduction and Assignment
`Design Procedure
`
`6
`
`REGISTERS AND COUNTERS
`
`6-1
`6-2
`6-3
`6-4
`6-5
`6-6
`
`Registers
`Shift Registers
`Ripple Counters
`Synchronous Counters
`Other Counters
`HDL for Registers and Counters
`
`767
`769
`772
`780
`790
`798
`203
`
`2 7 7
`279
`227
`232
`239
`244
`
`217
`
`Page 8
`
`Page 8
`
`

`
`MEMORY AND PROGRAMMABLE LOGIC
`
`2.55
`
`Contents
`
`ell
`
`3-1
`?-2
`7-3
`?--4
`?-5
`7-6
`I»'—?
`?-B
`
`Introduction
`Rendomviccess Memory
`Memory Decoding
`Error Detection and Correction
`Read-Only Memory
`Programmable Logic. Array
`Programmable Array Logic
`Sequential Programmaiale Devices
`
`REGISTER TRANSFER LEVEL
`
`3-‘!
`3-2
`3-3
`8-4
`8-5
`8-6
`3-?
`3+8
`3-9
`
`Register Transfer Level (RTL) Notation
`Register Transfer Level in HDL
`Algorithmic State Machines {ASM)
`Design Example
`HDL Description of Design Example
`Binary Multiplier
`Controi Logic
`HDL Descrilflxtion of Binary Multiplier
`Design Wit Multiplexers
`
`255
`2.56
`262
`267
`2211
`276
`230
`283
`
`29?
`293
`299
`304
`310
`3??
`321
`326
`32-9
`
`ASYNCHRONOUS SEQUENTIAL LOGIC
`
`9-1
`9-2
`9-3
`9-4
`9-5
`9-6
`9-?
`9-8
`
`Introduction
`Analysis Procedure
`Circuits With Latches
`Design Procedure
`Reduction of State and Fiovv Tables
`I’-lace—Free State Assignment
`Hazards
`Design Exampie
`
`DIGITAL INTEGRATED CIRCUITS
`
`10-1
`19-2
`10-3
`10-4
`1U—5
`I043
`10-?
`10-8
`
`In trotluction
`Special Characteristics
`Bipolar-Transistor Characteristics
`HTL and DTL Circuits
`Transisto r-Transistor Logic ETFL)
`Emitter-Coupled logic (LCL)
`Meta|+(.‘n-ride Semicorn:iuctor (M05)
`Complementary MOS (CMOS)
`
`342
`344
`352
`360
`36.7
`334
`3 79
`384
`
`3 98
`400
`404
`403
`4 I 0
`420
`#2}
`423
`
`Page 9
`
`

`
`viii
`
`Contents
`
`10-9
`10-10
`
`CMOS Transmission Gate Circuits
`Switch-Lever Modeling With HDL
`
`427
`430
`
`11
`LABORATORY EXPERIMENTS
`437
`
`
`11-0
`11-1
`11-2
`11-3
`11-4
`
`Introduction to Experiments
`Binary and Decimal Numbers
`Digital Logic Gates
`Simplification of Boolean Functions
`Combinational Circuits
`
`11-5
`Code Converters
`11-6
`Design with Multiplexers
`11-7
`Adders and Subtractors
`11-8
`Flip-flops
`11-9
`Sequential Circuits
`11-10
`Counters
`11-11
`Shift Registers
`11-12
`Serial Addition
`11-13 Memory Unit
`11-14
`Lamp Handball
`11-15
`Clock-Pulse Generator
`
`11-16
`
`Parallel Adder and Accumulator
`
`Binary Multiplier
`11-17
`11-18 Asynchronous Sequential Circuits
`11-19
`Verilog HDL Simulation Experiments
`
`12
`
`STANDARD GRAPHIC SYMBOLS
`
`12-1
`12-2
`12-3
`12-4
`12-5
`12-6
`12-7
`12-8
`
`Rectangular-Shape Symbols
`Qualifying Symbols
`Dependency Notation
`Symbols For Combinational Elements
`Symbols For Flip-Flops
`Symbols For Registers
`Symbols For Counters
`Symbol For RAM
`
`ANSWERS TO SELECTED PROBLEMS
`
`l N D E X
`
`437
`442
`445
`446
`448
`
`450
`452
`453
`456
`458
`460
`461
`465
`465
`467
`471
`
`473
`
`475
`478
`478
`
`482
`485
`487
`489
`491
`493
`496
`498
`
`482
`
`501
`
`517
`
`Page 10
`
`Page 10
`
`

`
`
`
`PREFACE
`
`[hgital Lli:5i|,-,r| is. c+:i1in:ci'iii:u:I with Ilia design uf Liigiliii i‘.$il:<:..'|.Ii.2l'1‘|ull.H.'ll"£.5Lli:l!:. Uigiiiii circuits are
`Ern|:i|uyi:iJ in iilil iicsigii iiiiil cniiiairucliiin iii Hj,r.'~iicm.~i such iiri digital I:-i'.J1‘I‘i'|EilIl'E:I!-'.. (him cami-
`iniiiiicflliuii, cllgiiril mrrnrcling. iiriii l'I'Ifl11}I' iiiiiur uppiiuiiiiuiis l|i::il Pi.-".i1iiiI*c rligirnl |'ia1'<;1wn:e.
`Tliia bunk |.I1-'i.‘.‘5.i‘:iii!:'«7. THE! hnraia: I.ni'i|5 fur the Limzign uI':.li,uiLul ciwulis. mic! |'ilTi‘i-'il'i-L‘.£~i the i'umi:1—
`riimiini iamiccpi.-=. used in ilii: design iii‘ digital .‘i§‘.°iT.I.'.'-I1'I.i'i
`Ii
`is siiiliihlir Fm‘ use :13 i1 iexibiink in
`an ii1iri:i:iui:mi*5= cmir.-ie iii an i.'ii:i:ii'ii:iii ungiiiueriiig. l.'2{‘ilI1|‘.|1lIt:1'Bl'|HiIIB¢l'il'lE- ‘iii’ cumpiiter
`*.’-ii:iulIi£'.i.; ci1i‘i‘icii|Lirii.
`
`Mmiy n1" Il‘|.I‘- i'eniuir:.<-. in this ihircl Ediliflfl rcmaiii Ilia: ‘.*itIIl‘it.'. as iiiiii-are Hf iii: 1'll'E'i-'1.-E]-1.1.5 cdiiiniis
`::.:u.::‘-ill Ini
`I-‘II:"."-‘ii"l‘£1I‘Lgi.‘.!'11E11l iii" Ii'iE material ur i:]lEtIlj;i.L‘.'l
`"Lu L‘-Ililliiiflfitfi dim in chmiges in this tech
`nmlngy. iLTrii1ii‘1iI1iiiiiiii£3.l circiiiiii aim CiJIW3Il..'JLi in um: ::i1upI{:I il‘1:'iI£‘:JI|.'i rifiwri. as in ilic prcviuus i:i.ii—
`ilflli. Tlin F.-::q1i¢niiu.i ciruiiil Ci’!|:1I]}lE]' i:I11[i|iii:;i'n:s i.iL‘1~iigl'i wiili H flip-Hiips ii1r.ii;-.:I.d of Jh’ I.i.lILi SR
`l'li|i—tlI:Ip'.~..
`'l"1ii: maierinl mi nmmnry and j_'rI‘|[JgI'i:1.Il'II‘fl1'i.i.‘ii|'L' 1::-git: iirr cciiiihiiiiacl in tiru: chapter.
`Cliiiliicu H l1i"I'S iicen rervisad in ir1i.‘Iui.|u: I'flgiSi.t:Tlt’fl!l5ii?=l'
`|i:w.:1 i‘[-{'11.} li.i:5ig11 prnccdurca.
`'l'lir:ii1iiini':1-i.riiiini1ini.I1i: 1.l'LiriJ I.‘LiiI.iUlliS|1Il.IiIIii.‘ii.1.5il:l|'l nl5.c!ciinns.nn‘iI"eri1tigli:1ri.iw;1:*i: DI.‘-
`.~ir‘.i'ii1i inn i..i1i‘igiinge E i ITJL i. The IIDL riiuiuriiil In iiisiri tL‘~i:| iii scpnrnte fiflfltiflilfi sin ii. L'{il'i hi: L'.i..w-
`E!|n‘E£|.‘i iii skippcil as [Jl:!:~'.il'L'£i.Ti1fi [JR:5fiT1iiiTi|L'|ii ii. iii :1 Pillil‘-I!-i'!ii.‘.' Iciri.:l ftii‘ Iicginning Siudfllllfi 1i]ELi.£l.l'['.
`Jmii'i’iii'ig riigiinl azir-suits: and El hi.|l'£iWfll‘i: i.h:m:-riptlnn langiiiigc M iii: smiic iimc.
`
`- Higitiil EiI'CI.liI.‘- are i'ritru-:1I.ii.:i::.I iii C'|iH[iii:I'1-'.
`HiJl_. in Seciiiin 3 9.
`
`1
`
`iliiiiriigll 5 wiih .I.iJ'I ini.mcluL:iiiiii Li: UL-i'ilug
`
`- Furiiii.'.i' fli.~.'i:u.~i5iuii til" Hill. riccurs in Scciiun 4» LI
`ili I'.:il‘i.‘lJiL'-5.
`
`l'u1|-ziwiny, ilii: siiidy 1':-f cni11bin:.I.liu1'i—
`
`- Elcigiiuiiiiiil i'iri:Liiis E111: i:m'cri:i.| in Chuplurs ii flJIE.i fi Wiiil tiiirrmpiiiiiiiiig HDL ciiziriiiilcs
`ll1-".'iI.‘J.‘-'[]l:'iI'i.'-?. fir? and Ei—h.
`
`- The lii'.JL i'.i|.:‘-‘.'='L‘l."i]..1i.i£.'I1i L-l'
`
`l|1.l_1l'il4.}l_'iI' in fi1‘{‘:!-‘.IEl1.T£i.'i in Si:r:l.iun T-2
`
`Ii:
`
`Page 11
`
`Page 11
`
`

`
`X
`
`Preface
`
`- The RTL symbols used in Verilog HDL are introduced in Sections 8-2.
`. Examples of HDL descriptions in the RTL and structural levels are provided in Sections
`8-5 and 8-8.
`
`v Section 10-10 covers switch-level modeling corresponding to CMOS circuits.
`
`- Section 11-19 supplements the hardware experiments of Chapter ll with HDL experi-
`ments. Now the circuits designed in the laboratory can be checked by means of hardware
`components and/or by HDL simulation.
`
`The CD-ROM in the back of the book contains the Verilog HDL source code files for the
`examples in the book and two simulators provided by SynaptiCAD. The first simulator is Ver-
`iLogger Pro, a traditional Verilog simulator that can be used to simulate the HDL examples in
`the book and to verify the solutions of HDL problems. The second is a new type of simulation
`technology, called an Interactive Simulator. This simulator allows engineers to simulate and an-
`alyze design ideas before a complete simulation model or schematic is available. This tech-
`nology is particularly useful for students, because they can quickly enter Boolean and D flip—flop
`or latch input equations to check equivalency or to experiment with flip-flops and latch de-
`signs. Ttitorials are available as HTML files in the CD-ROM Flash display and as MS Word
`files in the S)/naptiCAD installed directory under Book Tutorials.
`Additional resources are available in a companion Website at http//www. prenhallcom/mano.
`It includes all the Verilog HDL examples from the book for downloading, all of the figures
`and tables in the book in PDF format, tutorials on the use of the Verilog software in the
`CD-ROM, and more.
`
`The following is a brief description of the topics that are covered in each chapter with em-
`phasis on the revisions that were made for the third edition.
`Chapter 1 presents the various binary systems suitable for representing information in dig-
`ital systems. The binary number system is explained and binary codes are illustrated. Exam-
`ples are given for addition and subtraction of signed binary numbers and decimal numbers in
`BCD.
`
`Chapter 2 introduces the basic postulates of Boolean algebra and shows the correlation be-
`tween Boolean expressions and their corresponding ‘logic diagrams. All possible logic opera-
`tions for two variables are investigated and from that, the most useful logic gates used in the
`design of digital systems are determined. The characteristics of integrated circuit gates are
`mentioned in this chapter but a more detailed analysis of the electronic circuits of the gates is
`done in Chapter 10.
`Chapter 3 covers the map method for simplifying Boolean expressions. The map method
`is also used to simplify digital circuits constructed with AND-OR, NAND, or NOR gat.es. All
`other possible two-level gate circuits are considered and their method of implementation is ex-
`plained. Verilog HDL is introduced together with simple gate-level modeling examples.
`Chapter 4 outlines the formal procedures for the analysis and design of coinbi national cir-
`cuits. Some basic components used in the design of digital systems, such as adders and code
`converters, are introduced as design examples. Frequently used digital logic functions such as
`parallel adder and subtractor, decoders, encoders, and multiplexers are explained, and their use
`in the design of combinational circuits is illustrated. HDL examples are given in the gate-level,
`dataflow, and behavioral modeling to show the alternative ways available for describing com-
`
`Page 12
`
`Page 12
`
`

`
`Prcittcc
`
`jtl
`
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`t:ircuitr. ut‘ the cmiitttuu gate in cttc-it thiitiiy is tiiitityrcd citing i:it':t‘.‘.|t'i.(.'.t.'t.i circuit tltmi 3. A hit-tic
`itttuwicdgc -rtf t‘t|t.‘.t:‘.ttt:-nit: cirizttttfi is ttcccitttttrgt tn i'tJll1r t.rttt.icrttt£tttt7| titt: ttttiterinl itt t.|.1it-: citttptcc
`Httttrttttlcet ct"u"ci*ting r.witcit~|cttc| dcetcripticn.-s ticnmitctmtc tltc chility in 3.'.iI1'.tt.1i:lit‘. flil't_‘.|_t_i‘L5 cun-
`rtitictcd with MUS flnti tZ‘_Mt‘:-3 n'ttttttii.-tur.~t.
`
`L'htt|Jt£r II outlines cttrtt:t‘itnctti.5 thttt ctttt itc |:tct'iurrncd in that iuhurutnry wttlt IItu1.iw;u'c
`that ii rcttt1ii}.r B‘t'Hii:-Jillit cumntcmtitiijt. Titc npctrittintt iii the intitmtttttd circuits ttrtrtit in thc cit-
`itctttticnts it: cttptriiiicit by rcfcrrini; tit tliugntmt. rtl 5-'tmiJ:ir cnntttnitttittr. i.I1ll'titit.tt.':I3tt'| iii pri.-uiut.i.~=
`t1|ttt|tIcrti. Ettcit ct-ittcrintttnt is [tt*i‘-::tt:tttt.'-ti itti'ttt‘I't'tttiI}.t tttti;| the tttttticttt is cttpcctcii ltt [ttmitttttr tilt:
`'E.1iI'Cl.itl diagfiltit imtt t'crn~.uta1c it prtttciturc ftir cticclting thc ttitci'ttttrtit critic circuit In tttc lttb»
`tJ|'ttlL't1'§t'. The i-tltii
`tit‘.‘—f.5iitt[t. supptctncttts thc c:-tpcnmcttts with c[tI'l'I.‘-fipttlliiing HDL cxpcrititcttttt.
`ittStt:ttL| (ti. nr iJJ tttitiiltttn tn. titt: Itttrtiwtttfi cnntitt“ttt.ttitJtt. Lhc :=ttt.tt:ii:tit ttttn use tltc Vetting HDL
`ttitiiwitttt pmviricd I:Itt tilt: C'[.'t—Rt Jttti lit ttitttuiate ttttd t:itt.'-t:it' the rittsigtt
`Ulttiptar ll ['Ii‘I;‘1iil.'-llI.1$ titc .'t1iu'tr|i'in.| t.',t'tt[:-ifit: ti‘_ti*t't'titt:tit:t i't'.tr Ingit: ittnt:titit.ttt i'cct_ttntttcntJet:t it}! til:
`ANSIFIEEE tittiniitttri. Thcs: grttpittt.‘ sgirtninclit Imuc ltccn ticttclnpc-:1 for SS] ttni.'I MS] campu-
`ncittt: cu thtitttic t.t‘.‘i'£l' can t"ct:t'tgnt?'it'.: cttclt tiinctimi t'it:Jrn thc Ltniquc graphic syitttttii uscigttcd.
`'l'|tt: citttptcr -5.-itttwt. titc ritttndttrti gtitpltic ztjrmbnis oi tilt: irttcgrtttcizi circuit-t itiicti itt Iitc Itthrtrtt-
`tttrji tttt[tt:rin1cntr..1'Itc vttrittttt. tiigitttl ctitttpunctttt. thttt ttt‘t."- tttprcsnnlcd I.i'11'{?tL‘igi'lt.'tIl:li tht.'- huttit ttI'I:'.
`ttimiitn tu cummcictttt ttitcgratcd -l::i|"t‘:U.llih'. lit;-wetter. thc tctit liI;HL'-51101 tttuntittn !«“|1tt.1tt.‘.iiit,' itttcgrulcd.
`
`Page 13
`
`Page 13
`
`

`
`xii
`
`Preface
`
`circuits except in Chapters 1 1 and 12. The practical application of digital design will be en-
`hanced by doing the suggested experiments in Chapter ll while studying the theory present-
`ed in the text.
`.
`
`Each chapter has a list of references and a set of problems. Answers to selected problems
`appear in at the end of the book to aid the student and to help the independent reader. A solu-
`tions manual is available for the instructor from the publisher.
`I would like to thank Charles Kime for introducing me to Verilog. My greatest thanks go to
`Jack Levine for guiding me and checking the sections, examples, and problem solutions to all
`Verilog I-IDL material. Thanks go to Tom Robbins for helping me decide to write the third edi-
`tion and my editor Eric Frank for his patience throughout the revision. Appreciation goes to Gaiy
`Covington and Donna Mitchell for providing the CD-ROM from SynaptiCad. Thanks also to
`those who reviewed the third edition: Thomas G. Johnson, California State University; Umit
`Uyar, City Univenrity ofNew York; Thomas L. Drake, Clemson. University; and Richard Molyet,
`University of Toledo. Finally, I am grateful to my wife Sandra for encouraging me to pursue
`this project.
`
`M. MORRIS MANO
`
`Page 14
`
`Page 14
`
`

`
`
`
`Binary Systems
`
`'i-'i DIGITAL SYSTEMS
`
`Digital systems have such fl ftmnttttttnl lI.'!il.' in uvtmaduy life titttt we refer tn the [!|i'I3SIt':l‘|l Icah-
`ttulttgicul ptsrititi us the tligttai age. Digitttl systtmts un: l.tt£EILi in u.'un1rnttnit:atinn.htJsinuss tt'tttts-
`atttitms. tratflic ctintrtti. space gttitlttrtntt. ttttttiitzal LtT.:ttlt1'It=.'.t11, *.|-"E:tlli'1t#t' ntunitnriltg. li'iE. ii'lifii'I'lti_, ttttct
`li'ltlrI}' l.li.itE‘l' f.It'.Ill'ii'l'.l13-.i'L‘ifli, intlttslfitti. ttnd scimttitic enterprises. Wr: have tiigitnl It-lepltutanes. dig-
`iltti teicvisinn. digital tterslttiltz tiiscst digits] t:t.U11t:r.'.ts.
`IJ.I'l-Li hf cttttrse. tiigilzli t!flI'l‘iplll‘I.?.l'3. Till.‘
`must striitirtg prop-ertyr nf l'ht': digittti t:mt'tt;tttII;t' is its g,t.-.ttt:.rttiilg.r. it can fnilnw ti sequnnnn tit" iti-
`sI.rt.tt.'lit:-ns. called :1 p1't'.IgI‘t'!.J1'i. that ti]:-tttttltts utt L'.i"t-‘Ell tittltt. The user can specify mtrl fliiflllgt‘ iii.I.'
`prttgraxn or the tint:-I ttctmrdiltg. tn the sp-rttfifitr lIl3—|.31.i. Bu-cause uf this ficttihi lit}: gent-:tt!ti-ptlrptjsu
`Liigiltti :'.'flII]]2|'l.'li.t2l'S can periann ti ttn1‘it:Iy hi utfttlmttliun prmzcssing tasks that range I?'I‘u-‘£':T tt with:
`spectrum nf ttppiicmifitts.
`its limit tthility in IIl£'i1‘iipt.lit11E tliscretr: taletttcttts nf tn-
`Guts characteristic til’ tiigittti !ij|'."tit‘.t11!t
`fttrmulittn. .4'ttt_-gr set thtn is I'esl'rit1tt:tI tn ti iittilt: ilI.ltlliJt-:1‘ tit" uiuments trtintsins t'iist*.t*t'ttn:: it1tt‘trmt't-
`Iitm.Eitu1rtp1t:s tit‘ discrete sets tire. tilt: in t.iI.:L.iItIJ.li tIigiIs.t]1r: Eti iEi'U1.|".i nfthe ttip|1.tthvet.tht: Sit
`ttiuying cards. and the I5-‘~i squares «if it L'iIl::5fii]fl[I.l'Li, Ettrly rligitat utttnputsrs were ttseti ft:-r nu-
`l'l‘tt:l'it.' cttmputtttitzms. in this case. titt: distzwtts ttittrrttsrttti ttstiti were the digits. Ft't‘Il‘1‘i um: appli-
`t.‘ttt'ittn. Lht: term dtgttrti t::tJnn'.-]‘ttItv:.~|' ttnturttctl. Discrete ttiumcnts nf inftirnttttittn are fE]'}rBSEi‘I[Bt.'i
`itt-at. digital system I1}; physical qttatttllltts calilrti sit,'.ttt.tis. Eiut.*-l.I'it::1] signals such as vtt-itagus and
`tturruttltt E.-[I111 the must tznrnmntt. Hi£tI‘Iit'tDIti¢ tItwittt:.tt I.:tt1it:t.i trdnsislurs ]'.|l'|;'|'.‘itlII1iIli.1I.I:' in Lhe t.'ir-
`-::tIitt'_'-.r tltttt itnpit.-tnt:I1ts these signttis. Tiit: signals it: must pt't'SE.I1i~II.'i4'1}" t:i-:t.:tt'uItit: Liitgitzti sys-
`icuts us: just twti tiisurete ttnlues tint] tut-. ii'lI'.11‘{:ft.1r(’ sttitl In ht: bfrtrtn: A i".'iII:1I'j." tligit. t::t|it.=t.i tt
`ttft. has twu values: it and I. Discrfiltt flit.‘-fl1t'..|l'l5 0|‘ itttttrrntttitin are i'¥3]Ji‘t.i”.'-tlifttlill-ii with gruttps tit‘
`bitt-t cttiittti iritthw trtJd.r:.t. Fnr E!.'£li‘Ii['1iI'».’.'. iilE t'it:t:iu1:t| ti ittils fl tltrmtgit 9 art‘: t't.*:[1t't:*..st-.rttuti in it dig-
`litti H_‘;*5il.’-ll] with it ctitit: tttf fhur hits. H}; nsttig Wt1'iIU'Lt5 tt:I::lttttt]ttcs. gtnttps nf' hits rttut ht: tlttttit:
`
`Page 15
`
`Page 15
`
`

`
`Chapter 1
`
`Binary Systems
`
`to represent discrete symbols, which are then used to develop the system in a digital format.
`Thus, a digital system is_a system that manipulates discrete elements of information that is
`represented internally in binary form.
`Discrete quantities of information either emerge from the nature of the data being processed
`or may be quantized from a continuous process. For example, a payroll schedule is an inher-
`ently discrete process that contains employee names, social security numbeis, weekly salaries,
`income taxes, and so on. An employee’s paycheck is processed using discrete data values such
`as letters of the alphabet (names). digits (salary), and special symbols (such as 55). On the other
`hand, a research scientist may observe a continuous process, but record only specific quanti-
`ties in tabular form. The scientist is thus quantizing his continuous data, making each number
`in his table a discrete quantity. In many cases, the quantization of a process can be performed
`automatically by an analog-to-d.igital converter.
`The general—purpose digital computer is the best-known example of a digital system. The
`major parts of a computer aie a memory unit, a central processing unit, and input-output units.
`The memory unit stores programs as well as input, output and intermediate data. The central
`processing unit performs arithmetic and other data processing operations as specified by the pro-
`gram. The program and data prepared by a user are transferred into memory by means of an
`input device such as a keyboard. An output device, such as a printer, receives the results of the
`computations and the printed results are presented to the user. A digital computer can accom-
`modate many input and output devices. One very useful device is a conlrnunication unit that
`provides interaction with other users through the Internet. A digital computer is a powerful in-
`strument and can perform not only arithmetic computations, but also logical operations. In ad-
`dition, it can be programmed to make decisions based on internal and external conditions.
`There are fundamental reasons why commercial products are made with digital circuits.
`Like a digital computer, most digital devices are programmable. By changing the program in
`a programmable device, the same underlying hardware can be used for many different appli-
`cations. Dramatic cost reductions in digital devices have come about because of the advances
`in digital integrated circuit technology. As the number of transistors that can be put on a piece
`
`of silicon increases to produce complex functions, the cost per unit decreases and digital de-
`vices can be bought at an increasingly reduced price. Equipment built with digital integrated
`circuits can perform at a speed of hundreds of millions of operations per second. Digital sys-
`tems can be made to operate with extreme reliability by using error-correcting codes. An ex-
`ample of this is the digital versatile disk (DVD) in which digital information representing video,
`audio, and other data is recorded without a loss of a single item. Digital information on a DVD
`is recorded in such a way that by examining the code in each digital sample before it is played
`back, any error can be automatically identified and corrected.
`A digital system is an interconnection of digital modules. To understand the operation of each
`digital module, it is necessary to have a basic knowledge of digital circuits and their logical func-
`tion. The first seven chapters of this book present the basic tools of digital design such as logic
`gate structures, combinational and sequential circuits, and programmable logic devices. Chap-
`ter 8 introduces digital design at the register transfer level (RTL). Chapters 9 and 10 deal with
`asynchronous sequential circuits and the various integrated digital logic families. Chapters ll
`and 12 introduce commercial integrated circuits and show how they can be connected in the
`laboratory to perform experiments with digital circuits.
`
`Page 16
`
`Page 16
`
`

`
`Section T-2 Binary Numbers
`
`3
`
`All ltttpurtattl. tnerrtl in digital tlesign is the use r.Il' ltarrlwtrre tleseriptinn languflgr: {Hn[_L
`HI JL resembles a pregrarrtnting language and is suitable [er describing digital errertlls in tes-
`ttral term. It is used te sirnulate rt digital system te verify its nperatien Itefnre ltartlware is built
`in. it is ttL-re used in eenjunetierr with lngie synthesis tnnls tn nttttrrnate the design. IIDL tie-
`seriptiens ef tligita] eirettlls nrt: presenterl tltrnughnut tl1e ltnnlt.
`As preyinusly stated. digital systems nttlnlpulnte riiserete qrrantrties ul ittfumtatitrn that are
`representeti in binary fernt. Uperantls nserl fer calealatinrts may be expressed in the hinary
`rturnher systetn. fit-her rliserete elements. including the rieeintal tllgtrs. an; represented in binary
`etsles. Data preeessing is errrrietl eat by means at" hinury iegir: elements using binary signals.
`Qlnrntities are stnretl ltt binary ttlurage elerttenIs.Tl1t' ptrrpnse nl' Ibis t1'l'1'd.|:Il.t.‘t" is in lntrnrluee tlte
`varieus binary enrteepts as it lrarne at" reference Fer Fttrtb-er stntly irt tlte sueeeetling ebrrprers.
`
`
`
`1-2 BINIIRY NUMBERS
`
`A decimal number such as "i'.3‘i2 represents a quantity -e.r|Itnl in T theusatals plus 3 ltulttlrerls,
`plus 9 tens. plus 2 units. The tltettstllttls. bunrlretls. etc. are nnwers ef ltl impiietl by the rinsi-
`that Hi‘ lbe eeeffieients. in he Ii"|tJl1? esaet. 7.392 sbnulrl be written as
`
`'i'>C ltt-‘+32: |a=+e.~: tn‘ +2 a re“
`
`Huwever. the eerryentinn is re write enly the eeeliieiertts anti frnrn their prrsitien deduce the
`Iterretistiry puwers el' Ill. in gertnral. rt Itutnber with a decimal nntnt ts t'ep|'esetrted by a series
`nt enellieiertts as fnllnws:
`
`rr5rr..tr3rr9a,rr;. * rr_ |£t_3at_3
`
`'l'l1e tr, eEIe.l."lieients are any of the llltllgila ill. I. 2.... . ll}. trttrl the sttbseupt value _l gives I.l1e
`ttlrtee yrtltte and. hence, the [tnwttr nl' Ill by which the eneffieient ntrtst be tttttltinliecl. This can
`he err [;:-t'esset.l as
`
`lllsrr-t + |ll'rr,,
`
`“I
`
`H-}1l]'_1-, + llllrry + ll}'rr1 + llJ"rt;, + ll.l''e , + Ill’:-::c_: + ll.l"'rr__.
`
`lli becrtttse it ttses lli tligits and
`'l'l'te. tleeirnal rrurnber system is Silltl re be (if frrsre. er melts.
`the eeelfitttetlts are multiplied by |‘IITIwet'5 el' Ill. The ltiirrrrjr system is a t:lil'l"erent number sys-
`tern. '|"he eeetfieie.rtts elf the binary ntntrbers system have errly twn pnssible values: ti er l
`. Ear.-it
`eneffinirtrtt try is ntultiplierl by 2-’. Fur e'.Itnnt|.tle. tlte tleeitnal equivalent at the binary number
`l ll’lll'l.l I is 2I‘.r.'F5. as sltewn Earn the tntlltipltetrlintt efilte eeeflieients by rrnwers of T1:
`
`|a2‘+|x3-‘rns2’+ts:1'+r.r:-r1"+r:«:2"+t:-te"‘=3a.'rs
`
`in general. it number expressed in a l‘ta.'~te-r sysrenr has ttetrflieients multiplied by prw.rer‘s til" r:
`
`rr“~r'" -i- r'r,,_;‘i
`
`_u'-' I
`
`l
`
`_.
`
`I
`
`r:-_.-r‘: "l'H|'.r +rr,.-,+ ri_.'t'_" I £i-,t'i"':
`
`l-
`
`..-‘l'.r.'t_m"'i"
`
`-vii
`
`Tire eeeltieiertts rt, range in value truth it In r- - l. 'l'n rllstiugtrislt hetweerr ntuabers nl rlifi'er-
`ent hnses. we euelese tire eeeflieients in parent Ireses ant] write a suhserint equal tn the base rrserl
`teseept sertretirnes l'ur decimal ntttnbers. where the enttlent rnalces it ubyiuus tl‘utt
`it is r.|et:I-
`rr1alt.:"tn esannrle at tt base~5 number is
`
`Page 17
`
`Page 17
`
`

`
`4
`
`Chapter 1
`
`Binary Systems
`
`(4o2i.2),=4><53+0><52+2><5I+1x50+2><5“=(51i.4),,,
`
`The coefficient values for base 5 can be only 0, 1, 2, 3, and 4_ The octal number system is a
`base-8 system that has eight digits: 0, 1, 2, 3, 4, 5, 6, 7. An example of an octal number is
`127.4. To determine its equivalent decimal value, we expand the number in a power series with
`a base of 8:
`
`(127.4), = 1 x 82 + 2 x 8‘ + 7 X 8° + 4 x 8"‘ = (87.5),,,
`
`Note that the digits 8 and 9 cannot appear in an octal number.
`It is customary to borrow the needed r digits for the coefficients from the decimal system
`when the base of the number is less than 10. The letters of the alphabet are used to supplement
`the 10 decimal digits when the base of the number is greater than 10. For example, in the hexa-
`deci/mil (base 16) number system, the first ten digits are borrowed from the decimal system.
`The letters A, B, C, D, E, and F are used for digits 10, ll, 12, 13, 14, and 15, respectively. An
`example of a hexadecimal number is
`
`(B65F),6 = 11 x 163 + 6 x 162 + 5 x 16‘ +15 >< 16° = (46,687),0
`
`As noted before, the digits in a binaiy number are called bits. When a bit is equal to 0, it does
`not contribute to the sum during the conversion. Therefore, the conversion from binary to dec-
`imal can be obtained by adding the numbers with powers of two corresponding to the bits that
`are equal to 1. For example,
`
`(110101)-2 = 32 +16 + 4 +1=(53),0
`
`There are four l’s in the binary number. The corresponding decimal number is the sum of the
`four powers of two numbers. The first 24 numbers obtained from 2 to the power of n are list-
`ed in Table 1-1. In Computer work, 2'0 is referred to as K(kilo), 22° as M(mega), 23° as G(giga),
`and 2”° as T(tera). Thus 4K = 2” = 4096 and 16M = 22“ = 16,777,216. Computer capaci-
`ty is usually given in bytes. A byte is equal to eight bits and can accommodate one keyboard
`character. A computer hard disk with 4 gigabytes of storage has a capacity of 4G = 232 bytes
`(approximately 10 billion bytes).
`Arithmetic operations with numbers in base r follow the same rules as for decimal numbers.
`When a base other than the familiar base 10 is used, one must be careful to use only the
`
`Table 1-1
`Powers of Two
`
`:1
`
`0
`
`I
`2
`3
`
`4
`5
`6
`
`7
`
`2n
`
`I
`
`2
`4
`8
`
`16
`32
`64
`
`128
`
`:1
`
`8
`
`9
`10
`1 1
`
`12
`13
`14
`
`15
`
`2n
`
`256
`
`512
`1,024
`2,048
`
`4,096
`8,192
`16,384
`
`32,768
`
`n
`
`16
`
`17
`18
`19
`
`20
`21
`22
`
`23
`
`2n
`
`65,536
`
`131,072
`262,144
`524,288
`
`1,048,576
`2,097,152
`4,194,304
`
`8,388,608
`
`Page 18
`
`Page 18
`
`

`
`Section 1-3 Number Base Conversions
`
`5
`
`i«-g|t.;,u.i.ri;|_i1i,- digits. Eiieiiiriles nf iidditinri. ziuhtractiuii, eiitl iiitilttpitctititiri int" twti t'.iiriiir}.' mim
`i_'I|,_E|'3 m't,t t-L-ii
`i'i:'ii.|.DWS:
`
`itltgttllfi.‘
`
`tfltlttl
`
`intniienii:
`
`tttlttjtt
`
`iiiiittipliisiiiit:
`
`lttt
`
`ridtletid: +|t'ttltIl
`
`suhtraltnndl
`
`-llI|Ul]l
`
`inttlliplier: Xi
`
`surn:
`
`ifllfllflfl
`
`i.lifi'eiciiee:
`
`flttttttll
`
`Hill
`
`Ui.tt,'IU
`
`H't_lt__
`
`till I
`
`I
`
`|:-iii-diict:
`
`'l‘hi-. suni {if two hinrir;-,r numbers is calculnteil by the siinte rules as in itectniiil. except that
`the digits nf the sum in any significant pt:-sitiun een he uiily Li U1 1 Any i.".iti'1'y tihtained in ii given
`sigititieaiit prisitiun is used by the pair iii digits uric siguiticntit ptisitiiin higher. The stihtriii:tin11
`is slightly nit:-re entiiplicatetl. The riiteii are still the ssnie its in ttecirniil. except that the liurrnw
`in ii giiii.-ii significant pnsttinn adds 2 In it mintiend digit.