'
`
`U
`
`United States Patent [19]
`Nakai et al.
`
`USOO5359342A
`
`[11] Patent Number:
`[45] Date of Patent:
`
`5,359,342
`Oct. 25, 1994
`
`[54] VIDEO SIGNAL COMPENSATION
`APPARATUS
`[75] Inventors: Sem Nakal, Osaka; Masashi Kubota,
`Katanoa both of Japan
`-
`-
`- l
`_
`?gts'slsggEJlgcgrllc Indusma Co ’
`"
`’
`p
`[21] Appl. No.: 11,828
`_
`[22] F1led=
`
`-
`:
`[73] Asslgnee
`
`Feb. 1, 1993
`
`[63]
`
`Related US. Application Data
`_
`_
`Continuanon of Ser. No. 537,939, Jun. 14, 1990, aban
`doned-
`Forei A “cation Priority Data
`3O
`gn pp
`[
`]
`Jun. 15, 1989 [JP]
`Japan ................................ .. 1-153391
`Jul. 7, 1989 [JP]
`Japan ................................ .. 1-175854
`
`[51] Int. Cl.5 .......... ................................. .. G09G 3/36
`[52] US. Cl. .................................... .. 345/89; 345/147;
`345/199
`[58] Field of Search ------------- ~- 340/703, 721, 767, 732,
`340/784, 793’ 805’ 811, 812; 358/29’ 32;
`345/147’ 87’ 89’ 199’ 112
`References Cited
`
`[56]
`
`US‘ PATENT DOCUMENTS
`4,386,345 5;
`igl'vesoillaet 31- ---------------- -
`8
`4,766,427 8
`e et a. .................. ..
`4,801,933 1/1989 Yamamoto et al.
`.. 340/702
`4,825,201 4/1989 Watanabe et al.
`.. 340/765
`4,827,255 5/1989 Ishii ................................... .. 340/703
`
`4,897,639 l/ 1990 Kanayama ........................ .. 340/812
`FOREIGN PATENT DOCUMENTS
`0190738A2 8/1986 European Pat Of? ’
`0195203A3 9/1986 European Pat. Off. .
`0313331 4/1989 European Pat. Off. .......... .. 340/784
`0314084A3 5/1989 European Pat, Off. .
`O303510A3 7/1989 European Pat. Off. .
`2846874A1v 5/1979 Fed. Rep. of Germany .
`61-243495 10/1986 Japan .
`62209418 9/1987 Japan .
`63-37785 2/1988 Japan .
`63-148781 6/1988 Japan .
`220727l 1/1989 United Kingdom .............. .. 340/784
`
`Primary Examiner—Alvin E. Oberley
`.
`Assistant Examiner—Reg1na Liang
`Attorney, Agent, or Firm—Wenderoth, L1nd & Ponack
`
`[57]
`
`ABSTRACT
`
`In a dot matrix type display represented by a liquid
`crystal television receiver, as the use of a large Screen
`display screen size progresses, display non-uniformity
`becomes signi?cant at some screen position attributed
`to the combination of the property of display panel with
`the characteristic of the optical system and the like.
`According to the present invention, by splitting the
`display screen and converting the video signal by using
`the different correction data by the split region, display
`can be performed with composite correction of the
`d- 1
`_
`.f
`.t .
`‘Sp ay no“ um om“ y
`
`9 Claims, 25 Drawing Sheets
`
`VIDEO SIGNAL
`
`{12
`,12a
`
`;13
`
`“\a
`
`11a
`[AID CONVERTERI“
`LOWER
`ADDRESS
`INPUT
`
`QVNCHRONOUS -» COUNTER » ssfgiLgréTBop
`SIGNAL
`HORIZONTAL
`Waring/‘1+. _'
`LINE
`gIg?RRONOUS ~
`VERTICAL
`_, COUNTER - SSELE'CTOH
`SYNCHHONOUS
`,
`S
`SIGNAL
`‘4
`12b
`
`“11b
`
`LUT
`LUT
`:
`/ LUT
`UPPER
`ADDRESS
`INPUT
`1 DIA CONVERTER |~f1 1°
`
`‘15
`HORIZONTAL SYNCHRONOUS SIGNAL -—§
`DOT CLOCK
`SIGNAL LINE DRIVER
`
`HORIZONTAL SYNCHRONOUS SIGNAL
`VERTICAL SYNCHRONOUS SIGNAL -—>
`
`__
`__
`
`"/17
`
`16 SIGNAL __
`\" LINE
`DRIVER
`
`LIQUID CRYSTAL
`
`

`

`US. Patent
`
`Oct. 25, 1994
`
`Sheet 1 of 25
`
`5,359,342
`
`FIG. 1
`
`VIDEO SIGNAL
`
`B T LAI
`
`O lllllll I I I
`
`
`
`R n ||||||||||||||||||| InIlIH?IL
`
`
`
`1;“ ?mSE EwruE w;
`I m L II_ m _ A R _
` “ T_HO MRW “ n NBT CBT “ _ OTC
`
`
`ITIC _ _ HEUE TIE/L/ _
`
`-->
`
`513
`DOT CLOCK
`DOT
`HORIZONTAL
`SYNCHRONOUS --> COUNTER
`SIGNAL
`HORIZONTAL
`. SYNCHFIONOUS -+
`SIGNAL
`VERTICAL
`SYNCHRONOUS
`SIGNAL
`
`-->
`
`_ H S V S _ n u
`
`_
`
`IN I VN
`R HV H L IV
`R nWuwDI R
`G LL Iw w w u E
`E N E
`m Aw m m w v EEW O J. f
`N A fwmum
`NR vT T T T Wm
`L UAI
`V RETA
`PDW
`
`I lllll I
`
`m A C
`
`O
`
`HORIZONTAL SYNCHRONOUS SIGNAL ?
`DOT CLOCK ——> SIGNAL LINE DRIVER
`I
`IIII
`
`HORIZONTAL SYNCHRONOUS SIGNAL —->
`VERTICAL SYNCHRONOUS SIGNAL --->
`
`M17
`
`SIGNAL _
`LINE
`DRIVER _
`
`LIQUID CRYSTAL
`
`

`

`U.S. Patelit
`
`Oct. 25, 1994
`
`Sheet 2 of 25
`
`5,359,342
`
`FIG. 2
`
`VERTICAL
`HORIZONTAL
`HORIZONTAL
`DOT SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
`'CI-OCK SIGNAL
`SIGNAL
`SIGNAL
`
`234/
`
`DOT COUNTER
`
`LINE COUNTER ,1/24
`
`23am
`
`)
`
`L
`
`W243
`
`n 1
`
`4 3 Z I O
`
`I'I-I
`
`4 3 Z I 0
`
`I21/C
`
`I
`
`I
`i
`I
`
`0°00
`
`SPLIT BIT
`SELECTION
`CIRCUIT
`
`\ \HOFIIZONTAL \ \VEFITICAL
`
`I
`QIIOOMQQI
`i
`
`SPLIT BIT
`SELECTION
`CIRCUIT
`
`I
`I
`I
`
`n+n-4-:-i+_1
`
`I ---0
`
`'“
`
`\ \
`
`"'
`
`25
`
`\ \ 5 ,
`
`MEMORY ADDRESS
`
`

`

`US. Patent
`
`Oct. 25, 1994
`
`Sheet 3 of 25
`
`5,359,342
`
`FIG. 3
`
`X
`
`REEN
`
`SCREEN
`BFHGHTNESS
`
`

`

`U.S. Patel-1t
`
`Oct. 25, 1994
`
`Sheet 4 0f 25
`
`5,359,342
`
`FIG. 4(A-1)
`
`FIG. 4(A-2)
`
`FIG. 4(A-3)
`
`a
`
`SCREEN
`BRIGHTNESS
`
`255
`
`OUTPUT
`
`8
`
`SCREEN
`BRIGHTNESS
`
`0 ‘
`
`255
`DATA LEVEL
`
`0
`
`INPUT
`
`25 5
`
`0
`
`255
`DATA LEVEL
`
`FIG. 4(B-1)
`b
`
`FIG. 4(B-2)
`255
`
`FIG. 4(B-3)
`b
`
`FIG. 4(c-1)
`
`FIG. 4(c-2)
`255
`
`FIG. 4(0-3)
`
`C
`
`

`

`U.S. Pateilt
`
`Oct. 25, 1994
`
`Sheet 5 of 25
`
`5,359,342
`
`FIG. 5(A-1)
`
`FIG. 5(A-2)
`
`FIG. 5(A-3)
`
`é ______
`
`255
`
`‘
`
`SCREEN C """" "
`
`BRIGHTNESS
`
`VA -------- --
`
`SCREEN °
`
`OUTPUT K BRIGHTNESS
`
`VA 255
`0‘
`DATA LEVEL
`
`o
`
`255
`INPUT
`
`0
`
`255
`DATA LEVEL
`
`FIG. 5(B- 1)
`
`FIG. 5(B-2)
`
`FIG. 5(5-3)
`
`b —-—-—- -
`
`255
`
`C
`
`0
`
`_______ __
`
`VEB 255
`
`0
`
`255
`
`FIG. 5(c-1)
`
`FIG. 5(c-2)
`255 /
`
`FIG. 5(0-3)
`
`0
`
`255
`
`o
`
`255
`
`

`

`U.S. Patel'lt
`
`Oct. 25, 1994
`
`Sheet 6 of 25
`
`5,359,342
`
`J-___L___LC_:_
`5;
`
`L_.....L
`
`SCREEN
`BRIGHTNESS
`
`

`

`U.S. Patelit
`
`Oct. 25, 1994
`
`Sheet 7 of 25
`
`5,359,342
`
`FIG. 7
`
`SCREEN
`BRIGHTNESS
`
`X
`
`FIG. 10
`
`x
`SCREEN
`
`SCREEN
`BRIGHTNESS
`
`

`

`U.S. Patel-1t
`
`Oct. 25, 1994
`
`Sheet 8 of 25
`
`5,359,342
`
`FIG. 8B
`BRIGHTNESS
`
`G
`FIG. 86
`BRIGHTNESS
`
`FIG. 80
`
`B
`BRIGHTNESS
`
`B
`B
`
`

`

`US. Patent
`
`Oct. 25, 1994
`
`Sheet 9 0f 25
`
`5,359,342
`
`FIG. 9(A-1)
`SCREEN
`BRIGHTNESS
`as ----
`
`FIG. 9(A-2)
`255
`OUTPUT
`VA ----- --
`
`SCREEN
`BRIGHTNESS
`a5
`
`FIG. 9(A-3)
`
`o
`
`255
`I
`DATA LEVEL
`
`FIG. 9(B-3)
`
`VA 255
`0
`DATA LEVEL
`
`o
`
`255
`INPUT
`
`FIG. 9(B-1)
`
`FIG. 9(B-2)
`255
`VB
`
`0
`
`V5 255
`
`0
`
`FIG. 9(c-1)
`
`FIG. 9(c-2)
`255
`
`FIG. 9(0-3)
`
`v0 255
`
`0
`
`255
`
`

`

`U.S. Patelit
`
`0a. 25, 1994
`
`Sheet 10 of 25
`
`5,359,342
`
`. FIG. 11
`
`VERTICAL
`HORIZONTAL
`HORIZONTAL
`DOT SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
`CLOCK SIGNAL
`SIGNAL
`SIGNAL
`
`113w DOT COUNTER
`
`LINE COUNTER M114
`
`113a/I/L
`
`)
`
`Q
`
`W114a
`
`1104/}
`I
`§III¢
`I
`i
`
`V
`
`V V V V V
`HORIZONTAL
`SPLIT
`POSITION
`MEMORY
`
`V
`
`V V V V V
`VERTICAL
`SPLIT
`POSITION
`MEMORY
`
`g
`i
`M112;
`I
`;
`
`\
`
`\
`
`115
`s ,
`
`MEMORY ADDRESS
`
`

`

`U.S. Pater-1t
`
`Oct. 25, 1994
`
`Sheet 11 of 25
`
`5,359,342
`
`FIG. 12
`
`HORIZONTAL
`SPLIT POSITION
`\
`
`VERTICAL
`SPLIT
`
`OUTPUT VALUE OF
`VERTICAL SPLIT
`POSITION MEMORY112
`7
`(00)
`
`x3
`
`)
`
`IIIIL
`
`OUTPUT VALUE OF Y3
`k1100
`HORIZONTAL SPLIT
`POSITION MEMORY 111 "\—(00)
`
`(01)
`
`(10)
`
`(11)
`
`DISPLAY IMAGE
`
`MEMORY ADDRESS
`
`FIG. 13
`
`OUTPUT
`
`INPUT
`
`0 ~ X1-1
`
`X1 ~ X2-1
`
`X2 ~ X3-1
`
`X3 ~
`
`FIG. 14
`
`OUTPUT
`
`INPUT
`
`0 ~ YI-I
`
`Y1 ~ Y2-1
`
`Y2 ~ Y3-1
`
`Y3 ~
`
`

`

`U.S. Patel'lt
`
`Oct. 25, 1994
`
`Sheet 12 0f 25
`
`5,359,342
`
`FIG. 15(0)
`
`y:
`
`CREEN
`
`-----|-----o-------—----+——-+--+--4--—
`
`B
`
`.-A .
`
`FIG. 15(a)
`
`SCREEN
`BRIGHTNESS
`
`FIG. 15(b)
`
`SCREEN
`BRIGHTNESS
`
`

`

`US. Patent
`
`Oct. 25, 1994
`
`Sheet 13 of 25
`
`5,359,342
`
`FIG. 16
`
`VERTICAL
`HORIZONTAL
`HORIZONTAL
`SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
`DOT
`CLOCK SIGNAL
`SIGNAL
`SIGNAL
`
`MEMORY
`
`HORIZONTAL
`SPLIT
`POSITION
`MEMORY
`
`VERTICAL
`SPLIT
`POSITION
`
`MEMORY ADDRESS
`
`

`

`US. Patent
`
`0a. 25, 1994
`
`Sheet 14 of 25
`
`5,359,342
`
`FIG. 17
`
`(OUTPUT OF
`TICAL
`PIT POSITION
`MEMORY 162)
`
`PUT
`IN
`(OUTPUT OF
`ZONTAL
`POSITION
`IT
`MEMORY 161)
`
`
`OUTP UT
`(OUTPUT
`OF
`DDRESS
`BLOCK A
`ORY 166)
`MEM
`
`FIG. 18
`
`OUTPUT OF
`
`VERTICAL
`
`OUT OF HORI
`ZONT L PLIT ~
`POSITION MORY161
`
`("I
`OUTPUT OF BLOCK
`ADDRESS MEMORY 166
`
`DISPLAY IMAGE
`
`

`

`U.S. Patelit
`
`0a. 25, 1994
`
`Sheet 15 of 25
`
`5,359,342
`
`FIG. 19
`
`VIDEO SIGNAL
`
`R G B
`_____________________________________ __5__| 0
`E
`v
`i
`5
`ND CONVERTER #191 g
`
`5
`:
`OUTPUT FROM
`y
`{193
`SCREEN SPLIT -+> MBE?ggY _> MULTIPLIER S192 :
`CONTROL MEANS 5
`i
`
`i
`
`i
`v
`N
`D/A CONVERTER R194 ;
`
`V1 l
`
`OUTPUT TO SIGNAL
`LINE DRIVER
`
`

`

`US. Patent
`
`Oct. 25, 1994
`
`Sheet 16 of 25
`
`5,359,342
`
`FIG. 20
`
`VIDEO SIGNAL
`
`RGB
`
`5 200
`
`201a
`A/D CONVERTER J
`LOWER
`ADDRESS
`INPUT
`
`, 204
`A/D
`TEMP.
`DETECTOR _, CONVERTER
`I I I I I I I I I I l | | I I I I I I~
`-1->
`
`TEMP. DISTR.
`POSITION
`MEMORY
`
`5205
`HORIZONTAL SYNCHRONOUS SIGNAL —-1
`v v v
`DOT CLOCK —-> SIGNAL LINE DRIVER
`
`HORIZONTAL SYNCHRONOUS SIGNAL ->
`VERTICAL SYNCHRONOUS SIGNAL -->
`
`__
`
`A, 207
`
`SCAN
`206\,\ NING —
`LINE
`DRIVER :
`
`.
`
`LIQUID CRYSTAL
`PANEL
`
`

`

`U.S. Patelrlt
`
`Oct. 25, 1994
`
`Sheet 17 of 25
`
`5,359,342
`
`FIG. 21(a)
`
`FIG. 21(b)
`
`FIG. 21(0)
`
`OUTPUT
`
`OUTPUT /
`
`INPUT
`
`INPUT
`
`

`

`U.S. Pater-1t
`
`Oct. 25, 1994
`
`Sheet 18 of 25
`
`5,359,342
`
`FIG. 22
`
`VIDEO SIGNAL
`RGB
`
`OUTPUT FROM
`TEMPERATURE
`CONTROL MEANS
`
`GENER.
`MEMORY
`
`V
`
`V Y T
`OUTPUT TO
`SIGNAL LINE DRIVER
`
`

`

`US. Patent
`
`Oct. 25, 1994
`
`Sheet 19 of 25
`
`5,359,342
`
`FIG. 23(a)
`
`FIG. 23(1))
`511
`
`l
`
`OUTPUT
`
`"""""""""" m
`
`FIG. 23(0)
`
`255
`
`“n
`
`OUTPUT
`
`SUBTRACTION
`AMOUNT (1)
`
`o
`
`0 INPUT 255
`
`0
`
`INPUT 25s '
`
`vFIG. 23(d)
`511
`
`UTPUT
`O
`
`255
`
`FIG. 23(e)
`
`sUéTFIAcTIoN
`INPUT 255 AMOUNW)
`
`0
`
`INPUT255
`
`

`

`US. Patent
`
`Oct. 25, 1994
`
`Sheet 20 of 25
`
`_
`
`5,359,342
`
`FIG. 24
`
`VIDEO SIGNAL
`
`n._______._.__-____._....
`
`
`
`VOLTAGE
`VOLTAGE
`VARIABLE
`DISTR.
`
`
`
`CIRCUIT
`POSITION
`
`
`
`MEMORY
`
`
`ADDRESS
`
`
`
`II
`
`
`
`--------
`ll
`
`
`HORIZONTAL SYNCHRONOUS SIGNAL
`DOT CLOCK
`
`
`
`
`
`HORIZONTAL SYNCHRONOUS SIGNAL
`
`VERTICAL SYNCHRONOUS SIGNAL
`
`247
`
`LIQUID CRYSTAL
`
`

`

`US. Patent
`
`Oct. 25, 1994
`
`Sheet 21 of 25
`
`5,359,342
`
`FIG. 25(a)
`
`
`
`AVAO
`
`FIG. 25(b)
`
`FIG. 25(0)
`
`OUTPUT
`
`OUTPUTH
`
`INPUT
`
`INPUT
`
`

`

`U.S. Patelit
`
`Oct. 25, 1994
`
`Sheet 22 of 25
`
`5,359,342
`
`FIG. 26
`
`VIDEO SIGNAL
`
`
` m9 JC___
`
`___________
`
`
`
` OFFSET
`
` HORIZONTAL SYNCHRONOUS SIGNAL
`
`REGISTER
`
`
`
`DOT CLOCK
`
`HORIZONTAL SYNCHRONOUS SIGNAL
`
`VERTICAL SYNCHRONOUS SIGNAL
`
`266
`
`

`

`US. Patent
`
`Oct. 25, 1994
`
`Sheet 23 of 25
`
`5,359,342
`
`FIG. 27(a)
`
`O
`
`\/
`
`255
`
`FIG. 27(b)
`
`OUTPUT2:?
`
`ADDITION
`AMOUNT
`
`INPUT 255
`
`FIG. 27(0)
`
`
`
`

`

`US. Patent
`
`Oct. 25, 1994
`
`Sheet 24 0f 25
`
`5,359,342
`
`FIG. 28
`
`VIDEO SIGNAL
`
`RAM WRITE-
`IN CONTROL
`CIRCUIT
`
`OUTPUT FROM
`
`OFFSET
`REGISTER
`
`LINEAR LINE
`GENER-
`
`ATING
`
`CIRCUIT
`
`CONVERTING
`
`282
`
`I
`:
`I
`
`OUTPUT TO SIGNAL
`
`LINE DRIVER
`
`

`

`US. Patent
`
`Oct. 25, 1994
`
`Sheet 25 of 25
`
`5,359,342
`
`FIG. 29(3)
`
`0
`
`V 255
`
`FIG. 29(b)
`
`FIG. 29(0)
`
`255
`
`OUTPUT
`
`255
`
`OUTPUT
`
`0 [0|
`OFFSET
`
`INPUT 255
`
`Olol
`OFFSET
`
`INPUT 255
`
`FIG. 29(d)
`
`
`
`
`0H
`OFFSET
`
`V 255
`
`

`

`1
`
`5,359,342
`
`2
`
`VIDEO SIGNAL COMPENSATION APPARATUS
`
`SUMMARY OF THE INVENTION
`
`This application is a continuation of now abandoned
`application, Ser. No. 07/537,939, filed on Jun. 14, 1990.
`
`BACKGROUND OF THE INVENTION
`
`1. Field of the Invention '
`
`The present invention relates to a video signal com-
`pensation apparatus for compensating the video signal
`inputted to the dot-matrix type display so as to improve
`display non-uniformity.
`2. Description of Prior Art
`In conventional video signal compensation appara-
`tuses, a study has been conducted on the display device
`using a liquid crystal display and the like, and a method
`of compensation for improving mainly the display char-
`acteristics of the liquid crystal panel is specially noted.
`For instance, because the input voltage—intensity
`characteristic of the liquid crystal panel has a non-linear
`characteristic, when the video signal is directly inputted
`to the liquid crystal panel, a half-tone display non-
`uniformity occurs. Accordingly, by providing a look-
`up-table memory provided with an input/output char-
`acteristic which is in a reverse relationship with the
`input voltage-light transmission characteristic and re-
`ferring to the memory data thereof, the video signal is
`converted to carry out compensation of the display
`non-uniformity. The compensation processings are to
`be carried out independently by the video signals R, G
`and B, respectively (e.g. see Japanese Patent Publica-
`tion KOKAI (Unexamined) No. 62-209478).
`With the conventional video signal compensation
`apparatus of the above type, it is difficult to compensate
`for the display non-uniformity by the screen position
`resulting from the recent enlargement in the size of the
`liquid crystal display. For instance, as the above display
`non-uniformity, the single panel color filter type display
`includes the following drawbacks:
`(1) Due to the irregularity of liquid crystal elements,
`the video signal level - screen brightness characteristics
`at the panel position show differences and non-uniform-
`ity occurs in displaying half-tones.
`(2) Due to the characteristics such as leakage, even in
`driving with the same signal,
`the transmitted light
`amounts differ between the field starting line and the
`field ending line, and inclination occurs in the screen
`brightness distribution.
`(3) Owing to the non-uniformity of brightness of the
`back light (faulty arrangement of fluorescent
`tube,
`faulty diffusion of diffusion plate, etc.),
`the screen
`brightness become non-uniform.
`In the projection display, the following additional
`drawback is observed:
`
`(4) Owing to the displacement of the optical axis in
`projecting three colors, non-uniformities of brightness
`and color occur.
`
`Because of the combination of various display non-
`uniformities on the screen, the display non-uniformity
`characteristics at the individual screen positions differ
`from one another. Accordingly, it has not been possible
`to perform compensations effective for the whole
`screen by compensating the video signal by using a
`look-up-table which has stored only 1 table of data for
`the whole screen.
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`An object of the present invention is to perform an
`effective compensation to the whole screen by splitting
`the display screen, converting the video signal by the
`split region of the screen, and then displaying an image
`on a screen, in a dot-matrix type display.
`In order to attain the above object, the present inven-
`tion provides a display apparatus comprising a dot ma-
`trix type display apparatus for displaying a video signal
`on a pixel by pixel basis by a dot clock and horizontal
`and vertical synchronous signals, and a video signal
`compensation apparatus for compensating the video
`signal, wherein said video signal compensation appara-
`tus comprises:
`a dot counter for counting the dot clock and output-
`ting a first count signal indicative of a horizontal screen
`position;
`a line counter for counting said the horizontal syn-
`chronous signal and outputting a second count signal
`indicative of a vertical screen position;
`a screen split control means for producing an output
`signal according to said first and second count signals
`which is indicative of a screen split region, said split
`screen region being one of a plurality of screen split
`regions; and
`a correction processing means for correcting an input
`video signal according to said output signal from said
`screen split control means and for outputting a cor—
`rected video signal to said dot matrix type display appa-
`ratus;
`and wherein said correction processing means com-
`prises:
`an analog-to—digital converter for converting the
`input video signal to a digital signal;
`a look-up-table memory means including therein a
`plurality of tables each of which has stored therein
`correction data for a corresponding one of said plurality
`of screen split
`regions,
`said look-up-table memory
`means being responsive to said output signal from said
`screen split control means for selecting one of said plu-
`rality of tables corresponding to a screen split region
`indicated by said signals outputted from said screen spit
`control means and for correcting said digital signal from
`said analog-to-digital converter according to the cor-
`rection data stored in the selected screen split region;
`and
`
`a digital-to-analog converter for converting a cor-
`rected digital signal outputted from said look-up-table
`memory means to an analog signal, said analog signal
`from said digital-to-analog converter being outputted as
`said corrected video signal from said correction pro-
`cessing means.
`it becomes possible to
`By the above construction,
`compensation-convert the video signal by screen split
`region, to correct compositely the display non-uniform-
`ity attributed to the properties of the display panel, the
`characteristics of the optical system, etc., and to obtain
`uniformity of the whole screen.
`
`BRIEF DESCRIPTION OF THE DRAWINGS:
`
`FIG. 1 is a view showing the construction of the
`liquid crystal display device using the video signal com-
`pensation apparatus in accordance with the first em-
`bodiment of the present invention;
`FIG. 2 is a view showing the construction of the
`screen split control means in the first embodiment;
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`FIG. 3 is a view showing the screen split in the first
`embodiment;
`FIGS. 4(A-1)—4(c-3).are illustrating the compensa-
`tion and conversion operations in the first embodiment;
`FIGS. 5(A-1)—5(c-3) and FIG. 6 are views showing 5
`the compensation and conversion operations in the ex-
`ample of changing the compensation data in the first
`embodiment;
`.
`~
`FIGS. 7 through 10 are views showing the compen-
`sation and conversion operations in the example of 10
`changing the compensation data in the first embodi-
`ment;
`FIG. 11 is a view showing the construction of the
`screen split control means in the example of changing
`the screen split control means in the first embodiment;
`FIGS. 12 through 15(c) are views showing the screen
`split control thereof;
`FIG. 16 is a view showing the construction of the
`screen split control means in the example of changing
`the screen split control means in the first embodiment;
`FIGS. 17 and 18 are views showing the screen split
`control thereof;
`FIG. 19 is a view showing the construction of the
`correction processing means in the example of changing
`the correction processing means in the first embodi-
`ment;
`FIG. 20 is a view showing the construction of the
`liquid crystal display device using the video signal com—
`pensation apparatus in accordance with the second
`embodiment of the present invention;
`FIG. 21(a)—21(c) are views showing the operation of
`the compensation and conversion in the second embodi-
`ment;
`FIG. 22 is a view showing the construction of the
`correction processing means in the example of changing
`the correction processing means in the second embodi-
`ment;
`FIG. 23(a)—23(e) are views showing the operation of
`the compensation and conversion thereof;
`FIG. 24 is a view showing the construction of the 40
`liquid crystal display device using the video signal com-
`pensation apparatus in accordance with the third em-
`bodiment of the present invention;
`FIG. 25(a)—25(c) are views showing the operation of
`the compensation and conversion in the third embodi—
`ment;
`FIG. 26 is a view showing the construction of the
`liquid crystal display device using the video signal com-
`pensation apparatus in accordance with the fourth em—
`bodiment of the present invention;
`FIG. 27(a)—27(c) are views showing the operation of
`the compensation and conversion in the fourth embodi-
`ment;
`FIG. 28 is a view showing the construction of the
`correction processing means in the example of changing 55
`the correction processing means in the fourth embodi-
`ment; and
`FIG. 29(a)—29(d) are views showing the operation of
`the compensation conversion thereof.
`DESCRIPTION OF THE PREFERRED
`EMBODIMENTS
`
`4
`the present invention. In FIG. 1, the numeral 10 denotes
`a video signal compensation apparatus, element 11 is a
`correction processing means, element 11a is an A/D
`(Analog-Digital) converter, element 11b is a look-up-
`table memory, element 11c is a D/A (Digital-Analog)
`converter, element 12 is a screen split control means,
`element 12a is a horizontal split bit selection circuit,
`element 12b is a vertical split bit selection circuit, ele-
`ment 13 is a dot counter, and element 14 is a line
`counter.
`
`The video input signals [e.g., three basic color signals
`of R (red), G (green) and B (blue)] are converted into
`digital signals by the A/D converter 11a and are input-
`ted to the address (e.g., lower address) of the look—up-
`table memory 11b, and are subjected to correction by
`referring to the table. The corrected video signals are
`converted to the analog signals by a D/A converter
`11c. By inputting to the signal line driver 15, they drive
`the liquid crystal panel for every selected line by the
`scanning line driver 16. The counter output which has
`counted the dot clock with the dot counter 13 utilizing
`the horizontal synchronous signal as a count clear signal
`is inputted to the horizontal split bit selection circuit
`12a, and after having been selected to the upper bit of
`the counter outputs, inputted to the upper address of the
`look—up-table memory 11b. Likewise, the counter out—
`put which has counted the horizontal synchronous sig-
`nal with the line counter 14 utilizing the vertical syn-
`chronous signal as a count clear signal is inputted to the
`vertical split bit selection circuit 12b, and after having
`been selected to the upper bit of the counter outputs,
`inputted to the address (e.g., upper address) of the look-
`up-table memory 11b. This makes it possible to refer to
`the look—up-table to the screen split region.
`Hereinafter, the operation of the video signal com-
`pensation apparatus constituted as above is explained.
`FIG. 2 shows a construction of the screen split con-
`trol means 20, which performs connections between the
`output line 23a of the dot counter 23, the output line 24a
`of the line counter 24 and the memory address line 25 of
`the correction processing means. For example, if the
`lower 4 bits for both the output line 230 and the output
`line 240 are not used when the output line 230 has In bit
`width and the output line 24a has n bit width and the
`memory address line 25 has m+n—4 bit width, screen
`splitting can be performed in 16 dot width in both hori-
`zontal and vertical directions.
`Assuming, for example, a case where the maximum
`screen brightness output indicates the levels as shown in
`FIG. 3 at the measured points A, B and C which denote
`the representative points of the screen split region, and
`the respective video signal
`level
`- screen brightness
`characteristics differ as in FIG. 4 (A—l), 4(B-1) and
`4(C-1). Assuming the plural correction data (e.g., input
`and output data having 8 bit width) stored in the look-
`up-table memory by the screen split region to be the
`data [shown in FIG. 4 (A-2), 4(B-2) and 4(C-2)] pre-
`pared by calculating the inverse curves so that the maxi-
`mum screen brightness output level such as a, b and c of
`the characteristic curves at the respective measuring
`points agree with the dynamic ranges of the input, the
`video signal
`level
`- screen brightness characteristics
`after the compensation conversion at the respective
`measuring points become, as shown in FIG. 4 (A~3),
`4(B-3) and 4(C-3). In this paragraph an explanation has
`been provided for a certain color, but the relationships
`are the same with respect to the other two colors.
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`Hereinafter, one embodiment of the video signal
`compensation apparatus of the present invention is de-
`scribed with reference to the drawings.
`FIG. 1 shows a construction of the liquid crystal
`display device using the video signal compensation
`apparatus in accordance with the first embodiment of
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`Thus, according to this embodiment, even when
`there exists display non-uniformity on screen, the video
`signal can be converted by using the correction data for
`every screen split region, so that there can be obtained
`an effect which makes it possible to perform a linearity
`correction effective for the whole screen.
`The correction data to be Stored in the look-up-table
`memory can be the data as shown below.
`Assuming, for example, the case where the maximum
`screen brightness output indicates the level similar to
`that of FIG. 3 at the measuring points A, B and C which
`show the representative points in the screen split region
`and the respective video signal level - screen brightness
`characteristics are as in FIG. 5 (A-l), 5(B-1) and 5(C-1).
`Since in this case the minimum output level in the maxi-
`mum screen brightness output level by the screen split
`area is the value c at the measuring point C, this value
`c is taken as a normalization level. Assuming the plural
`correction data (e.g., input and output data having 8 bit
`width) stored in the look-up-table memory by the
`screen split region to be the data [shown in FIG. 5
`(A-2), 5(B-2) and 5(C-2)] prepared by calculating the
`inverse curve so that the normalization level 0 agrees
`with the dynamic range of the input by using the por-
`tion of the screen brightness being from zero level to the
`normalization level 0 out of the characteristic curves at
`the respective measuring points, i.e., the portions sur-
`rounded by the discontinued line in FIG. 5 (A-l), 5(B-1)
`and 5(C-l), the video signal level — screen brightness
`characteristics after the compensation conversion at the
`respective measuring points become, as shown in FIG.
`5 (A-3), 5(B-3) and 5(C-3). As a result, the maximum
`screen brightness output becomes an output in confor-
`mity with the normalization level c, as shown by the
`solid line in FIG. 6. In this paragraph an explanation has
`been provided for a certain color, but the relationships
`are the same with respect to the other two colors.
`Accordingly, when the abovementioned correction
`data are used, there can be obtained an effect which
`makes it possible to perform a linearity correction with
`improvement to the uniformity of the whole screen.
`The correction data to be stored in the look-up-table
`memory can be the data as shown below.
`Assuming, for example, to carry out correction so
`that the maximum screen brightness output indicates the
`normalization level as shown in FIG. 7, when the maxi-
`mum screen brightness output is as shown by the solid
`lines in FIGS. sB—8D at the measuring points A, B and
`C shown in FIG. 8A which show the representative
`points of the screen split region, a normalization level
`for each color is set out as shown by the dashed line for
`normalization. At this time, it is necessary to set the
`normalization level in a ratio (R: G: B) to make the
`mixed output of the three basic colors, such as aR+ac.
`+aB, bR+bG+bB and cR+cG+cB, white color. Here-
`inafter, normalization and inverse conversion of the
`color B out of the three basic colors are shown. There
`is assumed a case where the video signal level - screen
`brightness characteristics at the measured points A, B
`and C are as in FIG. 9 (A-l), 9(B-1) and 9(C—1). In this
`case, the normalization levels by screen split area are a3,
`bB and CB at the measuring points A, B and C. Assuming
`the plural correction data to be stored in the look-up-
`table memory by screen split area (e.g., input and output
`data having 8 bit width) to be the data [shown in FIG.
`9 (A-2), 9(B-2) and 9(C-2)] prepared by calculating the
`inverse curve so that the normalization level agrees
`with the dynamic range of the input by using the por-
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`tion of the screen brightness being from zero level to the
`normalization level (a3, bB and CB) out of the character-
`istic curves at the respective measuring points, i.e., the
`portions surrounded by the discontinued line in FIG. 9
`(A-l), 9(B-l) and 9(C-1), the video signal level — screen
`brightness characteristics after the compensation con-
`version at the respective measuring points become, as
`shown in FIG. 9 (A—3), 9(B-3) and 9(C-3). As a result,
`the maximum screen brightness output becomes as
`shown in FIG. 10. In this paragraph an explanation has
`been provided for the color B, but the relationships are
`the same with respect to the other two colors.
`Accordingly, when the abovementioned correction
`data are used, there can be obtained an effect of pre-
`venting the deterioration of the screen contrast in per-
`forming a linearity correction with improvement to the
`uniformity of the whole screen.
`In the above paragraphs, concrete correction data
`have been described for the purpose of explaining the
`present invention. However, it is to be understood that
`the present invention is not limited to the specific cor-
`rection data. It is to be noted that all such changes
`apparent to those skilled in the art are included in the
`scope of the present invention.
`The screen split control means can be of the construc-
`tion as shown below.
`
`FIG. 11 shows a construction of the screen split con-
`trol means 110, which is furnished with a horizontal
`split position memory 111 for outputting a signal to
`show the horizontal split position by the count value
`inputted from the output line 113a of the dot counter
`113 and a vertical split position memory 112 for output-
`ting a signal to show the vertical split position by the
`count value inputted from the output line 114a of the
`line counter 114. By inputting the respective output to
`the memory address line 115 of the correction process-
`ing means, the image split width can be optionally set to
`exercise the video signal compensation by the screen
`split region.
`For example, when the display screen is split into 16
`blocks (split into four parts horizontally and vertically
`respectively) as in FIG. 12 and the split positions in
`horizontal direction are shown in “X1”, “X2” and “X3”
`and the split positions in vertical direction in “Y1”,
`“Y2” and “Y3”, the input and output operations of the
`horizontal split position memory 111 become, as shown
`in FIG. 13, so as to output “00” when the input from the
`output line 113a of the dot counter 113 is in the range
`between “0” and “XI—l”, and the input and output
`operations of the vertical split position memory 112
`become, as shown in FIG. 14, so as to output “00” when
`the input from the output line 114a of the line counter
`114 is in the range between “0” and “Y1 — 1”. Accord-
`ingly, as shown in FIG. 15 (a), as the screen split can be
`set by the variation (AI) of the maximum screen bright-
`ness level, the maximum screen brightness output after
`the compensation conversion becomes as shown in
`FIG. 15 (b), by which there can be obtained such effects
`that the difference of brightness in the screen split re-
`gions decreases and the difference of color in the case of
`mixing the three basic colors also decreases among the
`screen split regions.
`Further, the screen split control means may have the
`construction as shown below.
`
`FIG. 16 shows a construction of the screen split con-
`trol means 160, which is furnished with a horizontal
`split position memory 161 for outputting a signal to
`show the horizontal split position by the count value
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`inputted from the output line 163a of the dot counter
`163, a vertical split position memory 162 for outputting
`a signal to show the vertical split position by the count
`value inputted from the output line 1640 of the line
`counter 164, and a block address memory 166 con-
`nected to the horizontal split position memory 161 and
`the vertical split position memory 162 for carrying out
`correspondence between the screen split region and the
`memory address. By inputting the output of the block
`memory address to the memory address line 165 of the
`correction processing means, the video signal compen-
`sation can be performed by the screen split region.
`For example, when the display screen is split into 16
`blocks (split into four parts horizontally and vertically
`respectively) as in FIG. 12 and the split positions in
`horizontal direction are shown in “X1”, “X2” and “X3”
`and the split positions in vertical direction in “Y1”,
`“Y2” and “Y3”, the output of the horizontal split posi—
`tion memory 161 is 2 bits, which outputs the values of
`“00” —“l l” as shown in FIG. 13, and the output of the
`vertical split position memory 162 is 2 bits, which out—
`puts the values of “00” —“11” as shown in FIG. 14.
`With respect to the output of the block address memory
`166, when it is set to 2 bit width as shown in FIG. 17,
`the said 2 bit output is inputted as a memory address of
`the correction processing means. Accordingly, there
`can be obtained an effect that, in altering a correction
`data in a certain screen split region to a correction data
`in another screen split region, only the content of the
`block address memory 166 may be altered. In general,
`as the content of the block address memory 166 is very
`small in comparison with the correction data amount of
`the look-up-table memory or the like in the correction
`processing means, easy and high speed alteration can be
`realized. Also, by setting the block address memory
`166, the same correction data can be used for the differ-
`ent screen split regions. The scree