UNITED STATES PATENT AND TRADEMARK OFFICE
`
`PATENT TRIAL & APPEAL BOARD
`
`QSC AUDIO PRODUCTS, LLC
`
`Petitioner
`
`V.
`
`CREST AUDIO, INC.,
`
`Patent Owner
`
`Case IPR2014~00127
`
`US. Patent 6,023,153
`
`Declaration of Jessica King
`
`LEGAL121083590.1
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`CREST 2002
`
`CREST 2002
`
`

`

`1, Jessica King, declare as follows:
`
`I am a librarian for the Seattle office of Perkins Coie, LLP.
`
`I was asked to purchase a copy of “A Class D Amplifier Using MOSFETS
`
`with Reduced Minority Carrier Lifetime” by Jon Hancock from the Audio
`
`Engineering Society web site.
`
`Shown below is a screen shot of the ABS website with the search results for
`
`the Hancock paper. The screenshot shows that ABS lists the publication date as
`
`September 1, 1990.
`
`,.fi' nudist Engineering Society
`Home E‘ifi'fii s v’lenloprrlaip realizations Cemmuniiy‘ 5e Ctiom‘ Standards Erin
`
`search ti
`
`
`Horne 3 Publications :c» E—Llinrag
`
`AES E--Library search Results
`
`
`A Class D Amplifier Using MOSFETS with Reduced Minority Carrier Lifetime
`
`Design techniques are presented for a 0.5 Mhz Ctass D ampiitier using specially processed MOSFETS with ultra~tast intrinsic
`diode recovery characteristics. Design problems and solutions are presented for the power, filter and modular stages.
`Problems and resuits are discussed using error correction by loop feedback from the output fitter and supply teedvforward
`power factor corrected quasi-resonant switching power supply.
`
`Author: Hancock, Jon
`Affiliation: Siemens Components, Santa Ciara, CA
`AES Convention: 89 (September 1990)
`Paper Number: 2958
`Publication Date: September 1, 1990
`Subject: Signal Processing
`
`Clickto purchase paper or iogin as an AES member. if your company or school subscribes to the E—Library then switch to the
`institutionai version. if you are not an AES member and would tike to subscribe to the E—Ubrary then Join the AES!
`
`lmport into BibTeX
`
`Permalink
`
`This paper costs $20 for non-members, $5 forAES members and is flee for E-Ubraw subscribers.
`
`(5% Start a discussion about this paper!
`
`LEGAL121083590.1
`
`

`

`A copy of the Hancock paper that I downloaded from the ABS website is
`
`attached as Appendix 1 to this declaration.
`I I was also asked to purchase a copy of “The Characteristics of Conventional
`
`and Switching Power Supplies in Analog Signal Processing” by Jay Gordon from
`
`the Audio Engineering Society (“ABS”) web site.
`
`Shown below is a screen shot of the search results for the Gordon paper
`
`showing that AES lists the publication date as November 1, 1994.
`
`We Characteristics of Conventional and Switching Power Supplies in Anaiog Signal
`Processing
`
`The role of the power supply as the interface between the ac line and a dc—powered electronic device is examined. The
`characteristics of conventional and switching power supplies are analyzed, and measurements are taken on a typical
`example. The effect of these characteristics on an audio instaliafion are discussed. It is concluded that switching supplies
`have significant advantages for some applications.
`
`Author: Gordon, Jay
`Affiliation: Factor One Co, Keyport, NJ
`AES Convention: 97 (November 1994)
`Publication Date: November 1, 1994
`Subject: Analog Signal Processing
`
`Paper Number: 3889
`
`Permalink
`
`Import into BihTeX
`
`Click to purchase paper or togin as an AES member. if your company or school subscribes to theE-Library then switch to the
`institutional version. it you are not an AES member and would tike to subscribe to the E—Library then Join the AES!
`
`This paper costs $20 for non—members, $5 for AES members and is free for E—Ubrary subscribers.
`
`(1* Start a discussion about this paper!
`
`I purchased a copy of the paper by clicking the “Click to purchase paper”
`
`link on the web page shown.
`
`A copy of the paper as downloaded is attached as Appendix 2 to this
`
`declaration.
`
`I hereby declare that all statements made herein of my own knowledge are
`
`true and that all statements made on information and belief are believed to be true;
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`LEGAL121083590.1
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`_ 3 _
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`

`

`and further, that these statements were made with the knowledge that willful false
`
`statements and the like so made are punishable by fine or imprisonment, or both,
`
`under Section 1001 of Title 18 of the United States Code and that such willful false
`
`statements may jeopardize the results of these proceedings.
`
`Respectfully Submitted,
`
`
`
`LEGAL121083 590.1
`
`

`

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`

`A CLASS D AMPLIFIER USING MOSFETs WITH
`
`REDUCED MINORITY CARRIER LIFETIME
`
`Jon Hancock, Siemens Components
`
`ABSTRACT
`Design techniques are presented for a 0.5 MHz Class D amplifier using specially processed
`MOSFETs with ultra-fast intrinsic diode recovery characteristics. Design problem and solutions are
`presented for the power, filter and modulator stages. Problems and results are discussed using error
`correction by loop feedback from the output filter and supply feed-forward to the modulator stage. An
`overview is included of power supply issues, including a lightweight power factor corrected quasi-
`resonant switching power supply.
`
`POWER STAGE BASIC TOPOLOGIES
`The topology chosen for this switching amplifier is the "classic" buck PWM switch in a full
`bridge configuration. Alternatives considered included the half bridge, and a faur quadrant Cuk
`converter-[2]. The basic Cuk converter can be thought of as a combination buck/boost converter using
`capacitors as an intermediate energy transfer element.
`If properly designed, it can achieve near zero
`ripple currents, making it relatively easy to achieve low E.M.I. Furthermore, a four quadrant converter
`may be configured with all drive circuits referred to ground. The Cuk converter is not without some
`drawbacks, though. The individual converter blocks have a fairly non-linear gain characteristic, which is
`balanced to a degree in the four quadrant converter. The characteristics of the charge transfer capacitor
`has a significant effect on circuit balance and overall distortionIS]. Additionally, the additional series
`inductors required to meet the "zero output ripple" condition create another pole in the transfer function
`which tends to peak the output response at frequency well below the output corner frequency. This
`may be damped by an RC damper of the Cuk capacitors, but it requires capacitors 2X the value of the
`Cuk capacitors. Output
`impedance is relatively high, rendering the Cuk converter fairly load
`, sensitive.Furthermore, this design requires I’ and N type devices for grounded operation, rendering
`high power converters impractical due to the 3 to 1 resistance handicap of P-channel MOSFETs.
`Basic characteristics of buck PWM converter
`
`The half bridge and full bridge buck converters present their own set of problems, but offers
`some benefits in return. The inherent transfer function is quite linear, and the number of reactive energy
`storage elements is minimized. Achieving low output voltage ripple with a single LC stage is
`problematic at switching frequencies that result in good efficiency. As for all buck converters, input
`current ripple is fairly high, and has a high harmonic content. To achieve low losses at high power, all
`N-channel devices should be used, and this necessitates isolated, "floating"drivers with considerable
`precision and speed. Although some converters in principle allow simple ground referred drive circuits
`with direct connection to analog control circuits, experience and the reports of other researcherslS]
`shows that it is impractical to mix fast digital and drive circuits with "clean" analog circuits on a
`common ground. The author's experience is that analog control and feedback circuits must be isolated
`to the greatest degree possible from the driver and switching power blocks;
`this principle drove a
`number of design decisions. Under these ground rules, the development of a "clean" buck converter is
`not at as much disadvantage as might be thought. Furthermore, its inherently linear transfer function
`and low output impedance are very desirable qualities. The overall topology developed is outlined in
`Fig. 1, which includes the basic control loop, modulator, and output stage signal paths. Note that the
`modulator circuit uses Switched current sourCes to create a high frequency triangle wave. The square
`
`

`

`wave oscillator is derived from the divided output of a crystal ocsilllator at 5 MHz. The triangle
`amplitude is a function of the current source amplitude, which includes a fixed reference component,
`and a component derived from the power supply rail voltage. By this means the modulator stage gain is
`corrected by feedforward so that the variations in output level which would occur because of supply
`voltage variations are suppressed. This includes effects such as variations in power supply voltage
`which occur as a result of high output signal levels.
`
`Bridge Configurations
`Several
`factors were considered when choosing between a half or full bridge switch
`configuration. Component cost and count will at first glance appear lower for the half bridge circuit.
`However, for a given power level, the full bridge allows the use of MOSFETs with 1/2 the VDSIBRR)
`rating. Though the full bridge circuit has two switches in series with the load, the RUSION] of 200V
`MOSFETs is less than 1/2 of 400V types with comparable chip area. As an example, the BU2250 with a
`20 mm2 chip is rated at 250V, 0.24 ohms and 17 A, while a BUZS31, with a 25 mm2 chip is rated at 500V,
`0.8 ohms, and 8.0 A. For the same number of MOSFETs, conduction losses can be lOWer with the full
`bridge. The lower voltage MOSFETS also have considerably lower er, contributing to lower switching
`losses, should the intrinsic diode carry current. Other issues are noise and distortion. For the full bridge
`circuit, even order distortion products will cancel. Furthermore, the high frequency switching loop may
`be confined to the power supply rails, while in the half bridge circuit the power tool) includes the
`ground circuit in the path, not just as a reference point. The opposing current paths in the bridge circuit
`may be used to advantage to reduce the effective inductance in the high frequency current path, by
`overlaying opposing conductor traces [9]. The area of the magnetic field can be confined to a very small
`area, minimizing inductance and radiated energy.
`
`'
`Switching transistors 8i any-parallel diodes
`In a buck switching amplifier the output filter presents an inductive load to the switching stage.
`In some bridge applications, such as motor drives, the inductive load current is handled by anti-parallel
`energy recovery diodes connected between the switch load and the power supply rails. As Atwood
`notedll, 4], switching between active device conduction and recovery diode conduction introduces a
`"crossover notch" step function in the output waveform. His (patented) approach to solving this
`problem uses a tapped inductor to provide a voltage offset for the recovery diode. Additional diode
`clamps are pr0vided for adjustable inductors inserted in series with each switching leg. These are
`necessary to prevent avalanche or dv/dt failures in the MOSFETs, which occur if the parasitic bipolar
`structure (Fig. 2) is turned on [3].
`In combination,
`these efforts reduce distortion and improve
`reliability, but the tapped inductor configuration puts considerable constraints on the inductor design,
`and must be optimized for a specific line voltage.
`The intrinsic diode of conventional power MOSFETs has a carrier lifetime and charge storage
`which is controlled by doping characteristics of the silicon and by the thickness of the n- region. At
`voltage ratings rise, so does the required thickness of the 11- region, and with it the diode recovery time.
`Typical 500 V MOSFETs show recovery times of 500 nsec from 8 A forward current at 100 A/usec
`di/dt. During this recovery phase the peak IDRM may become very high. This makes turn-on of the
`parasitic bipolar likely, particularly at elevated junction temperatures. Near the end of the recovery
`phase occrrrs a critical interval, when high dv/dt is applied (Fig. 3). If the MOSFET parasitic bipolar has
`been turned on, it will fail because of the SOA limitations of the parasitic bipolar device. whose chrsus]
`is approximately 1/ 2 the VDSIBRR] rating of the MOSFET.
`It is essential
`to prevent body diode conduction in conventional MOSFETS, because diode
`recovery losses become a major contributor to switching losses, and because of this dv/dt failure mode.
`This usually requires the use of anti-parallel diodes, schottity diodes in series with the MOSFETs, which
`contribute to increased conduction losses. The only other solution is to improve the MOSFET .
`Carrier lifetime can be affected by processes such as proton irradiation, or heavy metal
`implanting. These processes create minor imperfections in the silicon crystaline lattice which facilitate
`carrier recombination. Siemens has found a platinum implant process to be the most effective, and
`yeilding excellent stability of characteristics with repeated thermal cycling. The BUZZSO is a 250 V Fast
`
`

`

`Recovery Epitaxial Diode Field Effect Transistor (FREDFET) with improved diode characteristics. It
`exhibits a typical recovery time of 85 nsec from 17 A forward diode current (Fig. 3). This compares very
`favorably with ultra-fast diodes, which are typically rated for 50nsec recovery from a forward current of
`1A. As the test current is increased, stored charge and recovery time increase. Furthermore, this new
`MOSFET has very high immunity to bipolar turn-on, giving it high dv/dt capability in this mode. This
`makes it suitable for use in applications where inductive recovery current may flow in the body diode of
`the MOSFET.
`
`Design verification using SPICE Simulations
`Much of the design exploration and initial verification for this switching amplifier was done
`using SPICE simulations of the power and control circuit. A typical problem with this approach is the
`lack of complex device models, including usable power MOSFET models. The built-in models for SPICE
`were developed for simulating IC circuits; in the case of MOSFETS, their is considerable difference in
`device structures and electrical characteristics between lateral MOS transistors used in IC structures,
`and vertical power MOSFE'I‘sI7]. In the case of the lateral MOS transistor, the gate overlays a horizontal
`current path between source and drain. Switching characteristics do not change a great deal with
`variation in V133. The gate to drain capacitance is very non~linear for vertical MOSFETs, as the
`capacitance gate to drain includes a depletion capacitance element. Additionally, there is no provision
`in the SPICE MOS model for the intrinsic diode formed by drain to p-well.
`A SPICE subcircuit model has been developed (Fig. 5) using SPICE MOS, IFET, and DIODE
`- models to form a structure equivalent to the vertical MOSFET [8]. This model uses Polynomial VCVS
`with fixed capacitor to model the non~linear gate to drain capacitance, producing results valid for both
`AC and TRANSIENT simulations.
`it is necessary to use a heirarchal approach to
`Given the finite nature of computing resources,
`preparing simulations of complex circuits[12]. For this reason, a detailed examination of driver circuit
`issues should take' place at a different level than an examination of overall topology issues, or control
`circuits. For this development effort, simulations of varying detail were made at the driver circuit level
`(Fig. 6), at the complete power switch bridge circuit (Fig. 8), analysis of the output filter (Fig. 14), and for
`the complete control loop (Fig. 19).
`Driver Circuits
`the driver circuit simulations required developing macro models of the
`Preparation of
`comparator and driver chips which were under evaluation. The driver simulation was used to predict
`peak gate drive currents and rise and fall times as a function of layout parasitics and component values.
`MOSFETs have very high can at low V135, and hence a long TD off. The driver was designed to swing
`+/- 7 volts, speeding up turn-off considerably when compared with drive circuits which only sink to the
`source potential. Though there is a slight R9510“; penalty from not using 10 volt drive, the overall drive
`power is reduced by 50%, making it a worthwhile trade-off. Since floating driver circuits are required,
`isolated low power auxiliary supplies power the driver le and opto~couplers. A miniature dual bobbin
`EP-lO transformer with 12 pf of inter-winding capacitance is used at 100 KHz for powering each of the,
`driver circuits. The schematic of the driver stage developed is shown in Fig. 7. A "power good"
`comparator (not sh0wn) is also used to gate the drive signals, and provide undervoltage lockout, as well
`as shutdown in the even of driver overloads. High speed, high CMRR opto couplers are used to couple
`the drive signals. The opto couplers have a longer time delay off than on (due to hole carrier
`recombination in the LED). To compensate this delay, an additional opto coupler stage is used at the
`comparator outputs in inverted phase to add a variable delay on, thus preventing cross conduction.
`
`Evaluation oi Bridge switching circuit using MOSFET models
`The complete bridge topology employed is shown in Fig. 8. it is similar to a previously reported
`circuit [9] using MOSFETs directly without schottky blocking diodes. However,
`it uses coupled
`inductors instead of individual di/dt inductors in each half bridge, as in [10], with fast recovery clamp
`diodes directly connected to the opposite rail voltage. A coupled inductor model was developed based
`on E. Graetz‘s non-linear inductor model [17]. The SPICE coupled inductor model has problems in with
`
`

`

`transient simulations in circuits involving recirculating currents. Even using macro models this is a
`relatively complex circuit to simulate, but it can be run in a few hours on a 386 based PC.
`Figures 9 through 12 show simulation results for the final version of the bridge, running for 50
`usec with a 20KI-Iz sine wave "signal" input. Printing interval was set for 25 nsec, and minimum time
`step interval was set for 5 nsec. Fig. 9 shows the 20 KHz signal input, and the 500 KHz triangle wave,
`with both phases of comparator output. Fig. 10 shows gate voltage waveforms and drain voltage rise
`and fall times for one of the switch blocks. Fig. 11 shows the voltage at one of the half bridge outputs,
`and the current through the switch leg monitored by ISRCl. The voltage from the LC filter output is
`shown in Fig. 12.
`Evaluation of this circuit showed that minimizing inductance in the power supply leads and
`diode clamps was critical to developing clean waveforms, and minimizing voltage overshoots on the
`drain circuits of the MOSFETs. Circuit inductance is one of the few areas in which there are choices
`available which can make a key difference in overall behavior. In older high power circuits, with clock
`frequencies in the audible range, conventional bus bar or heavy gauge stranded wire is most commonly
`used for connections. Any interconnect should be considered as an air core inductor, and evaluated as
`such for its effect on circuit performance.
`For the case of inductance where the energy is stored in an "air" gap,
`
`L
`
`=t10N2A/L
`
`where 140 is the permeability of free space, A is the current through N turns enclosed by the magnetic
`path 1, Taken a little further, one can define the inductance of a wire in "free space“ from its length and
`diameter, where
`
`W}
`
`Wd
`u
`
`= Length of conductor in cm
`
`= Diameter of wire in cm
`= Permeability
`
`Then, inductance may be calculated from
`
`E
`4W1
`30'002W110th/E -1+4.
`
`L
`
`For a given length of conductor of a given diameter, it doesn't appear from this equation that
`there is much we can do. Any circuit includes both a send and return current path. As one brings two
`conductors close together carrying opposing currents, the magnetic field becomes concentrated between
`them, reducing the area of the field and the inductance.
`.
`Using a close relative of the previous equation, we can calculate the expected inductance from
`one more parameter, the conductor spacing:
`WP
`= Parallel conductor spacing in cm
`
`L
`
`= 0.004 W1 [log [W3] + {f
`
`2W
`
`W
`
`- J]
`
`This function is plotted in Fig. 13, showing that dramatic reductions in inductance are possible if
`opposing current paths are overlayed in high power high frequency circuits. This principle was applied
`to the full bridge, resulting in a power switch layout with 16 transistors and 8 diodes in a space
`approximately 4" X 4".
`
`

`

`SIGNAL PATH TOPOLOGY
`
`Evaluating the output filter with realistic component models
`The output filter is another design problem where component characteristics and parasitic
`elements have a significant role in affecting the results expected at frequencies of hundreds of kilohertz.
`The small signal model for the power stage and filter is shown in Figure 14. The output filter is a
`combination of LC low pass at 25 KHz, and a resonant bandstop filter at 500 KHz which adds an
`additional low pass element at 100 KHz [9}. The ideal filter is calculated using standard methods, and
`may be analyzed using standard 8 functions or an admittance matrix. The result of a SPICE simulation
`using "ideal" components and a resistive load for the calculated filter circuit is shown in figure 15.
`Predicted attenuation at the clock frequency of 500 KHz is approximately 100 dB.
`If a load having
`inductive and resistive characteristics is substituted, the Q of the filter changes, resulting in some
`peaking at the resonant frequencies (Fig. 16).
`An "ideal" filter will not be possible to build, so it is desirable to explore the characteristics of
`one modeled with the non-ideal resistance and inductance of capacitors. With this modification, the
`filter characteristics can be more realistically assessed, as in Fig. 17, which includes models for fairly
`high quality capacitors. Fig. 18 shows the final filter characteristics with damping resistors for the CLC
`section, and RC networks for impedance stabilization at high frequencies.
`The complete small signal model is shown in Figure '19. A four pole input filter is used with an
`fc of 25 KHz. X37 is a balanced differential feedback amplifier with lead compensation to compensate
`for one of the poles of the output filter; this is necessary to allow closed loop stability around an LC
`filter. This model includes a ripple filter formed by R54, R56, C37, and C35, whose purpose is to reduce
`the spike ripple seen by the error amplifier. Feedback is taken after the first LC filter section, but before
`the additional phase shift of the bandstop filter. The error amplifier uses a pole-zero—pole scheme
`common to switching power supplies to control loop gain. The previously described output filter and
`small signal power stage model completes the loop. Fig. 20 shows the results plotted for open loop gain
`of the feedback and error amplifiers. The phase lead peaks at 100 KHz, where loop crossover is desired.
`Note that to achieve adequate lead compensation at these high frequencies requires using operational
`amplifiers whose bandwidth extends to several megahertz without degradation. Fig. 21 displays the net
`loop gain, showing loop crossover just below 100 KHz, with a phase margin of about 65 degrees. The
`net loop characteristic is quite close to the ideal 6 (18 per octave roll-off. The predicted closed loop
`response is shown in Fig. 22, as well as the error amplifier level vs. frequency with the loop closed. This
`indicates that the input filter characteristic is fairly well matched to the output stage bandwidth, as little
`peaking of error amplifier levels occurs.
`'
`
`OUTPUT WAVEFORMS
`Actual output waveforms are shown in figures 23 through 26, recorded with a Tektronix 7020
`waveform digitizer. The output from one of the half bridge sections is shown in Fig. 23, at
`approximately 150 volts P-P. Correlation with the simulation results is quite good. High level, high
`frequency output is shown open loop in Figure 24, displaying the high degree of basic linearity in the
`power stage. The next graph, Fig. 25, illustrates low level linearity, with 125 KHZ output at 500
`mV/div.. Output noise voltage is shown in Fig. 26, displaying a base band ripple of 50 mV P-P, with
`switching spikes somewhat over 100 mV. Most of the spike ripple can be eliminated by further
`optimization of the filter layout, and an additional Vl-IF filter block, such as might be implemented using
`bulkhead feedthrough capacitors.
`
`OVERVIEW OF HIGH EFFICIENCY POWER FACTOR CORRECTED POWER SUPPLY
`
`Power Factor- the problem with capacitor input power supplies
`The majority of power amplifiers produced use 50/60 Hz transformers and capacitor input filter
`rectification. As power levels rise, so does the weight and expense. Furthermore, though these supplies
`are quite simple electrically, they are not as "clean" on the power line as most of their users would
`
`

`

`expect. Like capacitor input switching power supplies, the input current flows in relatively narrow
`spikes, resulting in high harmonic content, and high peak currents in proportion to the true power
`consumed. This is illustrated in concept in Fig. 27, which shows the AC voltage waveform, the current
`conduction when the AC wave exceeds the filter droop voltage, and the input filter voltage ripple.
`Typical capacitor input circuits exhibit a power factor of 0.7, which in simple terms, means that a circuit
`designed for 1000 watt delivery into a resistive load can only deliver 700 watts into this load.
`In power supply applications such as airborn electronics, power factor has long been a concern
`and specified parameter. Of late it is receiving more attention for industrial and consumer equipment,
`particularly in Europe, where new IEC standards classify non-power factor corrected equipment with
`waveforms like Fig. 27 as Class D equipment, with attendant penalties and restrictions.
`One method gaining in popularity to solve this problem is the use of a switching converter as a
`current pres-regulator to program the current draw to follow the line voltage [18]. Typically a boost or
`flyback converter is used as a lore-regulator to charge a 360 V bus, which powers at secondary converter
`that provides isolation and load regulation. A low value of high frequency ripple, which is easily
`filtered, is superimposed on the 50/60 Hz low frequency current waveform, as shown in Fig. 28. The
`cost of two converters is offset by several factors. Because the secondary regulator sees a relatively
`stabilized voltage, the secondary converter components can be sized more ideally. The ripple currents
`are considerably reduced in the filter capacitors by this technique, saving cost in the capacitors and
`semiconductor switches. Last, but probably not least, this circuit can provide automatic line voltage
`adaptation, working from 90 VAC to 260 VAC without any taps or switches.
`Low Noise ZCS-GRC main converter
`
`For the secondary converter, objectives in an amplifier power supply must include very low
`ripple, inherently good load regulation, and high efficiency. For an amplifier application, high power
`density, or small size, is of secondary importance. Although a conventional switching power supply
`may achieve some of these goals, newer topologies show that improvements can be made, particularly
`in regard to EM] and noise.
`Resonant and Quasi—resonant converters have been developed in many topologies to achieve
`high power density through minimum magnetics volume and very high switching frequencies- often in
`the megahertz range. By using reactive components, including reactive‘parasitics of switching devices or
`transformers, a non-square current or voltage waveform is achieved, decreasing the stress and losses for
`switching transitions, when compared with conventional pulse width modulated "square wave“
`switching power supplies. Whereas early PWM switching power supplies operated at a few 10's of
`kilohertz, resonant supplies have been developed at frequencies as high as 10 's of megahertz [13, l4, l5,
`16]. If high power density is not the goal, lower frequency ranges may be used with transistors such as
`IGBT's [16, 19], to achieve good efficiency and very reasonable di/dt's (and low noise) with switching
`rates in the 100 KHz region. Fig. 29 shows the basic power switch circuit for one type of quasi-resonant
`power supply, a zero current switching parallel quasi resonant converter. This type of supply switches
`the voltage across the transistors at nearly zero current (Fig. 30), resulting in low switching losses, and
`very low switching stress on output components, as the voltage output waveforms are haversines.
`Almost any kind of PWM supply may be built as an equivalent resonant circuit. The parallel quasi-
`resonant circuit is most similar to the buck pwm converter, and like the buck equivalent circuits, has
`low output impedance and inherently good load regulation.
`Although "unconventional" power supplies (ie, not 50/60 Hz transformer isolated, with
`capacitor input filters) are uncommon in audio, the convergence of component, design, and power
`quality issues may change that picture.
`
`SUMMARY
`
`A new power MOSFET has been developed using heavy metal doping which is well suited to
`developing a switching amplifier. A bridge circuit has been developed which supports fast switching
`and good waveform shape at SOOKHz. SPICE modeling is shown to be a useful tool for design
`verification of many aspects of the circuit operation, including the driver circuits, bridge switch, output
`filter, and control loops.
`
`

`

`REFERENCES
`[ll
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`1