UNITED STATES PATENT AND TRADEMARK OFFICE
` BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`Page 1
`
`MACRONIX INTERNATIONAL CO., )
`MACRONIX ASIA )
`LIMITED, MACRONIX )
`(HONG KONG) CO., LTD., ) Attorney Docket No.
`and MACRONIX AMERICA, INC. ) 110900-0004-656
` Petitioner, )
` -vs- ) Case IPR2014-00898
`SPANSION LLC, ) Patent 7,151,027 B1
` Patent Owner. )
`____________________________)
`
` VIDEO DEPOSITION OF DHAVAL J. BRAHMBHATT
` SEPTEMBER 24, 2014
`
`Reported by:
`ANNE M. TORREANO, RPR, CCRR, CLR, CSR No. 10520
`JOB NO. 84338
`
`MACRONIX
`IPR2014-00108
`MX027-1014
`Page 00001
`
`TSG Reporting - Worldwide
`(877) 702-9580
`
`IPR2014-00108
`Exhibit MX027-1014
`
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`A P P E A R A N C E S:
`
`FOR THE PETITIONER:
` WINSTON & STRAWN
` BY: ANDREW SOMMER
` 1700 K Street, N.W.
` Washington, D.C. 20006
`
`FOR THE PATENT OWNER:
` ROPES & GRAY
` BY: J. STEVEN BAUGHMAN
` BY: JANICE JABIDO (VIA TELEPHONE)
` 700 12th Street, NW
` Washington, D.C. 20005
`
`THE VIDEOGRAPHER:
` PETER MATTESON
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` WEDNESDAY, SEPTEMBER 24, 2014
` 10:35 A.M.
`
` Video deposition of DHAVAL J. BRAHMBHATT, held
`at 3300 Hillview Avenue, Palo Alto, California,
`before Anne M. Torreano, a Certified Shorthand
`Reporter, Registered Professional Reporter,
`California Certified Realtime Reporter and a
`Certified LiveNote Reporter.
`
`Page 4
` WEDNESDAY, SEPTEMBER 24, 2014
` P R O C E E D I N G S
` THE VIDEOGRAPHER: This is the start of
`tape labeled No. 1 of the videotaped deposition of
`Dhaval J. Brahmbhatt in the matter of Macronix
`International, Limited, et al., versus Spansion LLC,
`before the Patent Trial and Appeal Board, Attorney
`Docket No. 110900-0004-656.
` This deposition is being held at 3300
`Hillview Avenue, Palo Alto, California on September
`24th, 2014 at approximately 10:35 a.m.
` My name is Peter Matteson from TSG
`Reporting, Inc., and I'm the legal video specialist.
` The court reporter is Anne Torreano, in
`association with TSG Reporting.
` Will counsel please introduce yourselves?
` MR. BAUGHMAN: Steve Baughman from Ropes &
`Gray, and with me is Janice Jabido from Ropes &
`Gray, for patent owner Spansion.
` MR. SOMMER: Andrew Sommer of Winston &
`Strawn, LLP on behalf of the petitioners.
` THE VIDEOGRAPHER: Thank you.
` Will the court reporter please swear in the
`witness?
`//
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`Page 5
`
` DHAVAL J. BRAHMBHATT,
` having been duly sworn to tell the truth,
`testified as follows:
` THE VIDEOGRAPHER: Please proceed.
` EXAMINATION
`BY MR. BAUGHMAN:
` Q. Mr. Brahmbhatt, good morning.
` A. Good morning.
` Q. Is there any reason, medical or otherwise,
`that you are not able to fully answer questions
`truthfully today?
` A. No.
` Q. You understand you're testifying today in a
`proceeding that concerns U.S. Patent No. 7,151,027?
` A. Yes.
` Q. I'm going to show you what's previously
`been marked as Exhibit 1001 in this proceeding.
` Is that the patent I just referred to?
` A. Yes, sir.
` Q. And for ease of reference today, I may
`refer to Exhibit 1001 as the '027 patent.
` Do you understand?
` A. Yes.
` Q. Mr. Brahmbhatt, you've submitted a
`declaration in another IPR matter, IPR2014-00108,
`
`TSG Reporting - Worldwide
`(877) 702-9580
`
`2
`
`IPR2014-00108
`Exhibit MX027-1014
`(cid:51)(cid:68)(cid:74)(cid:72)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19)(cid:21)
`
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`

`

`Page 6
`that involved the same '027 patent; is that correct?
` A. Yes.
` Q. And you've been deposed before in that IPR
`matter about this same patent; right?
` A. Yes.
` Q. And you've also been deposed before that
`regarding the '027 patent; is that true?
` A. Yes.
` Q. And you've provided opinions and testimony,
`including a witness statement, in the ITC about the
`'027 patent under oath; right?
` A. Yes.
` MR. SOMMER: Object to form.
`BY MR. BAUGHMAN:
` Q. Well, did you provide opinions and
`testimony including a witness statement in the ITC
`about the '027 patent?
` A. Yes.
` Q. And was -- were those submissions made
`under oath?
` MR. SOMMER: Object to form.
` THE WITNESS: Yes.
`BY MR. BAUGHMAN:
` Q. And you submitted a declaration in this IPR
`proceeding as well; is that right?
`
`Page 8
`
`working with chips; is that correct?
` A. Yes, sir.
` Q. Have you had any personal experience
`designing the structures between a memory array and
`a periphery array in a chip?
` MR. SOMMER: Object to form.
` THE WITNESS: So I have designed a lot of
`memory chips, and that is how my career started.
`And specific to any structures, I cannot recall
`because they involved many structures.
`BY MR. BAUGHMAN:
` Q. So do you recall designing any structures
`at an interface between a memory array and a
`periphery array?
` MR. SOMMER: Object to form.
` THE WITNESS: Once again, I'll say what I
`said before, that I've designed many chips. Those
`chips involve many structures, and, specific to all
`those, I do not recall.
`BY MR. BAUGHMAN:
` Q. Do you understand the term "memory array"
`in terms of a chip?
` A. Yes, sir.
` Q. And do you understand the term "periphery
`area" in terms of a chip?
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`Page 7
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` A. Yes.
` Q. I'll put before you what's been marked as
`Exhibit 1002 in this IPR. If you can take a look
`and see if that's the declaration you provided here.
` A. Yes.
` Q. So Exhibit 1002 is your testimony in this
`IPR; correct?
` A. Yes.
` Q. Mr. Brahmbhatt, do you understand that
`while this cross-examination today is pending,
`you're not to consult with or confer with counsel
`about the substance of your testimony?
` A. Yes.
` Q. I'd like to ask you a few questions about
`your background and experience.
` Mr. Brahmbhatt, do you have any personal
`experience choosing the parameters for forming
`polysilicon structures between a memory array and a
`periphery array in a chip?
` MR. SOMMER: Object to form.
` THE WITNESS: Can you ask that question
`again, please?
`BY MR. BAUGHMAN:
` Q. Sure.
` Mr. Brahmbhatt, you've had experience
`
`Page 9
`
` A. Yes, sir.
` Q. And do you understand how those terms are
`used in the context of the '027 patent?
` A. Yes, sir.
` Q. So sitting here today, do you have a
`recollection of any personal experience in designing
`structures between a memory array and a periphery
`array in a chip?
` MR. SOMMER: Object to form.
` Steve, just a quick question. Are you
`saying "periphery array" or "area"?
` MR. BAUGHMAN: I think I said "periphery
`area."
` MR. SOMMER: Oh, okay. I'm hearing it as
`"array."
` MR. BAUGHMAN: I appreciate it. Let me --
`I haven't had enough coffee this morning. I'm
`seeing it as "array" as well, so let me just start
`that over again. And I appreciate the question.
`BY MR. BAUGHMAN:
` Q. All right. Mr. Brahmbhatt, I apologize if
`I was being unclear before. I meant to be saying
`"periphery area." Let me start that again.
` Do you have any personal experience in
`designing structures between a memory array and a
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`TSG Reporting - Worldwide
`(877) 702-9580
`
`3
`
`IPR2014-00108
`Exhibit MX027-1014
`(cid:51)(cid:68)(cid:74)(cid:72)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19)(cid:22)
`
`

`

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`periphery area in a chip?
` A. Sir, a person who designs a chip designs
`the whole chip; so there are memory arrays, there
`are periphery areas that are scribe lines, and there
`are structures in between. So a memory chip would
`necessarily include whatever there is on the memory
`chip.
` Q. And so is that an answer "yes" to my
`question?
` A. Well, it was included as part of memory
`design, all the structures that are included on a
`memory chip. That's all I can tell you.
` Q. So, Mr. Brahmbhatt, have you personally
`designed structures at the point of a chip between
`the memory array and the periphery area?
` A. I will go back to my response earlier,
`sir. I have designed quite a few memory chips. A
`memory chip would include memory arrays, would
`include periphery, would include bonding pads,
`scribe lines, and areas in between these sections.
` So, I mean, that's all I can tell you. I
`have designed memory chips, and memory chips include
`many structures.
` Q. Have you personally selected parameters for
`the portion of the chip between the memory array and
`
`Page 12
` A. Sir, I have worked as a design engineer in
`the industry. My background shows I have quite a
`few patents, and I have designed whole chips, not --
`well, I started doing small portions of the chip
`when I got out of the college, but quickly I was
`promoted and given responsibilities to do the whole
`chip design.
` So I have done complete chip designs.
` Q. Do you recall any instances in which your
`design of the whole chip involved applying your
`expertise or your decisions to the inclusion or
`selection of structures for the area between the
`memory array and the periphery area?
` A. I have provided a lot of inputs in the
`total composition of a product that is then being --
`that were later sold in the marketplace. I do not
`recall to every little contribution. All I can
`point you to is my patents that show some aspects of
`my contributions, but I do not specifically recall
`how to respond to you.
` Q. So, sitting here today, you don't have a
`specific example to provide; is that right?
` A. Well, sitting here today, all I can tell
`you is I have done full chip designs, and I have
`done -- I have made contributions to areas of
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`the periphery area?
` MR. SOMMER: Object to form.
` THE WITNESS: A design engineer designs
`chips based on parameters called design rules,
`called process files, called -- different aspects
`are involved in designing a chip. A design
`engineer, when he designs or she designs a chip,
`that whole design involves a collaborative effort.
`So a design engineer may be provided process
`parameters.
` Design engineers sometimes would take part
`in some of those parameter definitions. A design
`engineer would be focused on certain aspects that
`require his specific expertise, such as how the
`circuits are hooked up to each other and how --
`what -- at the same time, it's a team effort, so the
`whole team sits together and comes up with all these
`subcomponents that are involved.
` Now, you're asking me specifically as to
`what I have done ten, fifteen years ago. That's the
`best I could tell you.
`BY MR. BAUGHMAN:
` Q. So did you act as the design engineer for
`aspects of memory chips between the memory array and
`the periphery area?
`
`Page 13
`technologies that are well beyond a design engineer
`domain. So there are many contributions that I have
`made over my career.
` Q. Mr. Brahmbhatt, are you familiar with the
`expression "interface region"?
` A. Yes, sir.
` Q. Is that -- can you describe what that is?
` A. I would focus on the '027 patent, and I
`would use that definition. The '027 patent -- and
`I'll just go back to the definition of "interface
`region" per the patent itself.
` Okay. Right here.
` So the patent defines the interface area as
`is shown here on figure 2, pointed out as 230, as
`that located between the memory array 220 and the
`periphery components 210.
` Q. And using that definition, Mr. Brahmbhatt,
`have you, in your work experience, made any
`contributions to the design of an interface region
`or interface area, as you just testified?
` A. As I've said before, I've designed chips,
`whole chips, and chips include various areas, and I
`have made contributions to various areas over my
`career. I have designed several chips specific to
`this technology.
`
`TSG Reporting - Worldwide
`(877) 702-9580
`
`4
`
`IPR2014-00108
`Exhibit MX027-1014
`(cid:51)(cid:68)(cid:74)(cid:72)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19)(cid:23)
`
`

`

`Page 14
` Q. Well, sitting here today, can you identify
`any of the contributions you've made to the design
`of an interface region or area?
` A. Well, the patents that I have -- I have
`eleven patents to my name -- I do know that none of
`them specifically address the interface area. But
`they address the design and development of
`nonvolatile memory chips, and it is understood that
`the nonvolatile memory chip would have different
`areas on it. So ...
` Q. Is there any other experience -- you stated
`that the patents don't specifically address the
`interface area.
` Are there any other aspects of your work
`experience that did involve specifically the
`interface area?
` A. I'll go back to my previous response, sir.
` I have designed quite a few chips, and
`they're whole chips. Well, I started out doing
`portions of the chips as I graduated, and then I
`have done whole chips, and they involve so many
`different areas. So I do not recall all different
`areas that I may have contributed, but I have a
`career of 30 years, so I'm quite confident about my
`ability to handle this subject. That's all I can
`
`Page 16
`I've done quite a few nonvolatile memory chips.
`BY MR. BAUGHMAN:
` Q. Mr. Brahmbhatt, do you have personal
`experience in determining the process for particular
`etching steps in chip fabrication?
` A. I was a product line director in one of my
`career positions, and a product line director would
`be involved as a member of the team when such
`decisions are made. And it was very routine for me
`to participate in meetings where many, not just
`this, process issues were brought out, discussed.
`People contributed, including myself, and decisions
`were made.
` A product line director has an umbrella
`responsibility. So that involved this and other
`responsibilities.
` Q. Well, so as a product line director, did
`you have a supervisory role over all the decisions
`going into the chip that you were supervising?
` A. Well, a product line director meant that
`the responsibility of the product line was under
`that one individual, but that doesn't mean that, you
`know, it is a CEO position. What it really meant
`was in many of these -- it was a team effort, and
`many of these issues would come out and would be
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`tell you.
` Q. But you don't have a specific example of a
`contribution to an interface area; correct?
` A. I just gave my response, sir, to the best
`of my ability.
` Q. And that's true as of June 2004?
` MR. SOMMER: Object to form.
` THE WITNESS: That's going back quite a few
`years. Can you ask that question again? I'm sorry.
`BY MR. BAUGHMAN:
` Q. Your testimony in Exhibit 1002 regards your
`understanding of the level of skill of a person in
`the art as of June 2004; is that correct?
` A. That is correct.
` Q. You testified that you don't, sitting here
`today, have a specific example where you had work
`experience involving the design of an interface
`area; correct?
` A. Yes, sir.
` Q. And that's true as of June 2004 as well as
`of today; is that right?
` A. Yes.
` MR. SOMMER: Object to form.
` THE WITNESS: Yes, sir, but I also
`testified that I have a long career of 30 years, and
`
`Page 17
`discussed. And the product line director would be
`necessarily present because it's his job to make
`sure things are going right for his product line.
` In addition to that, I went to a graduate
`school that was heavy, heavy process focused. So I
`have done -- with my own hands carried wafers and
`done processing of wafers. So I was probably quite
`fortunate to be part of that graduate program.
` Q. And you were part of that graduate program
`as a student; is that correct?
` A. As a graduate student.
` Q. Mr. Brahmbhatt, have you ever personally
`selected an etchant for an etching process of a
`chip?
` A. Like I said, these decisions very often
`would be discussed in a team environment, and a lot
`of these decisions would be discussed, but then a
`process engineer would ultimately carry the
`responsibility. So these would be discussed, but
`ultimately somebody has to take the responsibility.
` Q. And you're not a process engineer; is that
`correct?
` A. My background is more design and product
`development and device physics.
` Q. So you're not a process engineer as you
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`TSG Reporting - Worldwide
`(877) 702-9580
`
`5
`
`IPR2014-00108
`Exhibit MX027-1014
`(cid:51)(cid:68)(cid:74)(cid:72)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19)(cid:24)
`
`

`

`Page 18
`
`would use the term?
` A. I have done a lot of processing of wafers
`in graduate school, as I told you, so I have that
`background.
` Q. But you didn't have industry experience --
` A. My responsibilities in the industry were
`more focused in design, product development.
` Q. Mr. Brahmbhatt, do you have any personal
`experience measuring the heights of structures found
`within layers of a chip?
` A. Yes, I do.
` Q. Can you describe what that is?
` MR. SOMMER: Object to form.
`BY MR. BAUGHMAN:
` Q. Can you describe that experience?
` A. Can you ask the question again?
` Q. Please describe your experience, your
`personal experience measuring the heights of
`structures found within the layers of a chip.
` A. Well, it was very -- I guess it was part of
`the job, oftentimes, to look at structures under
`microscopes, sometimes take cross-sections or get
`somebody else to take cross-sections, of course.
`And they come back with results and -- so there are
`different ways -- I mean, I have spent hours if not
`
`Page 20
`which is the '027 patent, what is the purpose or the
`problem stated in that patent?
` A. Well --
` MR. SOMMER: Object to form.
` THE WITNESS: It's in the title. I would
`just read the first two lines in column 1. "Method
`and device for reducing interface area of a memory
`device."
`BY MR. BAUGHMAN:
` Q. So it's your opinion that the problem that
`was being addressed or attempting to be addressed by
`the '027 patent was reducing the interface area of a
`memory device?
` MR. SOMMER: Object to form.
` THE WITNESS: That's one of the aspects,
`yes.
`BY MR. BAUGHMAN:
` Q. And that's discussed in your report, isn't
`it, that aspect? Exhibit 1002, if you take a look
`at paragraph 13 of your report -- are you at page 5?
`I think that's where it is. You see that?
` MR. SOMMER: Are at got paragraph 13?
`BY MR. BAUGHMAN:
` Q. I'm going to read the sentence, and please
`let me know if I have correctly stated your
`
`Page 19
`days looking under the microscope at structures,
`trying to understand different structures. And we
`have routinely sent stuff out to get cross-sectioned
`and measure different heights and distances and
`spacings. I mean, that's part of the job.
` Q. In measuring -- excuse me.
` In measuring different heights, did you
`have experience looking at the thickness of
`individual components or layers?
` A. Yes, sir.
` Q. And so the individual components that make
`up the structure, you would consider their
`individual heights in determining the overall height
`of a structure?
` A. Well, but -- part of the answer is "yes,"
`but in order to do all these measurements, sometimes
`you have to take cross-sections, and we would
`normally send stuff out. And once it comes back,
`then you're able to see different components that
`formed the total structure. And that's how you
`would know, you know, different components that made
`up the total height of the structure. So you would
`have total height and then you would have
`subcomponents that made that height.
` Q. Mr. Brahmbhatt, looking at Exhibit 1001,
`
`Page 21
`
`testimony.
` "More particularly, the '027 patent is
`intended to reduce the interface area of a memory
`device by forming an interface structure in the area
`between the memory core and the periphery."
` Is that correct?
` A. Yes, sir.
` Q. And that's a problem being addressed by the
`'027 patent?
` A. That's a problem, one of them.
` Q. Now, in paragraph 29 of your report, you
`state at the bottom of page 12 that the purported
`problem of the '027 patent is, quote, "improving the
`fabrication of memory devices at the interface
`between memory array and periphery."
` A. Yes, sir.
` Q. Did you mean by that to be referring to
`reducing the area of the interface?
` MR. SOMMER: Object to form.
` THE WITNESS: That would be a part of it.
`BY MR. BAUGHMAN:
` Q. Your next sentence in paragraph 29 says,
`"Identification of this problem, along with various
`solutions, can be found in numerous references
`including Yuzuriha."
`
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`
`TSG Reporting - Worldwide
`(877) 702-9580
`
`6
`
`IPR2014-00108
`Exhibit MX027-1014
`(cid:51)(cid:68)(cid:74)(cid:72)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19)(cid:25)
`
`

`

`Page 22
`
` Is that right?
` A. Yes.
` Q. Is it your testimony that Yuzuriha
`identifies the problem of reducing the interface
`area between the memory array and the periphery
`area?
` A. Can you please ask the question again?
` Q. Is it your testimony that Yuzuriha
`identifies the problem of reducing the interface
`area between the memory array and the periphery
`area?
` A. Could I look at the reference?
` Q. Yes.
` While I get that out, before looking at it,
`do you recall whether Yuzuriha discusses that
`problem?
` A. I would have to look at the reference. I'm
`sorry.
` Q. So before looking at it, you don't have an
`answer to that question?
` A. No, I'd just like to look at the reference.
` Q. I'd like to ask you, before you look at it,
`do you recall whether Yuzuriha --
` A. Well, we know that it's a reference that
`has been identified and quite well discussed. The
`
`Page 24
`
` A. Right.
` Q. And in the ITC?
` A. Yes, sir.
` Q. So I will provide you a copy and allow you
`to look through it, but I'd like to ask from your
`memory --
` A. Right.
` Q. -- of having studied Yuzuriha, do you
`recall whether it provides the benefit of reducing
`the area of the interface between the memory array
`and the periphery?
` A. Because this question was never asked,
`therefore I need to look at the reference.
` Q. Well, do you agree that your testimony in
`paragraph 29 says that the problem of the '027
`patent was improving the fabrication of memory
`devices at the interface between memory array and
`periphery?
` A. Yes, sir.
` Q. And you've testified a moment ago that that
`included the problem of reducing the interface area;
`correct?
` MR. SOMMER: Objection to form.
`Mischaracterizes testimony.
` MR. BAUGHMAN: Counsel, I'd like to ask you
`
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`Page 23
`Yuzuriha reference shows a structure that I believe
`looks quite similar to the structure of '027, and it
`does provide many of the same benefits that are
`mentioned by the '027 patent. As to the specific
`question you just asked me, I would like to look at
`the reference.
` Q. I will hand it to you in a moment.
` You just said that Yuzuriha provides many
`of the same benefits that are mentioned in the '027
`patent.
` Does Yuzuriha provide the benefit of
`reducing the size of the interface between the
`memory array and the periphery?
` MR. SOMMER: Objection to form. Asked and
`answered.
` THE WITNESS: If you will provide me the
`reference, I'll be happy to provide the answer.
`BY MR. BAUGHMAN:
` Q. Mr. Brahmbhatt, you've spent some time
`studying Yuzuriha; is that correct?
` A. Yes.
` Q. You've testified about it in this
`proceeding in your declaration?
` A. Yes, sir.
` Q. And in a previous IPR proceeding; correct?
`
`Page 25
`to just state your objection in compliance with the
`Board's guidance on speaking objections.
` I'm going to repeat that question.
`BY MR. BAUGHMAN:
` Q. Mr. Brahmbhatt, you testified a moment ago
`that the problem you referred to in paragraph 29
`included the problem of reducing the interface area;
`correct?
` MR. SOMMER: Same objection.
` THE WITNESS: Well, let me read paragraph
`29, what I'm saying.
` "A person of ordinary skill in the art of
`semiconductor memory design and fabrication would
`have looked to various sources of information --
`available information in order to address the
`purported problem of the '027 patent, hyphen,
`improving the fabrication of memory devices."
` So let us understand what is "improving
`fabrication of memory devices."
` Essentially, and I've said that in my
`report elsewhere, that the idea in a semiconductor
`company is to sell these products to make money.
`And you want to do that, make a profitable product,
`by improving the fabrication. And the whole idea
`is, in a given wafer, how many good chips we got.
`
`TSG Reporting - Worldwide
`(877) 702-9580
`
`7
`
`IPR2014-00108
`Exhibit MX027-1014
`(cid:51)(cid:68)(cid:74)(cid:72)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19)(cid:26)
`
`

`

`Page 26
`That is always the prime consideration. That may
`involve getting a smaller chip, but that we're also
`involved getting each chip to come out of the good
`device when it is tested.
` So when you talk about fabrication, the
`word as it is used in paragraph 29, it is really
`more focused on processing of -- fabrication that's
`processing of a wafer. And when I answered that in
`a general context just a few minutes ago, I was
`putting it in a general industry hat, that, okay, so
`you want to get more good devices. You would like
`to get a smaller die to get more candidates on a
`wafer.
` But when you focus on 29, the reference
`docs -- and we should always look at reference, and
`I still don't have the benefit of reference in my
`hand -- we have mentioned the word "fabrication" of
`a memory device, and the fabrication of the memory
`device in this context -- and we have to put things
`in context -- would be making of it, manufacturing
`of it, fabbing of it, and so I'm just trying to put
`my response in context.
`BY MR. BAUGHMAN:
` Q. So, Mr. Brahmbhatt, in paragraph 29 you
`state that the purported problem of the '027 patent
`
`Page 28
`read what I had just said? I thought we were
`discussing Yuzuriha.
` Q. Well, let me ask you a question. The
`record says what it says, Mr. Brahmbhatt.
` A. Okay.
` Q. In paragraph 29 --
` A. Yeah.
` Q. -- you have a statement that the purported
`problem of the '027 patent is improving the
`fabrication of memory devices at the interface
`between memory array and periphery; is that correct?
` A. It says that.
` Q. Is that your testimony?
` A. Yeah, it says that.
` Q. Is it your testimony that the fabrication
`of memory devices at the interface between memory
`array and periphery, the problem of the '027 patent
`includes reducing the interface area of a memory
`device?
` A. That is the statement I just read from '027
`patent. Column 1, first two lines, it says, "Method
`and device for reducing interface area of a memory
`device."
` Q. So the problem you're talking about in
`paragraph 29, what you call the purported problem of
`
`Page 27
`is improving the fabrication of memory devices at
`the interface between memory array and periphery;
`correct?
` A. That's what I'm saying, sir.
` Q. Are you saying now that that does not
`include reducing the interface area of a memory
`device?
` MR. SOMMER: Object to form.
` THE WITNESS: I would really like to take a
`look at the reference.
`BY MR. BAUGHMAN:
` Q. I'm asking now about the '027 patent and
`what you've said about it.
` A. Oh, going back -- it's not about the
`reference anymore?
` Q. I'm asking in paragraph 29 about your
`statement about the purported problem of the '027
`patent.
` A. Okay.
` Q. Which I believe is what you were just
`testifying about.
` A. No, I was actually -- going to the previous
`question -- and maybe we can have the question read.
`Can we read my response? I thought it was more in
`context with Yuzuriha, if I remember right. Can we
`
`Page 29
`the '027 patent, does include reducing the interface
`area of a memory device.
` You agree to that?
` A. As part of it. Because it says
`"fabrication," my statement over here. And that is
`why I was going through a discussion of how -- on a
`wafer, how many good dies or good devices you get is
`a primary consideration. Not the size of each, but
`on a given wafer how many good you got.
` So that may include reducing the size of
`each one, but, more importantly, improving the use
`of the total wafer. That is the paramount
`consideration, and therefore the word "fabrication"
`of memory devices.
` Q. Focusing on the problem presented in the
`'027 patent, you agree that that includes reducing
`the interface area of the memory array? Excuse me.
`Reducing the interface area between the memory array
`and the periphery area?
` A. That's what the patent says.
` Q. Is that problem identified in Yuzuriha, as
`you recall?
` MR. SOMMER: Objection to form.
` THE WITNESS: So I'll go back to my
`response. What is important in the semiconductor
`
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`
`TSG Reporting - Worldwide
`(877) 702-9580
`
`8
`
`IPR2014-00108
`Exhibit MX027-1014
`(cid:51)(cid:68)(cid:74)(cid:72)(cid:3)(cid:19)(cid:19)(cid:19)(cid:19)(cid:27)
`
`

`

`Page 30
`business is how many good units you got on a given
`wafer, whether it's six-inch, eight-inch, doesn't
`matter. And if that means you can accomplish that
`by improving the fabrication process, then that's
`what you do.
`BY MR. BAUGHMAN:
` Q. Mr. Brahmbhatt, so the record is clear, I'm
`asking you not about the semiconductor business
`generally but about the '027 patent. Your testimony
`in paragraph 29 states that the purported problem of
`the '027 patent includes the fabrication issue
`you're discussing, and you've said a moment ago that
`that fabrication issue includes reducing the
`interface area of a memory device because that's
`part of the problem of the '027 patent; correct?
` A. Well, when we look at '027 patent, the
`title says "Method and Device For Reducing the
`Interface Area of a Memory Device." That's what you
`were asking, and that's what I was responding to.
` So there are -- when you look at a
`semiconductor chip -- and I explain that already,
`and I'll do that again, and I've said that in my
`prior testimony as well -- you try to make
`geometries as small as you can, and that's why
`industry goes from process mode to process mode.
`
`Page 32
` THE WITNESS: I will read the title again.
`"Method and Device For Reducing Interface Area of a
`Memory Device."
`BY MR. BAUGHMAN:
` Q. So is that a yes?
` A. That's what the patent says.
` Q. So that patent states that's a problem it
`is addressing;