Souri, Ph.D., Shukri J.
`
`IPR2014-00108
`
`September 15, 2014
`
`1
`
` UNITED STATES PATENT AND TRADEMARK OFFICE
`
` BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
` MACRONIX INTERNATIONAL CO., LTD, MACRONIX ASIA
` LIMITED, MACRONIX (HONG KONG) CO., LTD. and MACRONIX
` AMERICA, INC.,
`
` Petitioners
` v.
` SPANSION LLC,
` Patent Owner
` ________________________________
` Case IPR2014-00108
` U.S. PATENT NO. 7,151,027
`
` Before the Honorable DEBRA K. STEPHENS, JUSTIN T.
` ARBES, and RICHARD E. RICE,
` Administrative Patent Judges
` Washington, D.C.
` Monday, September 15, 2014
` Videotaped Deposition of SHUKRI J. SOURI, PH.D.
`
`202-220-4158
`
`Henderson Legal Services, Inc.
`www.hendersonlegalservices.com
`
`IPR2014-00108
`Exhibit MX027-1011, p. 1
`
`

`

`Souri, Ph.D., Shukri J.
`
`IPR2014-00108
`
`September 15, 2014
`2 (Pages 2 to 5)
`4
`
`2
`1 Videotaped Deposition of SHUKRI J. SOURI,
`2 PH.D., a witness herein, called for examination by
`3 counsel for the Petitioners in the above-entitled
`4 matter, pursuant to notice, the witness being duly
`5 sworn by KAREN YOUNG, a Notary Public in and for the
`6 District of Columbia, taken at the offices of Ropes &
`7 Gray, 700 Twelfth Street, Northwest, Washington, D.C.,
`8 at 9:05 a.m. on Monday, September 15, 2014, and the
`9 proceedings being taken down by stenotype by KAREN
`10 YOUNG, and transcribed under her direction.
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`
`3
`
`APPEARANCES:
` On Behalf of the Petitioners:
` ANDREW R. SOMMER, ESQ.
` Winston & Strawn LLP
` 1700 K Street, Northwest
` Washington, D.C. 20006
` asommer@winston.com
` (202) 282-5896
`
` On Behalf of Spansion LLC:
` JAMES L. DAVIS, ESQ.
` Ropes & Gray LLP
` 1900 University Avenue, 6th Floor
` East Palo Alto, California 94303-2284
` james.l.davis@ropesgray.com
` (650) 617-4794
`
` JANICE V. JABIDO, ESQ.
` Ropes & Gray LLP
` 191 North Wacker Drive
` 32nd Floor
` Chicago, Illinois 60606-4302
` janice.jabido@ropesgray.com
` (312) 845-1259
`
` ALSO PRESENT:
` Rick Sanborn, Videographer
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`
`1
`2 C O N T E N T S
`3 THE WITNESS:
`4 SHUKRI J. SOURI, PH.D.
`5 By Mr. Sommer............................... 6
`6 By Mr. Davis................................ 98
`7 By Mr. Sommer............................... 104
`
`89
`
` E X H I B I T S
`
`10
`11 SOURI EXHIBIT NO. PAGE NO.
`12
`13 Exhibit 1 Figure 1 with color.................... 18
`14 Exhibit 2 Figure 3D with color................... 56
`15 Exhibit 3 Joint Submission Regarding Proposed
`16 Construction of Disputed Claim Terms.64
`17 Exhibit 4 Claim 1 with highlighting.............. 109
`18 Exhibit 5 Claim 1 with highlighting and
`19 added language ........................ 113
`20
`21 - - -
`22
`
`5
`1 THE VIDEOGRAPHER: Here begins Tape 1 in the
`2 videotaped deposition of Shukri Souri in the matter of
`3 Macronix International Company, Limited et al. versus
`4 Spansion LLC, in the U.S. Patent and Trademark Office
`5 before the Patent Trial and Appeal Board, Case Number
`6 IPR2014-00108. Today's date is September 15th, 2014.
`7 The time on the video monitor is 9:05 a.m. This
`8 deposition is being held at Ropes & Gray, 700 12th
`9 Street, Northwest, Washington, D.C. The court
`10 reporter is Karen Young. The videocamera operator is
`11 Rick Sanborn. Both are on behalf of Henderson Legal
`12 Services. Will counsel please introduce themselves
`13 and state whom they represent.
`14 MR. SOMMER: Andrew Sommer of Winston &
`15 Strawn LLP on behalf of the Macronix entities.
`16 MR. DAVIS: Jim Davis and Janice Jabido of
`17 Ropes & Gray for the patent owner.
`18 THE VIDEOGRAPHER: Thank you. Will the
`19 court reporter please swear in the witness.
`20 Whereupon,
`21 SHUKRI J. SOURI, PH.D.,
`22 called for examination by counsel for
`
`202-220-4158
`
`Henderson Legal Services, Inc.
`www.hendersonlegalservices.com
`
`IPR2014-00108
`Exhibit MX027-1011, p. 2
`
`

`

`Souri, Ph.D., Shukri J.
`
`IPR2014-00108
`
`6
`
`September 15, 2014
`3 (Pages 6 to 9)
`8
`
`1 the Petitioners and having been duly
`2 sworn by the Notary Public, was examined and
`3 testified as follows:
`4 - - -
`5 EXAMINATION BY COUNSEL FOR THE PETITIONERS
`6 BY MR. SOMMER:
`7 Q. Good morning, sir.
`8 A. Good morning.
`9 Q. I'm Andrew Sommer, as you just heard, and I
`10 think you know from before, I represent Macronix in
`11 connection with this proceeding. You -- I know you're
`12 a seasoned witness. I know you've testified a number
`13 of times according to your C.V., so unless you have
`14 procedural questions about how we're going to go about
`15 questions and answers today, I'm just going to get
`16 right to it. Do you have any procedural questions?
`17 A. No, thank you.
`18 Q. Okay. You understand that you must testify
`19 truthfully in this proceeding; is that right?
`20 A. Yes.
`21 Q. Is there any reason why you don't believe
`22 that you can testify truthfully today?
`
`1 exhibit. This is Spansion Exhibit 2002. Sir, is that
`2 a copy of your declaration as submitted in connection
`3 with this proceeding?
`4 MR. DAVIS: Drew, do you have an extra copy
`5 of this?
`6 MR. SOMMER: Oh, yeah, I'm sorry.
`7 MR. DAVIS: Thank you.
`8 THE WITNESS: Yes, it is.
`9 BY MR. SOMMER:
`10 Q. And the statements in this declaration are
`11 truthful and correct; is that -- is that right?
`12 A. Yes.
`13 Q. And you declared that the statements in this
`14 declaration are true under the penalty of perjury; is
`15 that right?
`16 A. Correct.
`17 Q. So you take your obligations to be truthful
`18 in the declaration and during this deposition
`19 seriously; is that right?
`20 A. Absolutely.
`21 Q. Now, you've testified before on behalf of
`22 Spansion; is that correct?
`
`7
`
`9
`
`1 A. No.
`2 Q. And you understand that you're here to
`3 testify regarding U.S. patent number 7,151,027; is
`4 that right?
`5 A. That's correct.
`6 MR. SOMMER: Jim, just to ask you a
`7 question, in the depositions of our witnesses, we had
`8 stipulated that we could do background once so that we
`9 can save some time, and that we could use the
`10 background testimony from the first day of deposition
`11 in connection with any of the IPRs. Is that
`12 acceptable?
`13 MR. DAVIS: We don't have a problem. That's
`14 fine.
`15 BY MR. SOMMER:
`16 Q. Okay. Now, you submitted a declaration
`17 recently in this proceeding; is that correct?
`18 A. Yes, I have.
`19 Q. And then you submitted a corrected
`20 declaration; is that right?
`21 A. That is correct.
`22 Q. I'm going to hand you a previously marked
`
`1 A. I have.
`2 Q. You were retained by Spansion for the
`3 purposes of submitting that declaration that I've
`4 marked -- or that was previously marked as Exhibit
`5 2002; is that right?
`6 A. Yes.
`7 MR. DAVIS: And Drew, I don't mean to
`8 interrupt, just whenever -- can you clarify what you
`9 mean by background or at least do you want to
`10 demarcate it on the record when you -- when we've
`11 gotten to that point where you're done with the
`12 background and now when we're moving into the '027?
`13 MR. SOMMER: Yeah, I think -- I think it
`14 will be clear because we'll start talking about the
`15 '027 specifically, but yes, sure.
`16 MR. DAVIS: Thank you.
`17 BY MR. SOMMER:
`18 Q. How many depositions have you given before
`19 on behalf of Spansion?
`20 A. I have offered the deposition at an ITC
`21 case.
`22 Q. How many ITC cases have you testified on
`
`202-220-4158
`
`Henderson Legal Services, Inc.
`www.hendersonlegalservices.com
`
`IPR2014-00108
`Exhibit MX027-1011, p. 3
`
`

`

`Souri, Ph.D., Shukri J.
`
`IPR2014-00108
`
`10
`
`September 15, 2014
`4 (Pages 10 to 13)
`12
`
`1
`behalf of Spansion in connection with?
`2
` A. I believe -- related to Macronix and
`3
`Spansion, I believe it's -- I believe it's one
`4
`deposition, spent two days covering three patents.
`5
` Q. Have you testified on behalf of Spansion in
`6
`any other proceedings?
`7
` A. There have been other proceedings prior
`8
`involving different parties that I have testified at,
`9
`yes.
`10
` Q. How many other proceedings have you
`11
`testified on behalf of Spansion in connection with?
`12
` A. The one that I recall perhaps is the
`13
`Spansion versus Samsung matter.
`14
` Q. How many times did you testify on behalf of
`15
`Spansion in the Spansion versus Samsung matter?
`16
` A. At least once I believe. I don't recall if
`17
`there have been others.
`18
` Q. Did you testify in connection with an ITC
`19
`proceeding on behalf of Spansion against Samsung?
`20
` A. That's correct, yes, yes, so yes, you're
`21
`right, you're reminding me that actually that there
`22 was an Eastern District of Virginia matter and there
`11
`
`1 was an ITC matter, correct.
`2 Q. How many ITC matters were you involved with
`3 on behalf of Spansion as it pertained to Samsung?
`4 A. That I don't recall. I'd have to look at my
`5 list of testimony.
`6 Q. Okay. I'm going to hand you what's been
`7 previously marked as Spansion Exhibit 2003. This is a
`8 copy of your C.V.; is that correct?
`9 A. Yes, correct.
`10
` Q. Is this an up-to-date copy of your C.V.?
`11
` A. I believe it is, to the best of my
`12
`recollection sitting here, yes.
`13
` Q. This doesn't mention the ITC case between
`14
`Spansion and Macronix, does it?
`15
` A. That is correct, yes, that -- on the list of
`16
`testimony within the past decade, correct, that has
`17
`not yet been updated.
`18
` Q. Are there any other things that have not
`19
`been updated on this list beyond the Macronix versus
`20
`Spansion testimony that you provided back in the
`21
`spring?
`22
` A. Not to the best of my recollection sitting
`
`1
`2
`3
`4
`5
`6
`7
`8
`9
`10
`11
`12
`13
`14
`15
`16
`17
`18
`19
`20
`21
`22
`
`here right now. There may have been an additional
`TFTLC related deposition, but I don't recall exactly.
` Q. Now, you've testified in two other
`proceedings regarding the '027 patent, is that
`correct, on behalf of Spansion?
` A. Yes, the previous one was the ITC, the
`latest ITC case that we discussed, and the one before
`that I believe was the Eastern District of Virginia.
` Q. Now, how many times have you appeared in
`court on behalf of Spansion?
` A. I recall testifying at an ITC trial on the
`Spansion versus Samsung matter.
` Q. Now, do you recall if that was the --
`actually, is that the 664 investigation four rows from
`the bottom on page 5 of Exhibit 2003?
` A. Sounds correct. I don't recall exactly, but
`yes, that sounds correct.
` Q. Beyond the trial testimony you provided in
`the 664 investigation, have you ever testified in
`court on behalf of Spansion?
` A. I don't believe so.
` Q. Are you -- do you hold yourself out as an
`
`13
`
`1 expert in semiconductor processing?
`2 A. Yes.
`3 Q. Have you previously built or designed
`4 semiconductors from a process perspective?
`5 A. Yes.
`6 Q. Have you designed or built flash memory?
`7 A. I have built double EPROM devices, yes.
`8 Q. And in what time period did you design and
`9 build double EPROM devices?
`10
` A. That was during my research at Stanford from
`11
`the time frames of '97 through to 2002, 2003,
`12
`thereabouts. 2002.
`13
` Q. And did Stanford have a semiconductor lab
`14
`that you used to build those devices?
`15
` A. That's correct, Stanford has a fabrication
`16
`facility for semiconductor fabrication.
`17
` Q. And you designed the process on which you
`18
`built those EPROM -- double EPROM devices; is that
`19
`right?
`20
` A. That's correct, yes.
`21
` Q. Were they floating gate devices?
`22
` A. Those particular ones, yes.
`
`202-220-4158
`
`Henderson Legal Services, Inc.
`www.hendersonlegalservices.com
`
`IPR2014-00108
`Exhibit MX027-1011, p. 4
`
`

`

`Souri, Ph.D., Shukri J.
`
`IPR2014-00108
`
`14
`
`September 15, 2014
`5 (Pages 14 to 17)
`16
`
`1 Q. Did they include any form of spacers?
`2 A. I had not designed them with spacers back
`3 then. That was for research purposes.
`4 Q. Did you make a decision not to include
`5 spacers?
`6 A. No, my goal was to study -- not exactly. My
`7 goal was to study quality of films that are deposited.
`8 Q. Now, on a floating gate device, those
`9 devices have two gates; is that right?
`10
` MR. DAVIS: I'm just going to object to the
`11
`scope here to the extent it's beyond the scope, and
`12
`are we done with the background section?
`13
` BY MR. SOMMER:
`14
` Q. No, we're not. This is background. I'm
`15
`talking about the devices he built at Stanford. I'll
`16
`rephrase the question. The devices that you built at
`17
`Stanford, the double EPROM devices --
`18
` A. Yes.
`19
` Q. Did those have two gates for the memory
`20
`cells?
`21
` A. They did, yes.
`22
` Q. And was one of those referred to as a
`
`1
` Q. These layers that you applied on these
`2
`double EPROMs -- actually, let me -- let me back up.
`3 Did these double EPROM devices, were they functional
`4 memory units?
`5
` A. I had not tested them to -- well, they're
`6
`functional to the extent that the operation of the
`7
`layers, yes, I was able to apply voltages and test
`8
`them, and also test for the capacitance of the devices
`9
`as well, yes.
`10
` Q. So would these devices have included
`11
`peripheral circuits?
`12
` A. No, I did not -- I did not design them with
`13
`peripheral circuits.
`14
` Q. I'd like to move on to the '027 patent.
`15
`This is --
`16
` MR. DAVIS: I'm sorry, just as you're moving
`17
`on, I was noting in Exhibit 2002, at least the version
`18
`you handed me doesn't have color. I think there might
`19
`have been color in the declaration.
`20
` BY MR. SOMMER:
`21
` Q. That's fine. If it becomes relevant, just
`22
`let me know.
`
`15
`
`17
`
`1
`floating gate?
`2
` A. Correct.
`3
` Q. And the other one was a control gate?
`4
` A. Correct.
`5
` Q. Were they made of polysilicon?
`6
` A. Yes.
`7
` Q. And how was the floating gate, if at all,
`8
`isolated from the control gate?
`9
` A. At the time, I had used a insulation layer
`10
`that I deposited using an oxide deposition technique.
`11
` Q. And do you recall what that insulation layer
`12
`in 2002 or before even, I think you said '97 --
`13
` A. From '97 to 2002, correct.
`14
` Q. Okay. In this time period, do you recall
`15 what materials you were using in that isolation?
`16
` A. I had used a variety of films to understand
`17
`the quality of the deposition, and that included LTO,
`18 which is a low-temperature oxide deposition, and in
`19
`some cases I also followed up the LTO with a
`20
`hydrogenation process to basically expose the films to
`21
`a hydrogen gas to study the effect of passivating
`22
`broken bonds and other defects.
`
`1
` A. I do -- I did bring with me a colored copy
`2
`if you --
`3
` Q. Yeah, if you need to refer to that, please
`4
`feel free to do so. I'm going to hand to you what's
`5
`been previously marked as Macronix MX027 dash 1001.
`6
`It's a copy of the '027 patent that we've been
`7
`discussing briefly this morning. Are you familiar
`8 with figure 1 of this patent, sir?
`9
` A. Yes, I am.
`10
` Q. And what is figure 1 showing us?
`11
` A. If I may refer to the specification here in
`12
`column 1, it says a -- around lines 32 a step exists
`13 where two adjacent structures have a different height
`14
`as shown in figure 1. Then it goes on to say figure 1
`15
`is a diagram of the side view of a portion of an
`16
`interface area of an exemplary memory device 100 in
`17
`accordance with the prior art.
`18
` Q. So 110 in figure 1 -- that's substrate; is
`19
`that right?
`20
` A. It does refer to it in column 1 as substrate
`21
`110.
`22
` Q. And so is this figure showing that the
`
`202-220-4158
`
`Henderson Legal Services, Inc.
`www.hendersonlegalservices.com
`
`IPR2014-00108
`Exhibit MX027-1011, p. 5
`
`

`

`Souri, Ph.D., Shukri J.
`
`IPR2014-00108
`
`September 15, 2014
`6 (Pages 18 to 21)
`20
`
`18
`1 substrate may be etched so that structures in the
`2 substrate can have different heights?
`3 A. It says that substrate 110 has been etched
`4 wherein two structures 115 and 120 remain.
`5 Q. And those structures 115 and 120 -- those
`6 are made of substrate; is that right?
`7 A. Correct.
`8 Q. And there's no interface structure or
`9 anything in this figure 1; is that right?
`10 A. This figure 1 is a description of the prior
`11 art, and it does not have an interface structure as
`12 taught by the '027.
`13 MR. SOMMER: I'm going to mark as Exhibit 1
`14 to this deposition -- actually, maybe I'm not. Yes, I
`15 am. It's a color copy of figure 1 with some -- some
`16 annotations on it.
`17 (Souri Exhibit 1
`18 was marked for
`19 identification.)
`20 BY MR. SOMMER:
`21 Q. Now, I've handed you Exhibit 1 to this
`22 declaration, and I've colored what I believe to be
`
`1 what are those?
`2
` A. The specification refers to items 130 as
`3
`stringer spacers.
`4
` Q. Now, what is a stringer spacer?
`5
` A. A stringer spacer -- stringer spacers in
`6
`general are formed as a result of the differences in
`7
`the step heights in interface area, and as an etching
`8
`process is performed, side wall spacers can be etched,
`9
`and because of the uncontrollable height on either
`10
`side of the interface area due to differences of
`11
`processing, for example, of periphery components and
`12
`operational components or memory area, you end up due
`13
`to the uncontrollable height potentially with such
`14
`stringer spacers.
`15
` Q. Now, what are stringer spacers made of?
`16
` A. They would be, for example, made of the same
`17 material that the side wall spacers that they were
`18
`intended to be would have been made of, so it could be
`19
`a dielectric, it could be anything that the
`20
`semiconductor engineer decides what they would use for
`21
`such side wall spacers.
`22
` Q. So would those be formed -- stringer spacers
`
`19
`
`21
`
`1 110, which is substrate, in blue. Am I correct that
`2 the blue area is substrate in figure 1?
`3 A. In figure 1 it is referred to as a
`4 substrate, but I just want to also add -- so that's an
`5 answer to your question. I also want to add that in
`6 the specification of the '027, it does refer to the
`7 figures as being illustrative and simplified
`8 descriptions to focus in on the issues and the
`9 challenges that are raised by the prior art and how
`10
`the '027 is directed to address any of those
`11
`challenges.
`12
` MR. SOMMER: Okay, I'm going to move to
`13
`strike the remainder of that answer as being not
`14
`responsive to my question.
`15
` MR. DAVIS: And we will oppose the motion.
`16
` THE WITNESS: Just -- well, suppose there's
`17
`no need, but it does say, for example, in column 3 --
`18
` BY MR. SOMMER:
`19
` Q. There's no question pending, sir.
`20
` A. I understand.
`21
` Q. We can get to column 3 here in a few minutes
`22
`if you'd like, but now, items 130 in figure number 1,
`
`1 would be formed at the same time that the other side
`2 wall spacers on the active devices might be formed; is
`3
`that right?
`4
` A. That may be the case but not necessarily.
`5
`There are a number of, for example, dielectric layers
`6
`that are deposited and subsequently etched for various
`7
`reasons, such as forming contact holes, for example,
`8
`and other purposes that may result in the formation of
`9
`stringer spacers. It's not for a -- one particular
`10
`reason definitely.
`11
` Q. But one example of a reason why stringer
`12
`spacers might be formed in this interface area of
`13
`figure 1 would be that spacers were being formed
`14
`elsewhere on the chip and these were also formed
`15
`during that process; is that right?
`16
` A. For example -- well, let me -- let me -- I
`17
`looked at the specification for guidance to answer
`18
`your question accurately. In column 1, it says around
`19
`line 43 side wall spacers are commonly formed after
`20
`the individual transistors of the memory array have
`21
`been formed. When side wall spacers are formed,
`22
`stringer spacers, for example, stringer spacers 130
`
`202-220-4158
`
`Henderson Legal Services, Inc.
`www.hendersonlegalservices.com
`
`IPR2014-00108
`Exhibit MX027-1011, p. 6
`
`

`

`Souri, Ph.D., Shukri J.
`
`IPR2014-00108
`
`22
`
`September 15, 2014
`7 (Pages 22 to 25)
`24
`
`1
`and 31, are formed in the interface area at the steps.
`2
` Q. So where the patent says when side wall
`3
`spacers are formed, what do you understand that to
`4 mean?
`5
` A. I'm sorry, can you point me to where it says
`6 when side wall spacers are formed?
`7
` Q. Yeah, it's in the passage that you just
`8
`read, column 1, line 45.
`9
` A. Yes, when side wall spacers are formed,
`10
`stringer spacers are formed in the interface area, so
`11
`at the time that side wall spacers are formed, in this
`12
`passage, side wall spacers are commonly formed after
`13
`the individual transistors of the memory array have
`14
`been formed, stringer spacers are formed at the
`15
`interface area of the steps.
`16
` Q. So simultaneously with the formation of the
`17
`spacers around the individual transistors of the
`18 memory array, we might form spacers at the interface;
`19
`is that right?
`20
` A. That could happen.
`21
` Q. And that's what the patent is referring to
`22
`as prior art in column 1; is that right?
`
`23
`
`1 A. Yes.
`2 Q. Now, why is the spacer material shown in
`3 figure 1 being deposited at the interface area at all?
`4 A. Why is it showing the stringer spacers at
`5 all?
`6 Q. Yeah, why is it being formed at the
`7 interface?
`8 A. Why is it -- during a deposition of a
`9 dielectric layer, for example, and if there are no
`10
`other materials that have been deposited to protect,
`11
`for example, that region, there could be some
`12
`dielectric material that is also deposited in the
`13
`interface area.
`14
` Q. So materials that could have been deposited
`15
`to protect the interface might include like a mask; is
`16
`that right?
`17
` A. A mask or -- yes, a mask would be a general
`18
`term, yes.
`19
` Q. So am I correct, if you don't mask the
`20
`interface and you're depositing spacers around the
`21
`active transistors, you might end up with spacers
`22
`being formed in the interface as well; is that
`
`1 correct?
`2 A. Correct.
`3 Q. Okay. I'd like to turn to column 4, lines
`4 10 to 14.
`5 A. Yes.
`6 Q. So it says here, it says, "Referring next to
`7 figure 3C in the present embodiment, a known process
`8 such as an etch back process, is used to remove
`9 selectively the dielectric material 315 and poly-1
`10
`310b." So my question for you is isn't it true then
`11
`in prior semiconductor devices before the '027 patent,
`12
`dielectric material had been deposited over the entire
`13
`surface of a chip and then etched back?
`14
` A. Sorry, your question is --
`15
` Q. Yes.
`16
` A. Is it known in the prior art?
`17
` Q. Yes, was it known before the '027 patent to
`18
`use an etch back process to selectively remove
`19
`dielectric material that had been deposited over the
`20
`entire surface of the chip?
`21
` A. Generally I would say yes, but in the
`22
`context of the '027, the answer is that it depends on
`25
`1 what a semiconductor engineer considers to be
`2 potentially problematic or potentially resulting in an
`3 undue risk, for example, of forming stringer spacers
`4 as well.
`5 Q. So this etch back process, whether or not
`6 you deposit dielectric over the entire chip and then
`7 etch back, you're telling me that it would depend on
`8 whether or not an engineer might consider it a
`9 potentially problematic or undue risk of forming
`10
`stringer spacers as to whether they might use an etch
`11
`back step to remove dielectric in the prior art; is
`12
`that right?
`13
` A. It's possible.
`14
` Q. Based on your expertise, was it likely?
`15
` A. That semiconductor engineers would consider
`16
`such challenges and risks, yes, absolutely.
`17
` Q. And -- and they would have considered such
`18
`challenges and risks in removing dielectric that had
`19
`been deposited over the entire surface of the chip; is
`20
`that right?
`21
` A. They wou