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`PNY Technologies, Inc.
`
`
`EXHIBIT 1006
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`PNY Exhibit 1006
`Inter Partes Review of
`US Patent No. 7,518,879
`
`

`

`US 20040027809A1
`
`(19) United States
`(12) Patent Application Publication (10) Pub. No.: US 2004/0027809 A1
`Takahashi et al.
`(43) Pub. Date:
`Feb. 12, 2004
`
`(54)
`
`IC CARD AND SEMICONDUCTOR
`INTEGRATED CIRCUIT DEVICE PACKAGE
`
`Publication Cla$ification
`
`(76)
`
`Inventors: Takuya Thkahashi, Tokyo (JP);
`Kazuhim Yamamoto, Naka-gun (JP);
`Minoru Ohara, Ome-shi (JP)
`
`Im. CI.7 HOSK 1114
`(51)
`(52) U.S.Cl. 3611737
`
`Correspondence Address:
`OBLON, SPIVAK, MCCLELLAND, MAIER &
`NEUSTADT, RC.
`1940 DUKE STREET
`ALEXANDRLA, VA 22314 (US)
`
`(21) Appl. No:
`
`10f442,959
`
`(22) Filed:
`
`May 22, 2003
`
`(30)
`Foreign Application Priority Data
`May 22, 2002 (JP) 2002447914
`
`(57)
`
`ABSTRACT
`
`An IC‘ card includes a base card and a semiconductor
`
`integrated circuit device package. The semiconductor inte-
`grated circuit device package has one surface and the other
`surface disposed opposite to the one surface. In one surface,
`a plurality of card terminals which can re-contact terminals
`of an electronic device are disposed. The base card includes
`a concave portion. The other surface is attached to a bottom
`of the concave portion of the base card.
`
`31
`
`Apparatus
`insertion
`surface
`«—
`
` f'
`
`a
`
`PNY EXHIBIT 1006
`
`

`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 1 0f 35
`
`US 2004/0027809 A1
`
`103
`
`102
`
`105
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`
`PRIOR ART
`
`
`
`

`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 2 0f 35
`
`US 2004/0027809 A1
`
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`

`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 3 0f 35
`
`US 2004/0027809 A1
`
`43
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`

`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 4 of 35
`
`US 2004/0027809 A1
`
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`Patent Application Publication
`
`Feb. 12, 2004 Sheet 5 0f 35
`
`US 2004/0027809 A1
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`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 6 of 35
`
`US 2004/0027809 A1
`
`
`
`FIG.8D
`
`

`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 7 0f 35
`
`US 2004/0027809 A1
`
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`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 3 0f 35
`
`US 2004/0027809 A1
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`

`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 9 0f 35
`
`US 2004/0027809 A1
`
`Card terminal surface
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`slide surface
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`

`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 10 0f 35
`
`US 2004/0027809 A1
`
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`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 11 of 35
`
`US 2004/0027809 A1
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`. 3 1
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`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 13 0f 35
`
`US 2004/0027809 A1
`
`
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`Patent Application Publication
`
`Feb. 12, 2004 Sheet 14 of 35
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`US 2004/0027809 A1
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`Patent Application Publication
`
`Feb. 12, 2004 Sheet 15 of 35
`
`US 2004/0027809 A1
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`Patent Application Publication
`
`Feb. 12, 2004 Sheet 16 0f 35
`
`US 2004/0027809 A1
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`Patent Application Publication
`
`Feb. 12, 2004 Sheet 17 of 35
`
`US 2004/0027809 A1
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 18 0f 35
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`US 2004/0027809 A1
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`Feb. 12, 2004 Sheet 19 0f 35
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 20 0f 35
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`US 2004/0027809 A1
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 22 of 35
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`US 2004/0027809 A1
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 23 0f 35
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`US 2004/0027809 A1
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 24 of 35
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`US 2004/0027809 A1
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`Patent Application Publication
`
`Feb. 12, 2004 Sheet 25 0f 35
`
`US 2004/0027809 A1
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`semiconductor memory
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`

`

`Patent Application Publication
`
`Feb. 12, 2004 Sheet 26 0f 35
`
`US 2004/0027809 A1
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 27 0f 35
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`US 2004/0027809 A1
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 28 0f 35
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`US 2004/0027809 A1
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`Feb. 12, 2004 Sheet 29 0f 35
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`Feb. 12, 2004 Sheet 30 of 35
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 31 0f 35
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`US 2004/0027809 A1
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 32 0f 35
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`US 2004/0027809 A1
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 33 0f 35
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`US 2004/0027809 A1
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 34 of 35
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`US 2004/0027809 A1
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`Patent Application Publication
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`Feb. 12, 2004 Sheet 35 of 35
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`US 2004/0027809 A1
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`
`
`5305Egan—9x32
`
`Fi............................same:EELBmen.505
`
`
`
`cwcfimmmhamwumofi\280.amEma“::30
`
`
`
`
`5:85233%“:va.0_n—
`
`
`
`
`
`

`

`US 2004/0027809 A1
`
`Feb. 12, 2004
`
`IC CARD AND SEMICONDUCTOR INTEGRATED
`CIRCUIT DEVICE PACKAGE
`
`CROSS-REFERENCE TO RELATED
`APPLICATIONS
`
`[0001] This application is based upon and claims the
`benefit of priority from the prior Japanese Patent Application
`No. 20(2-147914, filed May 22, 2002, the entire contents of
`which are incorporated herein by reference.
`
`BACKGROUND OF THE INVENTION
`
`[0002]
`
`1. Field of the Invention
`
`invention relates to an IC card, a
`[0003] The present
`semiconductor integrated circuit device package for use in
`the IC card; and an electronic device in which the IC card is
`used.
`
`[0004]
`
`2. Description of the Related Art
`
`there is a
`[0005] As one of structures of an IC card,
`structure in which a chip-on-board (COB) type semiconduc-
`tor integrated circuit device package (hereinafter referred to
`as the COB type package) is contained in a cavity disposed
`in a base card in a so-called cavity down state. A typical
`example of this structure is shown in FIGS. 1A and 13.
`
`[0006] FIG. 1A is a sectional view showing the IC card
`according to the typical example, and FIG. 13 is an
`exploded sectional view,
`
`[0007] As shown in FIGS. 1A and 13, for a COB type
`package 101, a semiconductor integrated circuit chip 103 is
`mounted on a printed board 102 in a bare state, and the chip
`103 is coated with a resin 104. Therefore, in the COB type
`package 101, fringes 105 exist between an outer peripheral
`portion of the printed board 102 and the resin 104. FIG. 2
`shows an appearance of the COB type package 101.
`
`[0008] A cavity 112 for containing the COB type package
`101 is disposed in a base card 111. Paste edges 113 are
`disposed in the periphery of the cavity 112; and the fringes
`105 of the COB type package 101 are bonded to the paste
`edges 113. Accordingly, particularly a portion of the resin
`104 of the COB type package 101 is contained in the cavity
`112 in a so-called cavity down state.
`
`BRIEF SUMMARY OF THE INVENTION
`
`[0009] An lC card according to a first aspect of the present
`invention comprises: a base card including a concave por—
`tion; and a semiconductor integrated circuit device package
`which includes one surface and the other surface disposed
`opposite to the one surface and in which a plurality of
`re-contactable card terminals with respect to terminals of an
`electronic device are disposed on the one surface and the
`other surface is attached to a bottom of the concave portion
`of the base card.
`
`[0010] A semiconductor integrated circuit device package
`according to a second aspect of the present invention com-
`prises: at least one semiconductor integrated circuit chip; a
`rectangular parallelepiped package in which at
`least one
`semiconductor integrated circuit chip is contained; and a
`plurality of card terminals which are disposed in one surface
`of the rectangular parallelepiped package and which are
`
`electrically connected to at least one semiconductor inte-
`grated circuit chip and which can re-contact terminals of an
`electronic device.
`
`[0011] An electronic device according to a third aspect of
`the present invention comprises: a card interface; a card slot
`connected to the card interface; and an IC card electrically
`connected to the card slot, this IC card including: a base card
`having a concave portion; and a semiconductor integrated
`circuit device package which includes one surface and the
`other surface disposed opposite to the one surface and in
`which a plurality of card terminals recontactable with
`respect to terminals of an electronic device are disposed on
`the one surface and the other surface is attached to a bottom
`of the concave portion of the base card.
`
`BRIEF DESCRIPTION OF THE SEVERAL
`VIEWS OF THE DRAWING
`
`[0012] FIG. 1A is a sectional view showing an IC card
`according to a conventional example;
`
`[0013] FIG. 13 is an exploded sectional view showing the
`IC card according to the conventional example;
`
`[0014] FIG. 2 is a perspective view showing an appear-
`ance of a COB type package;
`
`[0015] FIG. 3A is a plan view showing the IC card
`according to one embodiment of the present invention;
`
`[0016] FIG. SB is a sectional view taken along line 3B-3B
`in FIG. 3A;
`
`[0017] FIG. 3C is a sectional view taken along line 3C-3C
`in FIG. 3A;
`
`[0018] FIG. 4A is a plan view showing one example of a
`base card for use in the IC card according to the embodiment
`of the present invention;
`
`[0019] FIG. 4B is a sectional view taken along line 4B-4B
`in FIG. 4A;
`
`[0020] FIG. 4C is a sectional view taken along line 4C-4C
`in FIG. 4A;
`
`[0021] FIG. 5 is a plan view showing one example of a
`position where a concave portion is formed;
`
`[0022] FIGS. 6A and 63 are plan views showing one
`example of a semiconductor integrated circuit device pack-
`age for use in the IC card according to the embodiment of
`the present invention;
`
`[0023] FIG. 6C is a sectional view taken along line 6C-6C
`in FIGS. 6A and 63;
`
`[0024] FIG. SD is a sectional view taken along line 6D-6D
`in FIGS. 6A and 63;
`
`[0025] FIGS. 7A and 7B are perspective views showing
`an example of a wiring board for use in the semiconductor
`integrated circuit device package according to one example;
`
`[0026] FIGS. 8A to 8D are perspective views showing a
`manufacturing method of the semiconductor integrated cir-
`cuit device package according to one example;
`
`[0027] FIGS. 9A and 9B are sectional views showing a
`typical effect by the IC card according to the embodiment of
`the present invention;
`
`

`

`US 2004/0027809 A1
`
`Feb. 12, 2004
`
`[0028] FIG. 10A is a sectional view showing one example
`of a first structure possessed by the [C card according to the
`embodiment of the present invention;
`
`[0050] FIG. 24A is a plan view showing one example of
`a ninth structure of the [C card according to the embodiment
`of the present invention;
`
`[0029] FIG. 103 is a sectional view showing the typical
`eflect by the first structure;
`
`[0051] FIG. 24B is a diagram showing a typical effect by
`the ninth structure;
`
`[0030] FIG. 11A is a sectional view showing one example
`of a second structure of the IC card according to the
`embodiment of the present invention;
`
`[0052] FIG. 25A is a plan view showing one example of
`a tenth structure of the IC‘ card according to the embodiment
`of the present invention;
`
`[0031] FIG. 113 is a sectional view showing the typical
`effect according to the second structure;
`
`[0032] FIG. 12A is a sectional view showing the second
`structure in an enlarged size;
`
`[0033] FIG. 123 is a sectional view showing a circum-
`stance of the second structure;
`
`[0034] FIG. 13A is a sectional view showing a third
`structure in the enlarged size;
`
`[0035] FIG. 133 is a sectional view showing the typical
`effect by the third structure;
`
`[0036] FIGS. 14A to 14C are perspective views showing
`some examples of the third structure of the [C card accord-
`ing to the embodiment of the present invention;
`
`[0037] FIGS. 15A to 15C are sectional views showing a
`background of a fourth structure;
`
`[0038] FIG. 16A is a sectional view showing one example
`of the fourth structure of the [C card according to the
`embodiment of the present invention;
`
`[0039] FIGS. 163 and 16C are sectional views showing
`the typical effect by the fourth structure;
`
`[0040] FIGS. 17A and 173 are perspective views show-
`ing the background of a fifth structure;
`
`[0041] FIG. 18A is a perspective view showing one
`example of the fifth structure of the [C card according to the
`embodiment of the present invention;
`
`[0042] FIG. 183 is a perspective view showing the typical
`effect by the fifth structure;
`
`[0043] FIGS. 19A and 193 are sectional views showing
`the background of a sixth structure;
`
`[0044] FIG. 20A is a perspective view showing one
`example ofthe sixth structure of the [C card according to the
`embodiment of the present invention;
`
`[0045] FIG. 203 is a sectional view showing the typical
`eflect by the sixth structure;
`
`[0046] FIG. 21 is a sectional view showing one example
`of a seventh structure of the IC card according to the
`embodiment of the present invention;
`
`[0047] FIG. 22 is a sectional view showing a modification
`example of the seventh stmcture of the IC card according to
`the embodiment of the present invention;
`
`[0048] FIG. 23A is a plan view showing one example of
`an eighth structure of the [C card according to the embodi-
`ment of the present invention;
`
`[0049] FIG. 23B is a diagram showing the typical efiect
`by the eighth structure;
`
`[0053] FIG. 25B is a side view showing one example of
`the tenth structure of the [C card according to the embodi-
`ment of the present
`invention as seen on an apparatus
`insertion surface side;
`
`[0054] FIG. 26A is a side view of a card slot with a guide
`as seen on the IC‘ card insertion surface side;
`
`[0055] FIG. 263 is a diagram schematically showing
`insertion of the IC card into the card slot with the guide;
`
`[0056] FIG. 27A is a sectional view showing a first
`example of a connection portion;
`
`[0057] FIG. 273 is a sectional view showing a second
`example of the connection portion;
`
`[0058] FIG. 27C is a sectional view showing a third
`example of the connection portion;
`
`[0059] FIG. 273 is a sectional view showing a fourth
`example of the connection portion;
`
`[0060] FIG. 27E is a sectional view showing a fifth
`example of the connection portion;
`
`[0061] FIGS. 28A to 28C are plan views showing one
`example of the semiconductor integrated circuit device
`package for use in the IC card according to the embodiment
`of the present invention;
`
`[0062] FIG. 29A is a plan view showing the [C card
`according to a first modification example;
`
`[0063] FIG. 29B is a sectional view taken along line
`293-293 in FIG. 29A;
`
`[0064] FIG. 30A is a plan view showing the [C card
`according to a second modification example;
`
`[0065] FIG. 303 is a sectional view taken along line
`303-303 in FIG. 30A;
`
`[0066] FIG. 31A is a plan view showing the [C card
`according to a third modification example;
`
`[0067] FIG. 313 is a sectional view taken along line
`313-313 in FIG. 31A;
`
`[0068] FIG. 32A is a plan view showing the [C card
`according to a fourth modification example;
`
`[0069] FIG. 323 is a sectional view taken along line
`323-323 in FIG. 32A;
`
`[0070] FIG. 33A is a plan view showing the [C card
`according to a fifth modification example;
`
`[0071] FIG. 333 is a sectional view taken along line
`333-333 in FIG. 33A;
`
`[0072] FIG. 34 is a plan view showing the semiconductor
`integrated circuit device package according to a sixth modi-
`fication example;
`
`

`

`US 2004/0027809 A1
`
`Feb. 12, 2004
`
`DJ
`
`[0073] FIG. 35 is a plan view showing the semiconductor
`integrated circuit device package according to a seventh
`modification example;
`
`[0074] FIG. 36A is a plan view showing the semiconduc-
`tor integrated circuit device package according to an eighth
`modification example;
`
`[0075] FIG. 363 is a sectional view taken along line
`36B-3fiB in FIG. 36A;
`
`[0076] FIG. 37A is a plan view showing the semiconduc-
`tor integrated circuit device package according to a ninth
`modification example;
`
`[0077] FIG. 373 is a sectional view taken along line
`37B-37B in FIG. 37A;
`
`[0078] FIG. 38A is a plan view showing the semiconduc-
`tor integrated circuit device package according to a tenth
`modification example;
`
`[0079] FIG. 383 is a sectional view taken along line
`38B-3SB in FIG. 38A;
`
`[0080] FIG. 39A is a plan view showing the semiconduc-
`tor integrated circuit device package according to an elev-
`enth modification example;
`
`[0081] FIG. 393 is a sectional view taken along line
`39B-39B in FIG. 39A;
`
`[0082] FIG. 40A is a plan view showing the semiconduc-
`tor integrated circuit device package according to a twelfth
`modification example;
`
`[0083] FIG. 403 is a sectional view taken along line
`40B-40B in FIG. 40A;
`
`[0084] FIG. 41 is a block diagram showing one example
`of a semiconductor integrated circuit device according to a
`thirteenth modification example;
`
`[0085] FIG. 42 is a diagram showing one example of a
`memory cell array shown in FIG. 41;
`
`[0086] FIG. 43 is a perspective view showing one
`example of an electronic device in which the IC card
`according to the embodiment of the present
`invention is
`used;
`
`[0087] FIG. 44 is a block diagram showing a basic system
`of a digital still camera; and
`
`[0088] FIGS. 45A to 45N are diagrams showing another
`example of the electronic device or system in which the [C
`card according to the embodiment of the present invention
`is used.
`
`DETAILED DESCRIPTION OF THE
`INVENTION
`
`[0089] One embodiment of the present invention will be
`described hereinafter with reference to the drawings. In the
`description, portions common to all
`the drawings are
`denoted with common reference numerals.
`
`[0090] FIG. 3A is a plan view showing an IC card
`according to the embodiment of the present invention, FIG.
`33 is a sectional view taken along line 3B-3B in FIG. 3A,
`and FIG. 3C is a sectional view taken along line 3C-3C in
`FIG. 3A.
`
`[0091] FIG. 4A is a plan view showing one example of a
`base card for use in the IC‘ card according to the embodiment
`of the present invention, FIG. 4B is a sectional view taken
`along line 43-43 in FIG. 4A, and FIG. 4C is a sectional
`view taken along line 4C-4C in FIG. 4A.
`
`[0092] As shown in FIGS. 3A to 3C, and 4A to 4C, a
`concave portion 13 is disposed in a base card 11. A semi-
`conductor integrated circuit device package 1 is attached to
`a bottom of the concave portion 13. This example of
`attachment is bonding, for example, by an adhesive 2, or an
`adhesive tape. The package 1 is attached to the concave
`portion 13, for example, in an state in which it is difficult to
`attachfdetach the package. This prevents, for example, an
`unforeseen pee] in a market, or unnecessary detachment.
`However, for example, in consideration of change or attach-
`ment of the semiconductor integrated circuit device package
`1 in the market, it is also possible to attach the semicon-
`ductor integrated circuit device package 1 to the concave
`portion 13, for example, in an attachablefdetachable state.
`
`[0093] The concave portion 13 of the base card 11 is very
`similar to the cavity 112 of the conventional IC card shown
`in FIGS. 1A and 13. However, the concave portion 13 is
`difierent from the cavity 112 of the conventional IC card
`only in that
`the paste edges 113 is not disposed in a
`periphery. This is because thought or concept of the con-
`ventional IC card lies in that the package or chip is buried
`or contained in the IC card. On the other hand, the thought
`or concept of the IC card according to the embodiment lies
`in that the package is attached to the IC‘ card. The bottom of
`the concave portion 13 is, figuratively speaking, the paste
`edges.
`
`[0094] As shown in FIG. 5, one example of the position
`where the concave portion 13 of the base card 11 is disposed
`is a position deviating from a center 14 of the base card 11.
`Concretely, as shown in FIG. 5, a center 15 of the concave
`portion 13 is shifted from the center 14 of the base card 11
`and disposed. Accordingly, a bond center deviates from the
`center 14 of the base card 11. One of advantages of deviation
`of the bond center from the center of the base card 11 lies in
`
`that the package does not easily peel ofl‘. For example, when
`the IC card, for example, the base card 11 bends because of
`an unforeseen external force, the package does not easily
`peel ofi as compared with a case in which the bond center
`agrees with the center of the base card 11.
`
`[0095] FIGS. 6A and 63 are plan views showing one
`example of a semiconductor integrated circuit device pack-
`age for use in the IC card according to the embodiment of
`the present invention, FIG. 6C is a sectional view taken
`along line 6C-6C in FIGS. 6A and 63, and FIG. 6D is a
`sectional view taken along line 6D-6D in FIGS. 6A and 63.
`
`[0096] As shown in FIGS. 6A to 6D, one example of the
`semiconductor integrated circuit device package 1 is, for
`example, a package including the structure which conforms
`to a chip on board (COB) type package. In the semiconduc-
`tor integrated circuit device package 1 according to the
`present example, there is no fringe as in the conventional
`COB type package 101 shown in FIGS. 1A, 13, and 2. It is
`a so-called fringeless package. One example of the fringe-
`less type package is a rectangular parallelepiped package
`shown in FIGS. 6A to 6D. A manufacturing example of the
`rectangular parallelepiped package will be described here-
`inafter.
`
`

`

`US 2004/0027809 A1
`
`Feb. 12, 2004
`
`[0097] FIGS. 7A and 7B are perspective views showing
`one example of a wiring board for use in manufacturing the
`semiconductor integrated circuit device package according
`to one example, and FIGS. SA to SD are perspective views
`showing a manufacturing method of the semiconductor
`integrated circuit device package according to one example.
`
`[0098] First, a wiring board 3 shown in FIGS. 7A and 7B
`is prepared. One example of the wiring board 3 is a printed
`board. Card terminals 4 are disposed on one surface of the
`wiring board 3 according to the present example. The card
`terminals 4 in the present specification are, for example, flat
`terminals which can repeatedly re-contact the terminals of
`the electronic device. One example of the electronic device
`is an electronic device in which, for example, the IC‘ cards
`are used as media. In the other surface disposed opposite to
`one surface of the wiring board 3, die bond portions 5 to
`which semiconductor
`integrated circuit chips are die-
`bonded, and wirings 6 electrically connected to pads of the
`semiconductor integrated circuit chips. The wirings 6 are
`connected to the card terminals 4 via connection portions 7
`(see FIG. 63) disposed in the wiring board 3. The wiring
`board 3 may be not only the printed board but also a
`single-layer wiring tape substrate in which there is a hole in
`a part of an insulating layer, or a multi-layered wiring
`substrate which includes a via hole.
`
`[0099] Next, as shown in FIG. 8A, a plurality of semi-
`conductor integrated circuit chips 8 are die-bonded to the
`wiring board 3. Furthermore, the pads of the plurality of
`chips 3 are electrically connected to the wirings 6. One
`example of electric connection of the pads of the chips 8 to
`the wirings 6 is wire bond using bonding wires 9, but is not
`limited to the wire bond.
`
`[0100] Next, as shown in FIG. SB, the plurality of chips
`8 are coated with an insulating resin 10. One example of the
`insulating resin 10 is an insulating plastic.
`
`[0101] Next, as shown in FIG. 8C, for example, a dicer 21
`is used to dice the wiring board 3 and resin 10 to obtain the
`rectangular parallelepiped package 1 shown in FIG. 8D.
`
`[0102] The card terminals 4 shown in FIG. 63 are dis-
`posed in one surface of the rectangular parallelepiped pack-
`age 1. Moreover, as shown in FIG. 6A, for example, only
`the resin 10 exists in the other surface disposed opposite to
`one surface. The other surface in which only the resin 10
`exists is an attachment surface to the concave portion 13.
`
`[0103] According to the IC card of the embodiment, the
`following efiect can be obtained as compared with the
`conventional IC‘ card.
`
`[0104] FIGS. 9A and 9B are sectional views showing a
`typical effect by the IC card according to the embodiment of
`the present invention.
`
`[0105] FIG. 9A shows an example in which a size of the
`concave portion 13 of the IC card according to the embodi—
`ment is set to be the same as that of the paste edge 113 of
`the conventional IC card.
`
`[0106] As shown in FIG. 9A, in the conventional IC card,
`the size of the cavity 112 is limited by the paste edge 113.
`On the other hand, in the IC card according to the embodi-
`ment, the concave portion 13 is not limited to the paste edge.
`Therefore, it is possible to mount the large-sized semicon-
`ductor integrated circuit device package 1 on the IC card.
`
`integrated circuit
`When the large-sized semiconductor
`device package 1 can be mounted, the semiconductor inte-
`grated circuit chips 8 can be enlarged, and it is possible to
`obtain an advantage that performance per unit area of the IC
`card is easily improved. For example,
`in memory card
`application, a storage capacity per unit area of the memory
`card is easily enlarged.
`
`[0107] Moreover, since the large-sized chips 8 can be
`mounted, severe miniaturization does not have to be use-
`lessly demanded, for example, with respect to a semicon-
`ductor element or circuit
`integrated in the chip 3. This
`reduces development costs, for example, of the chips 8. If
`the development costs of the chips 8 can be reduced, costs
`of the 1C card itself is advantageously reduced.
`
`[0108] FIG. 9B shows an example in which the size of the
`semiconductor integrated circuit chip 8 of the IC‘ card
`according to the embodiment is set to be the same as that of
`the semiconductor integrated circuit chip 103 of the con-
`ventional IC card.
`
`It is not necessary to dispose any paste edge around
`[0109]
`the concave portion 13 in the IC card according to the
`embodiment. For example, since it is unnecessary to dispose
`the paste edge 113, the concave portion 13 can be minia-
`turized, and it is possible to miniaturize the IC card, figu-
`ratively speaking the base card 11 in the embodiment. The
`miniaturization of the IC‘ card is also advantageous for
`reducing the cost of the IC card.
`
`the
`[0110] Moreover, as shown in FIGS. 1A and 1B,
`conventional
`IC card includes a structure in which the
`fringes 105 of the COB type package 101 are bonded to the
`paste edge 113. That is, the package 101 requires the fringes
`105. On the other hand, in the IC card according to the
`embodiment, the resin 10 of the semiconductor integrated
`circuit device package 1 is attached to the bottom of the
`concave portion 13. Therefore, the fringeless package can be
`used in the package 1. For the fringeless package, when the
`size of the package is set to be the same as that of the fringed
`package, the larger chip 3 can be mounted. Moreover, with
`the same size as that of the chip 3, the size of the package
`can be reduced. Therefore, when the fringeless package is
`attached to the concave portion 13 as in the IC card
`according to the embodiment, for example, an advantage can
`be obtained that the IC card can be miniaturized or can be
`prevented from being enlarged without deteriorating the
`performance.
`
`[0111] Furthermore, examples of the fringeless package
`include a rectangular parallelepiped package. For the rect—
`angular parallelepiped package, for example, as shown in
`FIGS. 8A to 8D,
`the whole package can be diced and
`obtained. The COB type package 101 s

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