IN THE UNITED STATES DISTRICT COURT
`FOR THE DISTRICT OF DELAWARE
`
`Civil Action No. 10-389-LPS
`
`CONSOLIDATED
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`))))))))))))))))))))))))))))))))
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`SOFTVIEW LLC,
`
`
`
`
`
`
`
`Plaintiff,
`
`
`
`v.
`
`APPLE INC.; AT&T MOBILITY LLC;
`DELL INC.; HTC CORP.; HTC
`AMERICA, INC.; HUAWEI
`TECHNOLOGIES CO., LTD.;
`FUTUREWEI TECHNOLOGIES, INC.;
`KYOCERA CORP.; KYOCERA
`WIRELESS CORP.; LG ELECTRONICS,
`INC.; LG ELECTRONICS USA, INC.; LG
`ELECTRONICS MOBILECOMM U.S.A.,
`INC.; MOTOROLA MOBILITY INC.;
`SAMSUNG ELECTRONICS CO., LTD.;
`SAMSUNG ELECTRONICS AMERICA,
`INC.; SAMSUNG
`TELECOMMUNICATIONS AMERICA,
`LLC; and SONY ERICSSON MOBILE
`COMMUNICATIONS (USA) INC.,
`
`
`
`
`
` Defendants.
`
`DECLARATION OF GLENN REINMAN
`IN SUPPORT OF SOFTVIEW LLC'S
`OPENING CLAIM CONSTRUCTION BRIEF
`
`
`
`I, Glenn Reinman, declare as follows:
`
`1.
`
`I have personal knowledge of the facts set forth in this Declaration and, if called
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`as a witness, could and would testify competently to such facts under oath.
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`2.
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`I am a professor of computer science at the University of California, Los Angeles.
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`I teach courses in Computer Systems Architecture and Computer Organization. My curriculum
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`vitae is attached as Exhibit A.
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`3.
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`I have received numerous awards and grants relating to my work in computer
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`science, including a National Science Foundation Expedition Grant, a Defense Advance
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`Research Project Agency Grant, a Gigascale System Research Center Grant, and a National
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`Science Foundation Career Award.
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`4.
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`I have lectured nationally and internationally on many topics, including the
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`architecture of mobile devices. I have published over 70 peer-reviewed research papers, paper
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`articles, editorials, and book chapters.
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`5.
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`I received my Bachelor of Science degree from the Massachusetts Institute of
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`Technology in 1996. I received my Doctor of Philosophy (PhD) in computer science from the
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`University of California, San Diego in 2001. Prior to joining the faculty at the University of
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`California, Los Angeles, I worked at Compaq Computer Corporation (now Hewlett Packard) in
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`their Western Research Lab and at Intel Corporation in their Microprocessor Research Lab.
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`Since 2001, I have been employed at the University of California, Los Angeles.
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`6.
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`For these reasons, I consider myself to be skilled in the area of computer science,
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`including the rendering of web pages on mobile devices. I was one of at least ordinary skill in
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`the art in the above areas as of June of 2000.
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`7.
`
`I have reviewed U.S. Patent No. 7,461,353 (the "'353 patent") and U.S. Patent No.
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`7,831,926 ("the '926 patent") as well as both SoftView LLC's and Defendants' proposed
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`constructions of the claim terms discussed in this declaration. I have also reviewed relevant
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`portions of the patent prosecution histories for these patents.
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`8.
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`As a person of at least ordinary skill in the art at the time of the filing date of the
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`patents, it is my opinion that the definition of "vector" set forth in the Merriam-Webster
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`Collegiate Dictionary, Tenth Edition at 1304 (Merriam-Webster, Inc. 2001)—"a quantity that has
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`magnitude and direction and that is commonly represented by a directed line segment whose
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`length represents the magnitude and whose orientation in space represents the direction . . . ."—
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`reflects the understanding in the art at the time of the filing date of the patents. In addition, the
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`understanding in the art at the time of the filing date of the patents was that "vector," in the
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`context of computer graphics, specifically referred to locations defined by X,Y coordinates in the
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`context of an X,Y grid, as described in the definition of "vector" in the Microsoft Computer
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`Dictionary, Fifth Edition at 548 (Microsoft Press 2002). Similarly, the understanding in the art at
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`the time of the filing date of the patents was that vector graphics referred to "[i]mages generated
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`from mathematical descriptions that determine the position, length, and direction in which lines
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`are drawn . . . ." as described in the Microsoft Computer Dictionary. Therefore, in my opinion,
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`these three dictionary definitions reflect the understanding in the art at the time of the filing date
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`of the patents of the meaning of the term "vector." These definitions are consistent with
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`SoftView's claim construction for "vector."
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`9.
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`It is my opinion, based on both my reading of the patent specifications and my
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`understanding of the art, that the construction of "vector" proposed by Defendants is overly
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`restrictive. The phrase "from a single point for the page or frame" does not make sense because
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`a vector is one point's location relative to another point. When discussing a single vector, the
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`concept that the origin point would be "single" is redundant and makes the construction more
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`confusing than necessary. Moreover, the concepts of the point being "for the page or frame" is
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`not supported by the specifications and appears to be an arbitrary limitation.
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`10.
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`In addition, the concept of generating a vector from a particular start point (e.g.,
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`the "primary datum" or "page datum") to a particular end point (e.g., an object) incorporates the
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`preferred embodiment of the specification. In my opinion, the specifications do not require that
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`a "vector", standing alone, describe the relative location of an object. Indeed, the claims often
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`have other claim language that explicitly requires a vector to do just that, which means that the
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`term "vector," standing alone, cannot include that meaning without making other language in the
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`claim redundant. See, e.g., '353 patent, claim 58 ("generating a vector from the primary datum to
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`the object datum for the object").
`
`11.
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`As a person of at least ordinary skill in the art at the time of the filing date of the
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`patents, it is my opinion, after reviewing the patents-in-suit, that the "page datum" (also referred
`
`to as "the page's datum point"), described in the specification, is a type of "primary datum, as
`
`recited in the patent claims. In particular, while the "primary datum" can refer to any "origin
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`point" for a vector, the "page datum" refers to a particular "primary datum" used as the origin
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`point for a particular page. Therefore, it is my understanding that each reference to a "page
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`datum" in the patents is also a reference to a "primary datum."
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`12.
`
`As a person of at least ordinary skill in the art at the time of the filing date of the
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`patents, it is my opinion, after reviewing the patents-in-suit, that the "layout location datum"
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`recited in the claims refers to "one or more points corresponding to the location of the object,"
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`which may include one or more points establishing the boundaries of the object. The patents do
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`not refer to a "fixed" point in connection with "layout location datum." Nor do the patents'
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`specifications or claims support the limitation "on the full-size web page" in relation to "layout
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`location datum."
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`13.
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`As a person of at least ordinary skill in the art at the time of the filing date of the
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`patents, I understand the claim terms "preserve(s)/preserved/preserving/preservation," which
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`appear in claims 1, 36, 66, 118, 149, and 252 of the '353 Patent and claims 30 and 52 of the '926
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`patent, as having their plain and ordinary meaning. Thus, the claim terms "preserve(s)/
`
`preserved/ preserving/ preservation" are not indefinite because one of ordinary skill in the art
`
`could discern the boundaries of the claim based on the claim language, the specification, the
`
`prosecution history, and the knowledge in the relevant art.
`
`14. My understanding of the meaning of "preserves" is supported by the patent
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`specifications. For example, in column 2, the '353 patent teaches that when Web content has
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`been scaled for viewing on devices with a small screens, the rendered displays of the content
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`"provide substantially the same or identical layout as the original Web page." In my opinion,
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`this description is in accordance with the plain and ordinary meaning of "preserves," when it is
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`used in the patent claims.
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`15.
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`Likewise, column 2 of the '353 patent teaches that, "[a]ccording to additional
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`aspects of the invention, methods and software for enabling support for resolution-independent
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`scalable display of Web content are provided. The methods and software enable users of various
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`devices, from handheld devices with small screens, to desktop PC's and laptops, to very large
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`screen devices, to view and interact with Web pages in a manner independent of the screen
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`resolution of such device's built-in or associated display, while maintaining the look and feel of
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`browsing such pages with a conventional desktop browser." Again, this description comports
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`with my understanding of the plain and ordinary meaning of "preserves," when it is used in the
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`patent claims.
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`16.
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`The patent prosecution histories provide further specificity regarding the
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`boundaries of the claim language. See FH003557-560 ('926 Patent File History). Figure 2a from
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`the '926 patent's file history, attached as Exhibit B to this brief, is illustrative. On the left is the
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`NY Times web page displayed on a desktop browser. On the right is the NY Times web page
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`displayed on the SoftView mobile device browser. The mobile device web page on the right
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`"preserves" the original page layout, functionality, and design of the desktop computer web page
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`on the left. Figures 2a-2c, also attached as a part of Exhibit B, provide a similar understanding.
`
`17.
`
`Thus, in the context of the claims, the plain and ordinary meaning of the claim
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`terms "preserve(s)/preserved/preserving/preservation" is that web page content drawn on the
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`small screen of a wireless device should preserve (or, to use a synonym, "maintain") the look and
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`feel (which the patents also describe as the "original layout, functionality, and design") of the
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`same web page content as it was retrieved from the server and intended to be rendered on a
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`desktop computer.
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`18.
`
`Figures 1A and 1B from the patent specifications are attached as Exhibits C and D
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`to my declaration, respectively. I understand these figures to depict (among other things) an
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`external antenna on the cellular phone (the cellular phone is colored green and the external
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`antenna is colored pink). These figures also show the cellular phone receives wireless
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`communications (colored yellow) from a wireless communications tower (colored blue) that is
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`connected to the Internet.
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`19.
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`It is my opinion, as a person of at least ordinary skill in the art at the time of the
`
`filing date of the patents, that the cellular phone shown in Figures 1A and 1B would
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`communicate with the wireless communications tower using the depicted external antenna
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`because wireless communications are accomplished using antennas, and it seems unlikely that
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`the external antenna would serve any other purpose on the cellular phone.
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`20.
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`It is also my opinion that if the cellular phone shown in Figures lA and lB did
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`not have an antenna, wireless communication would not be possible. An antenna is what
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`converts radio signals into electrical signals (and vice versa). Thus, an antenna is inherent in any
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`wireless communication device. However, the antenna does not necessarily need to be an
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`external antenna like the one depicted on the cellular phone in Figure lA. An internal antenna
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`can also facilitate wireless communication.
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`I declare under penalty of perjury under the laws ofthe United States of America that the
`
`foregoing is true and correct.
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`Executed this 21st day of September 2012 in Boston, Massachusetts.
`
`Professor Glenn Reinman, Ph.D.
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`Exhibit A
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`Motorola PX 1024_8
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`
`Glenn D Reinman
`UCLA Computer Science Department
`reinman@cs.ucla.edu
`
`Research Interests
`Computer architecture, augmented reality, parallel programming, compiler optimizations, and systems.
`
`Education
`● University of California - San Diego (San Diego, CA)
`○ Doctor of Philosophy degree in Computer Science, June 2001
`Advisor: Professor Brad Calder.
`○ Master of Science degree in Computer Science, March 1999.
`● Massachusetts Institute of Technology (Cambridge, MA)
`○ Bachelor of Science degree in Computer Science and Engineering, June 1996.
`
`Recent Research Highlights
`● Accelerator-Rich Chip Multiprocessors (CMPs) – energy-efficient high-performance SoC platforms that
`features both application-specific accelerators and heterogeneous cores.
`● RF Interconnect – a promising alternative interconnect for both on-chip and off-chip communication for
`future CMPs. It can be adaptively tuned to the communication needs of an individual application. We have
`also explored wireless RF interconnect and RF-integrated memory technology.
`● Mobile Augmented Reality – sensing and guidance framework for real-time critical situations. We are
`leveraging our work on automated planning engines and our work to accelerate computer vision as the basis for
`this line of research.
`● Real-Time Physics – we have proposed a novel physics processor and explored dynamically trading accuracy
`for improved performance while maintaining believability.
`● Dynamically Leveraging Statically Partitioned Resources – CMPs statically partition resources for
`scalability and performance/energy efficiency. We look at dynamically composing these static resources into
`more powerful components.
`
`Work Experience
`● University of California – Los Angeles (Los Angeles, CA)
`○ Assistant Professor (2001-2007)
`○ Associate Professor (2007-Present)
`● Expert Witness Testimony
`○ Served as an expert witness for ten independent patent infringement cases. Have been deposed, written
`detailed expert reports, constructed patent claim charts, deciphered decades-old designs from schematics
`and microcode, uncovered prior work to anticipate claims, architecturally simulated patented designs to
`demonstrate claim validity, and worked closely with lawyers to educate them on technical details.
`● University of California - San Diego, Research Assistant (San Diego, CA)
`○
`Implemented a profile-based approach to classifying loads for memory renaming, value prediction, and
`dependence prediction using SimpleScalar and ATOM. Created an aggressive fetch unit using a two-level
`branch prediction structure called an FTB. Worked with SimpleScalar to implement a hybrid load prediction
`mechanism, combining renaming, value prediction, address prediction, and dependence prediction.
`Explored importance of confidence in value prediction. Used C and C++. (Fall 1997-Spring 2001)
`Implemented a contention resolution scheme for embarassingly parallel applications (such as the DOT
`project at the San Diego Supercomputing Center). Worked in MPICH and C. (Spring 1997-Fall 1997)
`
`○
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`● COMPAQ (now HP) - Western Research Lab, Summer Internship 1999 (Palo Alto, CA)
`Expanded the CACTI cache compiler (CACTI 2.0). Enhancements include fully associative cache model, power
`modeling, multiple port models, transistor tuning, and tag path balancing.
`● Intel Corporation - Microprocessor Research Lab, Summer Intern 1998 (Hillsboro, OR)
`Studied the viability of caching state from the branch predictor, TLB, and BTB in the second level data cache.
`Modified SimpleScalar to use ITR traces for Win95 applications for initial predictability experiments. Used out-
`of-order simulation with SimpleScalar to determine the effectiveness of this technique.
`
`Teaching Experience
`● University of California – Los Angeles, Assistant Professor (Los Angeles, CA)
`○ Computer Systems Architecture (CSM151B - Upper Division Undergraduate class) - I have taught this
`class since Winter 2003, covering instruction set architecture design, ALU design, processor datapath and
`control design, pipelining, caches, virtual memory, IO devices, multithreading, multiprocessors, and
`multicore architectures.
`○ Advanced Topics in Microprocessor Design (CS259 - Graduate class) - I introduced this class in Spring
`2002, covering cutting edge research in general purpose microarchitecture. The processor pipeline is
`explored in detail, with attention to performance, complexity, cycle time, power, and area. Recent real world
`architectures are used for illustration, along with on-going research efforts in topics that includes multicore
`processors, NoC design, cache coherence mechanisms, GPU design and programming, branch prediction,
`load speculation, simultaneous multithreading, cache design/prefetching, register file design, and various
`techniques to combat processor scaling trends. Introduction to cycle-accurate microprocessor simulation.
`Lab intensive class designed to give students practical experience with simulation techniques and tricks. On-
`going work in architecture and compilers is discussed during class and then integrated into lab assignments
`using the simulation infrastructure.
`○ Microprocessor Simulation (CS259 - Graduate class) - I introduced this class in Winter 2003, providing a
`practical application of my Advanced Topics class students make use of execution-driven cycle-accurate
`processor simulators.
`○ Parallel and Distributed Systems (CS133 - Upper Division Undergraduate class) - I have completely
`reorganized this class in Winter 2007 to focus on programming in OpenMP, POSIX threads, MPI, and
`CUDA for both shared and distributed memory multiprocessors. The class also has a component on next
`generation chip multiprocessors, including design tradeoffs and un-core optimizations.
`○ Computer Organization (CS33 - Lower Division Undergraduate class) - I completely reorganized this class
`in Fall 2009 to make it a gateway systems class using low-level C programming and x86 assembly. It is a
`practical class, with several labs including an introduction to parallel programming with CUDA as the
`demonstration vehicle.
`○ Computer Science Seminar Series (CS201 - Graduate class)
`● University of California - San Diego, Teaching Assistant (San Diego, CA)
`○ Teaching Assistant - taught discussion sections for classes on data structures, artificial intelligence, and
`compilers. Recipient of 1996/97 TA Excellence Award.
`
`Publications
`Refereed Conference and Workshop Publications:
`1.
`Yu-Ting Chen, Jason Cong, Hui Huang, Chunyue Liu, Raghu Prabhakar and Glenn Reinman. Static and
`Dynamic Co-Optimizations for Blocks Mapping in Hybrid Caches. International Symposium on Low Power
`Electronics and Design (ISLPED), Jul/Aug 2012.
`Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian and Glenn Reinman. CHARM: A
`Composable Heterogeneous Accelerator-Rich Microprocessor. International Symposium on Low Power
`Electronics and Design (ISLPED), Jul/Aug 2012.
`Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Chunyue Liu and Glenn Reinman. BiN: A Buffer-
`in-NUCA Scheme for Accelerator-Rich CMPs. International Symposium on Low Power Electronics and Design
`(ISLPED), Jul/Aug 2012.
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`2.
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`3.
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`4.
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`5.
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`6.
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`7.
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`8.
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`Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, and Glenn Reinman. TBD.
`Dark Silicon Workshop (DaSi - held in conjunction with ISCA), Jun 2012
`Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Beayna Grigorian, and Glenn Reinman.
`Architecture Support for Accelerator-Rich CMPs. Design Automation Conference (DAC), Jun 2012
`Yu-Ting Chen, Jason Cong, Hui Huang, Bin Liu, Chunyue Liu, Miodrag Potkonjak and Glenn Reinman.
`Dynamically Reconfigurable Hybrid Cache: An Energy-Efficient Last-Level Cache Design. Conference on
`Design, Automation, and Test in Europe (DATE), Mar 2012.
`Yangkyo Kim, Gyungsu Byun, Adrian Tang, Jason Cong, Glenn Reinman, and M. F. Chang. An
`8Gb/s/pin 4pJ/b/pin Single-T-Line Dual (Base+RF) Band Simulataneous Bidirectional Mobile Memory
`I/O Interface with Inter-Channel Interference Suppression. International Solid-State Circuits Conference
`(ISSCC), Feb 2012.
`Jason Cong, Mohammad Ali Ghodrat, Michael Gill, Hui Huang, Bin Liu, Raghu Prabhakar, Glenn
`Reinman, and Marco Vitanza. Compilation and Architecture Support for Customized Vector Instruction
`Extension. Asia and South Pacific Design Automation Conference (ASP-DAC), Jan/Feb 2012.
`9. Mubbasir Kapadia, Matthew Wang, Glenn Reinman, and Petros Faloutsos. Improved Benchmarking for
`Crowd Simulations. Motion In Games (MIG), Nov 2011
`10. Kanit Therdsteerasukdi, Gyungsu Byun, Jeremy Ir, Glenn Reinman, Jason Cong, and Frank Chang. The
`DIMM Tree Architecture: A High Bandwidth and Scalable Memory System. IEEE International Conference
`on Computer Design (ICCD), Oct 2011.
`11. Yu-Ting Chen, Jason Cong and Glenn Reinman. HC-Sim: A Fast and Exact L1 Cache Simulator with
`Scratchpad Memory Co-simulation Support. International Conference on Hardware/Software Co-Design and
`System Synthesis (CODES+ISSS), Oct 2011.
`12. Beayna Grigorian, Marco Vitanza, Jason Cong, and Glenn Reinman. Accelerating Vision and Navigation
`Applications on a Customizable Platform. International Conference on Application-specific Systems, Architectures
`and Processors (ASAP), Sep 2011.
`13. Mubbasir Kapadia, Matthew Wang, Shawn Singh, Glenn Reinman, and Petros Faloutsos. Scenario
`Space: Characterizing Coverage, Quality, and Failure of Steering Algorithms. Symposium on Computer
`Animation (SCA), Aug 2011.
`Jason Cong, Karthik Gururaj, Hui Huang, Chunyue Liu, Glenn Reinman and Yi Zou. An Energy-
`Efficient Adaptive Hybrid Cache. International Symposium on Low Power Electronics and Design (ISLPED),
`Aug 2011.
`15. Mubbasir Kapadia, Shawn Singh, Glenn Reinman, and Petros Faloutsos. Multi-Actor Planning for
`Directable Simulations. Workshop on Digital Media and Digital Content Management, May 2011.
`16. Gyungsu Byun, Yangkyo Kim, Jongsun Kim, Sai-Wang Tam, Jason Cong, Glenn Reinman, and M. F.
`Chang. An 8.4Gb/s 2.5pJ/b Mobile Memory I/O Interface Using Bi-directional and Simultaneous Dual
`(Base+RF)-Band Signaling. International Solid-State Circuits Conference (ISSCC), Feb 2011.
`Jason Cong, Mohammadali Ghodrat, Michael Gill, Chunyue Liu, Glenn Reinman and Yi Zou. AXR-
`CMP: Architecture Support in Accelerator-Rich CMPs. Workshop on SoC Architecture, Accelerators and
`Workloads (SAW-2), Feb 2011.
`Shawn Singh, Mubbasir Kapadia, Billy Hewlett, Glenn Reinman and Petros Faloutsos. A Modular
`Framework for Adaptive Agent-Based Steering. Symposium on Interactive 3D Graphics and Games (I3D), Feb
`2011.
`19. Zoran Budimli(cid:0), Alex Bui, Jason Cong, Glenn Reinman, Vivek Sarkar. Modeling and Mapping for
`Customizable Domain-Specific Computing. Workshop on Concurrency for the Application
`Programmer (CAP), co-located with SPLASH 2010, Oct 2010.
`Jason Cong, Chunyue Liu, and Glenn Reinman. ACES: Application-specific cycle elimination and
`splitting for deadlock-free routing on irregular network-on-chip. Design Automation Conference (DAC), Jun
`2010.
`Shawn Singh, Mubbasir Kapadia, Petros Faloutsos, and Glenn Reinman. On the Interface Between
`Steering and Animation for Autonomous Characters. Workshop on Crowd Simulation held in conjunction with
`the 23rd Annual Conference on Computer Animation and Social Agents, May 2010.
`Shawn Singh, Mubbasir Kapadia, Glenn Reinman and Petros Faloutsos. An Open Framework for
`Developing, Evaluating, and Sharing Steering Algorithms. Motion In Games (MIG), Nov 2009.
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`18.
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`14.
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`17.
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`20.
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`23.
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`25.
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`27.
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`28.
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`Suk-Bok Lee, Sai-Wang Tam, Ioannis Pefkianakis, Songwu Lu, M. Frank Chang, Chuanxiong Guo,
`Glenn Reinman, Chunyi Peng, Mishali Naik, Lixia Zhang, and Jason Cong. A Scalable Micro Wireless
`Interconnect Structure for CMPs. International Conference on Mobile Computing and Networking, Sept 2009.
`24. Mubbasir Kapadia, Shawn Singh, Brian Allen, Glenn Reinman, and Petros Faloutsos. An Interactive
`Framework for Specifying and Detecting Steering Behaviors. Symposium on Computer Animation (SCA),
`Aug 2009.
`Jason Cong, M. Frank Chang, Glenn Reinman, and Sai-Wang Tam, Multiband RF-Interconnect for
`Reconfigurable Network-on-Chip Communications, System Level Interconnect Prediction (SLIP 2009), July
`2009.
`26. M. Frank Chang, Jason Cong, Adam Kaplan, Mishali Naik, Jagannath Premkumar, Glenn Reinman, Eran
`Socher, and Sai-Wang Tam. Power Redu ction of CMP Communication Networks via RF-
`Interconnects. International Symposium on Microarchitecture (MICRO), Nov 2008.
`Jason Cong, Karthik Gururaj, Guoling Han, Adam Kaplan, Mishali Naik, and Glenn Reinman. MC-Sim:
`An Efficient Simulation Tool for MPSoC Designs. International Conference on Computer-Aided Design
`(ICCAD), Nov 2008.
`Shawn Singh, Mubbasir Kapadia, Mishali Naik, Petros Faloutsos, and Glenn Reinman. Watch Out! A
`Framework for Evaluating Steering Behaviors. Proceedings of Motion In Games (MIG), June 2008.
`29. M. Frank Chang, Eran Socher, Sai-Wang Tam, Jason Cong, and Glenn Reinman. RF Interconnects for
`Communications On-Chip. International Symposium on Physical Design (ISPD), Apr 2008.
`30. M. Frank Chang, Jason Cong, Adam Kaplan, Mishali Naik, Glenn Reinman, Eran Socher, and Sai-Wang
`Tam. CMP Network-on-Chip Overlaid With Multi-Band RF-Interconnect. International Symposium on
`High-Performance Computer Architecture (HPCA), Feb 2008. BEST PAPER AWARD
`31. Tom Yeh, Petros Faloutsos, Sanjay Patel, Milos Ercegovac, and Glenn Reinman. The Art of Deception:
`Adaptive Precision Reduction for Area Efficient Physics Acceleration. International Symposium on
`Microarchitecture (MICRO), Dec 2007.
`32. Yongxiang Liu, Yuchun Ma, Eren Kursun, Jason Cong, and Glenn Reinman. Fine Grain 3D Integration
`for Microarchitecture Design Through Cube Packing Exploration. IEEE International Conference on
`Computer Design (ICCD), Oct 2007.
`33. Yongxiang Liu, Yuchun Ma, Eren Kursun, Jason Cong, and Glenn Reinman. 3D Architecture Modeling
`and Exploration. VLSI/ULSI Multilevel Interconnection Conference, Sept 2007.
`34. Tom Yeh, Petros Faloutsos, Sanjay Patel, and Glenn Reinman. ParallAX: An Architecture for Real-Time
`Physics. In 34th Annual International Symposium on Computer Architecture (ISCA), June 2007
`35. Yuchun Ma, Zhuoyuan Li, Jason Cong, Xianlong Hong, Glenn Reinman, Sheqin Dong, and Qian Zhou.
`Micro-architecture Pipelining Optimization with Throughput-Aware Floorplanning. 12th Asia and South
`Pacific Design Automation Conference (ASPDAC), Jan 2007.
`36. Vasily G. Moshnyaga, Hua Vo, Glenn Reinman, and Miodrag Potkonjak. Reducing Energy of
`DRAM/Flash Memory System by OS-Controlled Data Refresh. In International Symposium on Circuits and
`Systems (ISCAS), May 2007.
`37. Anahita Shayesteh, Glenn Reinman, Norm Jouppi, Suleyman Sair, and Tim Sherwood. Improving the
`Performance and Power Efficiency of Shared Helpers in CMPs. International Conference on Compilers,
`Architecture, and Synthesis for Embedded Systems (CASES), Oct 2006.
`38. Vasily Moshnyaga, Hoa Vo, Glenn Reinman, and Miodrag Potkonjak. Handheld System Energy
`Reduction by OS-Driven Refresh. Power and Timing Modeling, Optimization, and Simulation (PATMOS),
`September 2006.
`39. Tom Yeh, Petros Faloutsos, and Glenn Reinman. Enabling Real-Time Physics Simulation in Future
`Interactive Entertainment. ACM SIGGRAPH Video Game Symposium, Aug 2006.
`Jason Cong, Ashok Jagannathan, Yuchun Ma, Glenn Reinman, Jie Wei, and Yan Zhang. An Automated
`Design Flow for 3D Microarchitecture Evaluation. 11th Asia and South Pacific Design Automation Conference
`(ASPDAC), Jan 2006.
`41. Anahita Shayesteh, Eren Kursun, Tim Sherwood, Suleyman Sair, and Glenn Reinman. Reducing the
`Latency and Area Cost of Core Swapping through Shared Helper Engines. IEEE International Conference
`on Computer Design (ICCD), Oct 2005.
`
`40.
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`Motorola PX 1024_12
`
`

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`44.
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`46.
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`50.
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`42. Yongxiang Liu, Gokhan Memik, and Glenn Reinman. Reducing the Energy of Speculative Instruction
`Schedulers. IEEE International Conference on Computer Design (ICCD), Oct 2005.
`43. Tom Yeh and Glenn Reinman. Fast and Fair: Data-stream Quality of Service. International Conference on
`Compilers, Architecture, and Synthesis for Embedded Systems (CASES), Sep 2005.
`Jason Cong, Ashok Jagannathan, Glenn Reinman, and Yuval Tamir. Understanding The Energy
`Efficiency of SMT and CMP with Multi-clustering. IEEE/ACM International Symposium on Low Power
`Electronics and Design (ISLPED), Aug 2005.
`45. Yongxiang Liu, Anahita Shayesteh, Gokhan Memik, and Glenn Reinman. Tornado Warning: the Perils
`of Selective Replay in Multithreaded Processors. International Conference on Supercomputing (ICS), June 2005.
`Jason Cong, Yiping Fan, Guoling Han, Ashok Jagannathan, Glenn Reinman, and Zhiru Zhang.
`Instruction Set Extension with Shadow Registers for Configurable Processors. 13th ACM International
`Symposium on Field-Programmable Gate Arrays, Feb 2005.
`47. Ashok Jagannathan, Hannah Honghua Yang, Kris Konigsfeld, Dan Milliron, Mosur Mohan, Michail
`Romesis, Glenn Reinman, and Jason Cong. Microarchitecture Evaluation with Floorplanning and
`Interconnect Pipelining. Asia South Pacific Design Automation Conference (ASPDAC), Jan 2005.
`48. Eren Kursun, Glenn Reinman, Suleyman Sair, Anahita Shayesteh, and Tim Sherwood. Low-Overhead
`Core Swapping for Thermal Management. Workshop on Power-Aware Computer Systems (PACS'04) held in
`conjunction with the 37th Annual International Symposium on Microarchitecture, December 2004.
`49. Yongxiang Liu, Anahita Shayesteh, Gokhan Memik, and Glenn Reinman. The Calm Before the Storm:
`Reducing Replays in the Cyclone Scheduler. IBM T.J. Watson Conference on Interaction between Architecture,
`Circuits, and Compilers, Oct 2004.
`Jason Cong, Ashok Jagannathan, Glenn Reinman, and Yuval Tamir. A Communication-Centric
`Approach to Instruction Steering for Future Clustered Processors. IBM T.J. Watson Conference on
`Interaction between Architecture, Circuits, and Compilers, Oct 2004.
`51. Yongxiang Liu, Anahita Shayesteh, Gokhan Memik, and Glenn Reinman. Scaling the Issue Window
`with Look-Ahead Latency Prediction. International Conference on Supercomputing (ICS), June 2004.
`52. Fang-Chung Chen, Foad Dabiri, Roozbeh Jafari, Eren Kursun, Vijay Raghunathan, Thomas
`Schoellhammer, Doug Sievers, Deborah Estrin, Glenn Reinman, Majid Sarrafzadeh, Mani Srivastava,
`Ben Wu, Yang Yang. Reconfigurable Fabric: An enabling technology for pervasive medical monitoring.
`Communication Networks and Distributed Systems Modeling and Simulation Conference, Jan 2004.
`Jason Cong, Ashok Jagannathan, Glenn Reinman, and Michail Romesis. Microarchitecture Evaluation
`with Physical Planning. Design Automation Conference (DAC), 2003.
`54. Gokhan Memik, Glenn Reinman, and William H. Mangione-Smith. Reducing Energy and Delay Using
`Efficient Victim Caches. IEEE/ACM International Symposium on Low Power Electronics and Design
`(ISLPED), Aug. 2003.
`55. Gokhan Memik, Glenn Reinman, and William H. Mangione-Smith. Just Say No: Benefits of Early
`Cache Miss Determination. In the proceedings of the 9th IEEE/ACM International Symposium on High
`Performance Computer Architecture (HPCA), Feb. 2003.
`56. Glenn Reinman, Brad Calder and Todd Austin. High Performance and Energy Efficient Serial Prefetch
`Architecture. In the proceedings of the 4th International Symposium on High Performance Computing, May 2002, (c)
`Springer-Verlag.
`57. Glenn Reinman, Brad Calder, and Todd Austin. Fetch Directed Instruction Prefetching. In 32nd
`International Symposium on Microarchitecture (MICRO), November 1999.
`58. Glenn Reinman, Brad Calder, Dean Tullsen, Gary Tyson, and Todd Austin. Classifying Load and Store
`Instructions for Memory Renaming. In ACM International Conference on Supercomputing (ICS), June 1999.
`59. Glenn Reinman, Todd Austin, and Brad Calder. A Scalable Front-End Architecture for Fast Instruction
`Delivery. In 26th Annual International Symposium on Computer Architecture (ISCA), May 1999.
`60. Brad Calder, Glenn Reinman, and Dean Tullsen. Selective Value Prediction. In 26th Annual International
`Symposium on Computer Architecture (ISCA), May 1999.
`61. Glenn Reinman and Brad Calder. Predictive Techniques for Aggressive Load Speculation. In 31st Annual
`International Symposium on Mic