`US 6,814,832 B2
`(10) Patent N0.:
`
` Utsunomiya (45) Date of Patent: Nov. 9, 2004
`
`
`USOO6814832B2
`
`(54) METHOD FOR TRANSFERRING ELEMENT,
`METHOD FOR PRODUCING ELEMENT,
`INTEGRATED CIRCUIT, CIRCUIT BOARD,
`ELECTRO-OPTICAL DEVICE, IC CARD,
`AND ELECTRONIC APPLIANCE
`Inventor: Sumio Utsunomiya, Nagano (JP)
`.
`_
`_
`(73) Ass1gnee: Se1k0 Epson C0rp0rat10n, Tokyo (JP)
`
`(75)
`
`( * ) Notice:
`
`Subject to any disclaimer, the term of this
`patent is extended or adjusted under 35
`U.S.C. 154(b) by 0 days.
`
`(21) Appl‘ No“ 10/201’721
`(22) Filed:
`Jul. 24, 2002
`
`(65)
`
`Prior Publication Data
`US 2003/0024635 A1 Feb. 6, 2003
`
`JP
`JP
`JP
`i;
`JP
`J;
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`JP
`
`10-125930 A
`10425931 A
`A 10477187
`Algal-1233323
`A 11_24106
`23323::
`A1-74533
`A 11—97556
`A 11—243209
`11.243209
`A 11—251517
`A 11—251518
`A 11—312811
`A 2000—133809
`A2000—235348
`A2001—166301
`A 2001—189460
`
`5/1998
`5/1998
`6/1998
`3333
`“1999
`31333
`3/1999
`4/1999
`9/1999
`9/1999
`9/1999
`9/1999
`11/1999
`5/2000
`8/2000
`6/2001
`7/2001
`
`*
`
`......... H01L/29/786
`
`WO
`
`WO99/01899
`
`*
`
`1/1999
`
`........... H01L/27/12
`
`* cited by examiner
`
`(30)
`
`Foreign Application Priority Data
`
`Jul. 24, 2001
`
`(JP)
`
`....................................... 2001—223434
`
`Primary Examiner—J. A. Lorengo
`(74) Attorney, Agent, or Firm—Cliff & Berridge, PLC
`
`(51)
`
`Int. Cl.7 ......................... B32B 31/20; B32B 31/28;
`B05D 5/12; H01L 29/02; H01L 21/30
`....................... 156/230; 156/235; 156/247;
`(52) US. Cl.
`156/289; 156/344; 216/13; 427/96; 427/146;
`428/620; 438/455
`(58) Field of Search ................................. 156/230, 233,
`156/235, 241, 239, 247, 344, 289; 216/13,
`18, 20, 428/620, 914, 438/974, 977, 455,
`149, 458, 461; 427/146, 147, 148, 96, 108,
`117
`
`(56)
`
`References Cited
`U.S. PATENT DOCUMENTS
`
`6,521,511 B1 *
`
`2/2003 Inoue et al.
`
`................ 438/458
`
`FOREIGN PATENT DOCUMENTS
`
`JP
`JP
`JP
`JP
`
`A 10—12529
`A 10—12530
`A 10—12531
`10—125929 A
`
`1/1998
`1/1998
`1/1998
`5/1998
`
`(57)
`
`ABSTRACT
`
`Apeeling layer 2 is formed on an element-forming substrate
`1, an element-forming layer 3 including an electrical ele-
`ment is formed on the peeling layer, the element-forming
`layer is joined by means of a dissolvable bonding layer 4 to
`a temporary transfer substrate 5, the bonding force of the
`peeling layer is weakened to peel the element-forming layer
`from the element-forming substrate, the layer is moved to
`the temporary transfer substrate 5 side, a curable resin 6 is
`applied onto the element-forming layer 3 Which has been
`moved onto the temporary transfer substrate 5, the resin is
`cured to form a transfer substrate 6, and the bonding layer
`4 is dissolved to peel the temporary transfer substrate 5 from
`the transfer substrate 6, resulting in a structure in Which a
`transfer substrate is formed directly on the element-forming
`layer 3. The separation and transfer technique can be used to
`form a substrate With better flexibility and impact resistance
`directly on a semiconductor element, Without an adhesive
`layer on the semiconductor device that is produced.
`
`27 Claims, 7 Drawing Sheets
`
`
`'lll,"ll,"’lll,"
`
`
`
`
`{47mcell/II m’4
`
`
`
`
`
`.,,,,..,,..,,,,.,
`9m’,”’fl=\é¢
`
`TSMC-1002
`
`
`
`US. Patent
`
`Nov. 9,2004
`
`Sheet 1 0f7
`
`US 6,814,832 B2
`
`7 , ll]l"’l"W/’(
`
` 6
`
`Fig.1 A
`
`Fig.1 B
`
`Fig.1 C
`
`Fig.1 D
`
`I
`
`W,{Z/I/lémfi’fi
`
`' l l
`
`r lilil"”"lll"
`
`(4/4 a W ... 'M
`
`lh—f’w
`
`W
`
`
`
`TSMC-1002
`
`
`
`US. Patent
`
`Nov. 9, 2004
`
`Sheet 2 0f 7
`
`US 6,814,832 B2
`
`
`
`Fig.2A
`
`
`:.\__.-r'\ REM
`Fig.ZB
`
`
`
`
`
`
`
`
`~\:\_.-n 4Q_—F1 A‘.
`
`
`
`
`
`
`
`
`
`Fig.2D \
`
`
`
`
`
`Fig.2E
`
`
`
`
`
`
`
`_.__./L_
`‘JL—E
`
`
`6
`
`
`7
`
`
`
`US. Patent
`
`Nov. 9, 2004
`
`Sheet 3 0f 7
`
`US 6,814,832 B2
`
`
`
`TSMC-1002
`
`
`
`US. Patent
`
`NOV.
`
`9,2004
`
`Sheet4 0f7
`
`US 6,814,832 B2
`
` nsz
`
`\\nnAIIAI
`
`.
`
`n////M.
`,,.wD.//<\.\\\m
`lgmmw.”m/mx\\\\\\m
`
`I
`
`\
`
`212 210
`
`211
`
`
`
`
`
`US. Patent
`
`Nov. 9, 2004
`
`Sheet 5 0f 7
`
`US 6,814,832 B2
`
`Fig.5
`
`i H;
`Edi
`—i——i-—-i_
`Vsel
`Elia-Ha ------@
`lfllfllfl """g,
`!%i%i% -----\ng
`
`_ 4
`
`2
`
`
`
`US. Patent
`
`Nov. 9, 2004
`
`Sheet 6 0f 7
`
`US 6,814,832 B2
`
`
`
`TSMC-1002
`
`
`
`US. Patent
`
`Nov. 9, 2004
`
`Sheet 7 0f 7
`
`US 6,814,832 B2
`
`Fig.7 '
`
`172
`
`TSMC-1002
`
`
`
`US 6,814,832 B2
`
`1
`
`METHOD FOR TRANSFERRING ELEMENT,
`METHOD FOR PRODUCING ELEMENT,
`INTEGRATED CIRCUIT, CIRCUIT BOARD,
`ELECTRO-OPTICAL DEVICE, IC CARD,
`AND ELECTRONIC APPLIANCE
`
`BACKGROUND OF THE INVENTION
`
`1. Field of the Invention
`
`The present invention relates to a method for producing a
`semiconductor device using a technique for transferring
`thin-film elements between substrates.
`
`2. Description of the Related Art
`It
`is sometimes desirable to use plastic substrates for
`substrates in order to lower costs and prevent breakage
`caused by flaking or deformation in semiconductor devices
`such as liquid crystal display (LCD) panels and electrolu-
`minescence (EL) displays.
`However, processes involving elevated temperatures are
`employed in the production of thin-film transistors which are
`used in such panel types of displays, yet circuit elements
`such as EL elements and plastic substrates are susceptible to
`such elevated temperatures.
`The Applicant has proposed a transfer technique for
`producing semiconductor application devices by forming a
`semiconductor device on a heat-resistant base substrate
`
`using a conventional semiconductor-forming technique
`which includes a high-temperature process, then peeling the
`element-forming film (layer) with which the semiconductor
`device is formed from the substrate, and laminating the film
`to a plastic substrate. The details are described, for example,
`in “Method of Peeling” in Japanese Unexamined Patent
`Applications (Kokai) 10-125929, 10-125930, and
`10-125931.
`
`Semiconductor devices produced with the use of the
`aforementioned method of peeling include structures such as
`thin-film transistors and similar element-forming layers,
`adhesive layers to which an adhesive has been applied, and
`plastic substrates, but the film thickness of the adhesive is
`about 10 to 100 um, and the thickness of the substrate is
`about 50 to 500 um, resulting in a semiconductor device
`with a relatively high overall thickness. The adhesive must
`also allow both the element-forming layer and substrate to
`adhere (be joined). Furthermore, differences in the coeffi-
`cient of thermal expansion between the layers including the
`adhesive can cause warping and cracks, possibly lowering
`the heat resistance (reliability) of semiconductor application
`devices.
`
`SUMMARY OF THE INVENTION
`
`An object of the present invention is thus to provide a
`semiconductor device without an adhesive layer for semi-
`conductor devices which are produced using a technique for
`peeling an element-forming layer from a heat-resistant sub-
`strate to transfer the layer to another substrate.
`Another object of the present invention is to produce a
`thinner semiconductor device from a semiconductor device
`
`produced by a manufacturing process involving the use of a
`separation and transfer technique.
`Another object of the present invention is to produce a
`semiconductor device with better heat resistance from a
`
`semiconductor device produced by a manufacturing process
`involving the use of a pooling and transfer technique.
`A first method for transferring an element in the present
`invention in order to achieve the aforementioned objects
`
`10
`
`15
`
`20
`
`30
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`2
`comprises the steps of forming a peeling layer in which the
`bonding force weakens under certain conditions on an
`element-forming substrate for forming an element; forming
`an element-forming layer including an element on the peel-
`ing layer; joining the element-forming layer by means of a
`dissolvable bonding layer to a temporary transfer substrate;
`weakening the bonding force of the peeling layer to peel the
`element-forming layer from the element-forming substrate,
`and moving the layer to the temporary transfer substrate
`side; applying resin onto the element-forming layer which
`has been moved to the temporary transfer substrate, and
`curing the resin to form a transfer substrate; and dissolving
`the bonding layer to peel the temporary transfer substrate
`from the transfer substrate.
`
`Such a structure can be produced to join the transfer
`substrate and the element-forming substrate without an
`adhesive layer between them, thus allowing a thinner semi-
`conductor device to be formed. Because the conventional
`three-layer structure involving an element-forming layer
`(such as a thin-film transistor), an adhesive layer (adhesive),
`and a transfer substrate (plastic substrate) can be converted
`to a two-layer structure (element-forming layer,
`transfer
`substrate),
`it
`is easier to ensure that
`the coefficients of
`thermal expansion of the layers are closer together in order
`to minimize warpage and cracks.
`in the
`A second method for
`transferring an element
`present invention comprises the steps of forming a peeling
`layer in which the bonding force weakens under certain
`conditions on an element-forming substrate for forming an
`element; forming an element-forming layer including an
`element on the peeling layer; applying resin onto the
`element-forming layer, and curing the resin to form a
`transfer substrate; and weakening the bonding force of the
`peeling layer to peel the element-forming substrate from the
`element-forming layer, and moving the element-forming
`layer to the transfer substrate side.
`Such a structure can be produced to join the transfer
`substrate and the element-forming substrate without an
`adhesive layer between them, thus allowing a thinner semi-
`conductor device to be formed. In this case, the element-
`forming layer can be formed with fewer steps.
`The present invention can also further comprise the step
`of opening contact holes in the element-forming layer to
`form a wired layer or electrode layer, and can thus include
`elements and wiring/electrodes or the like on the inverted
`element-forming layer.
`In the present invention, “element” includes TFT, diodes,
`resistors,
`inductors, capacitors, and other unit elements,
`whether active or passive elements, of any structure, shape,
`or size.
`
`In the present invention, “peeling layer” is preferably a
`peeling layer in which the bonding force between atoms or
`molecules is lost or diminished when irradiated by light such
`as laser beams, resulting in peeling, and is made of a
`material that undergoes such peeling.
`least one
`The peeling layer is preferably made of at
`material selected from the group consisting of amorphous
`silicon, silicon nitride, and metals, and may also be a
`multilayered film made of a combination thereof. This
`makes it easier to bring about separation in the peeling layer
`and in the interface between the peeling layer and adjacent
`layers. For example, silicone nitride contains nitrogen, and
`the nitrogen separated when irradiated with light
`rays,
`weakening the bonding force between molecules.
`the
`The peeling layer preferably includes hydrogen.
`hydrogen will thus separate (become a gas) when irradiated
`with light rays, weakening the bonding force between mol-
`ecules.
`
`TSMC-1002
`
`
`
`US 6,814,832 B2
`
`3
`The bonding layer is preferably a liquid dissolvable
`adhesive such as a water-soluble adhesive, which dissolves
`away when washed with water.
`The present invention also relates to a method for pro-
`ducing an element, comprising the steps in the aforemen-
`tioned method for transferring an element. It also relates to
`an integrated circuit produced by such a transfer method.
`In the present invention, “integrated circuit” refers to a
`circuit
`in which elements and wiring are integrated to
`perform a certain function. For example, “integrated circuit”
`refers to circuits comprising a plurality of active elements
`(such as thin-film transistors) or passive elements (such as
`resistors and capacitors) formed on the same substrate (in
`the present invention, the final transfer substrate) by means
`of a chemical technique such as ion implantation, diffusion,
`or photoetching. Such circuits are classified, depending on
`the degree of integration, into small-scale integrated circuits
`(such as NAND circuits and NOR circuits), medium-scale
`integrated circuits (such as counters and resistor circuits),
`and large-scale integrated circuits (such as memory,
`microprocessors, and DSP).
`The present invention also relates to circuit boards pro-
`duced by the aforementioned method for transferring an
`element. Examples include a circuit board comprising ele-
`ments disposed in a plurality of two-dimensionally disposed
`pixel electrodes, such as an active matrix substrate, which
`has been produced by the aforementioned method for trans-
`ferring an element.
`The present invention also relates to an electro-optical
`device comprising such a circuit board.
`As used here, “electro—optical device” generally refers to
`devices with electro-optical elements which emit light or
`modify light from elsewhere by means of electrical action,
`and include both those that emit light themselves and those
`that control
`the transmission of light
`from elsewhere.
`Examples include active matrix types of displays equipped
`with electro-optical elements such as liquid crystal elements,
`electrophoresis elements, EL (electroluminescence)
`elements, and electron-emitting elements that emit
`light
`when electrons produced by the application of an electrical
`field come into contact with a light-cmitting board. Such
`devices are not limited to these, of course.
`The present invention also relate to an electronic appli-
`ance produced by the aforementioned method for transfer-
`ring an element.
`As used here, “electronic appliance” generally refers to
`devices that have a certain function as a result of a combi-
`nation of a plurality of elements or circuits. Although the
`structure is not particularly limited, examples include IC
`cards, cellular
`telephones, video cameras, personal
`computers, head-mounted displays, rear or front projectors,
`as well as FAX machines with display functions, digital
`camera finders, portable TV, DSP devices, PDA, electronic
`organizers, electronic signs, and displays for advertising
`announcements.
`
`BRIEF DESCRIPTION OF THE DRAWINGS
`
`FIGS. 1A through 1E are cross sectional views of the
`production process illustrating a first embodiment of the
`present invention;
`FIGS. 2A through 2E are cross sectional views of the
`production process illustrating a second embodiment of the
`present invention;
`FIGS. 3A through 3D are cross sectional views of the
`production process illustrating the second embodiment of
`the present invention;
`
`10
`
`15
`
`20
`
`30
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`4
`FIGS. 4A through 4C are examples of integrated circuits
`relating to the present invention, where FIG. 4A is a plan,
`FIG. 4B is a partial cross sectional detail of the use of the
`first embodiment, and FIG. 4C is a partial cross sectional
`detail of the use of the second embodiment;
`FIG. 5 is a connection diagram of an active matrix
`substrate and electro-optical device relating to the present
`invention;
`FIGS. 6A through 6F are examples of electronic appli-
`ances relating to the present invention, where FIG. 6A shows
`a cellular telephone, FIG. 6B a video camera, FIG. 6C a
`portable personal computer, FIG. 6D a head-mounted
`display, FIG. 6E a rear projector, and FIG. 6F a front
`projector; and
`FIG. 7 is a schematic oblique view illustrating the struc-
`ture of an IC card relating to the present invention.
`
`DESCRIPTION OF THE PREFERRED
`EMBODIMENTS
`
`Preferred embodiments of the present invention are illus-
`trated below with reference to the drawings.
`First Embodiment
`
`The first embodiment of the present invention relates to a
`first method for
`transferring an element,
`in which an
`element-forming layer is joined by means of a dissolvable
`bonding layer to a temporary transfer substrate, resin is
`applied to the element-forming layer when it has been
`transferred to the temporary transfer substrate to form a
`transfer substrate, and the bonding layer to which it is joined
`is dissolved to peel the temporary transfer substrate from the
`transfer substrate. That is, the first embodiment relates to a
`method in which the transfer substrate serving as the final
`substrate is formed after the layer has been transferred, and
`the substrate to which the layer was initially transferred is
`then removed.
`
`FIGS. 1A through 1E illustrate the process (steps) for
`producing an element in the first embodiment of the inven-
`tion.
`
`First, as illustrated in FIG. 1A, a light-transmitting heat-
`resistant substrate 1 such as quartz glass that is resistant up
`to about 1000° C., for example, is made into an element-
`forming substrate.
`The element-forming substrate 1 used here should have
`light-transmitting properties permitting light to pass through
`it. This will allow light to pass through the substrate to the
`peeling layer, ensuring rapid and proper separation of the
`peeling layer. The light transmittance should be at least 10%,
`and preferably at
`least 50%. The higher the light
`transmittance, the lower the light loss, allowing the peeling
`layer 2 to be separated with lower amounts of light.
`The substrate 1 should be made of a highly reliable
`material, and preferably a material with excellent heat
`resistance. That is because when the element-forming layer
`or interlayer described below, for example, is formed, the
`processing temperature is sometimes high (about 350 to
`1000° C., for example) depending on the type of layer or the
`forming method, but if the element-forming substrate 1 has
`excellent heat resistance in such cases,
`the film-forming
`conditions such as the temperature conditions can be
`adjusted within a wider range when the element-forming
`layer or the like is formed on the substrate 1. This will allow
`a desired high-temperature process to be used, and will
`allow more reliable high-performance elements and circuits
`to be produced when forming multiple elements or circuits
`on the element-forming substrate.
`
`TSMC-1002
`
`
`
`US 6,814,832 B2
`
`5
`Accordingly, the element-forming substrate 1 should be
`made of a material with a strain point that is at least Tmax,
`where Tmax is the maximum temperature during the for-
`mation of the element-forming layer. Specifically, the struc-
`tural material of the element-forming substrate 1 should
`have a strain point of at least 350° C., and preferably at least
`500° C. Examples of such materials include heat resistant
`glass such as quartz glass, Corning 7059, and NEC Glass
`OA—2.
`
`Although the thickness of the element-forming substrate
`1 is not particularly limited, it should normally be about 0.1
`to 5.0 mm, and preferably about 0.5 to 1.5 mm. That is
`because light loss is less likely to occur in cases where a
`thicker substrate 1 has greater strength and a thinner sub-
`strate has a lower substrate 1 transmittance. Element-
`forming substrates 1 with higher light transmittance may be
`thicker than the aforementioned maximum range.
`The element-forming substrate 1 should be of a uniform
`thickness in order to allow uniform light radiation.
`The element-forming substrate thus involves a number of
`conditions, but because it can be used repeatedly, even if the
`material is relatively expensive, it is possible to minimize
`increases in manufacturing costs by reusing the material.
`That is, since the element-forming substrate is not a part
`of the final product, a suitable material for forming the
`elements can be selected without
`limiting the strength,
`thickness, weight, and cost of the final product.
`A material that results in separation within the layer or at
`the interface (“intra-layer separation” or “interfacial
`separation”) when irradiated with light such as laser light
`should be selected for the peeling layer 2. That is, irradiation
`with light of a certain intensity should eliminate or diminish
`the bonding force between the atoms or molecules forming
`the structural material, resulting in ablation and peeling. The
`light irradiation sometimes results in the release of gas from
`the peeling layer 2, leading to separation. When the com-
`ponents contained in the peeling layer 2 are converted to gas
`and released, resulting in separation,
`the peeling layer 2
`sometimes absorbs the light and is converted to a gas, and
`vapor is released, resulting in separation.
`A through E below are examples of such a peeling layer
`2 composition.
`A. Amorphous Silicon (a-Si)
`Amorphous silicone may contain hydrogen (H). In such
`cases, the H content should be about 2 atomic % or more,
`and preferably about 2 to 20 atomic %. When the hydrogen
`(H) content
`is at
`the prescribed level,
`the hydrogen is
`released when irradiated with light,
`internal pressure is
`produced in the peeling layer 2, resulting in force sufficient
`to separate the upper and lower thin films. The hydrogen (H)
`content of the amorphous silicon can be adjusted by setting
`suitable film-forming conditions, such as CVD gas
`composition, gas pressure, gas atmosphere, gas flow rate,
`temperature, substrate temperature, and power supply.
`Amorphous silicon has good light absorption, allows films
`to be readily made, and is highly practical. The peeling layer
`can thus be composed of amorphous silicon for the inex-
`pensive formation of peeling layers that properly separate
`when irradiated with light.
`B. Silicon Oxide or Silicon Oxide Compounds, Titanium
`Oxide or Titanium Oxide Compounds, Zirconium Oxide or
`Zirconium Oxide Compounds, Tantalum Oxide or Tantalum
`Oxide Compounds, or Various Other Oxide Ceramics,
`Dielectrics (Ferroelectrics) or Semiconductors
`Examples of silicon oxide include SiO, SiOz, and Si3Oz;
`examples of silicon oxide compounds include KZSiO3,
`LiZSiO3, CaSiO3, ZrSiO4, and NaZSiO3.
`
`10
`
`15
`
`20
`
`30
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`6
`Examples of titanium oxide include TiO, TizO3, and TiOz;
`examples of titanium oxide compounds include BaTiO4,
`BaTiO3, BazTiQOZO, BaTist, CaTiO3, SrTiO3, PbTiO3,
`MgTiO3, ZrTiOz, SnTiO4, AlzTiOs, and FeTiO3.
`Examples of zirconium oxide include ZrOz; and examples
`of zirconium oxide compounds BaZrO3, ZrSiO4, PbZrO3,
`MngO3, K2ZrO3.
`The layer is preferably composed of silicon containing
`nitrogen. That is because, when silicon containing nitrogen
`is used for the peeling layer, the nitrogen is released when
`irradiated with light, thus promoting the separation of the
`peeling layer.
`C. PZT, PLZT, PLLZT, PBZT and Similar Ceramics or
`Dielectrics (Ferroelectrics)
`D. Nitride Ceramics Such as Silicon Nitride, Aluminum
`Nitride, and Titanium Nitride
`E. Examples of organic polymer materials include those
`with bonds such as —CH—, —CO— (ketones),
`—CONH— (amides), —NH— (imides), —COO— (esters),
`—N=N— (azo), and —CH=N— (schiff) (such bonds are
`cleaved by light radiation), particularly any with an abun-
`dance of such bonds. the organic polymer material may also
`have aromatic hydrocarbons (1 or more benzene rings or
`condensed rings thereof) in the structural formula.
`Specific examples of such organic polymer materials
`include polyolefins such as polyethylene and polypropylene,
`and polyimides, polyamides, polyesters, polymethyl meth-
`acrylates (PMMA), polyphenylene sulfides (PPS), polyether
`sulfones (PES), and epoxy resins.
`F. Metals
`
`Metals include Al, Li, Ti, Mn, In, Sn, Y, La, Ce, Nd, Pr,
`Gd, Sm or alloys including at least one metal among the
`above.
`
`The peeling layer can also be composed of an alloy
`containing hydrogen. That is because exposing a peeling
`layer made of an alloy containing hydrogen to light will
`result in the release of the hydrogen, thereby promoting the
`separation of the peeling layer.
`The peeling layer can consist of multiple films. A multi-
`layer film can consist, for example, of an amorphous silicon
`film and a metal film formed thereon. Materials for multi-
`
`layer films can include at least material from among the
`aforementioned ceramics, metals, and organic polymer
`materials. When the peeling layer is thus made of a multi-
`layer film or a combination of different materials, exposure
`to light results in the release of hydrogen gas or nitrogen gas,
`thereby promoting the release of the peeling layer, in the
`same manner as amorphous silicon.
`The thickness of the peeling layer 2 will vary depending
`on the purpose of the separation and conditions such as the
`composition of the peeling layer 2,
`layer structure, and
`forming method, but should usually be about 1 nm to 20 um,
`preferably about 10 nm to 2 pm, and even more preferably
`about 40 nm to 1 ,um. A thicker peeling layer 2 will preserve
`film uniformity and will result
`in fewer separation
`irregularities, whereas a thinner layer will allow less light
`power (amount of light) to be used in order to ensure good
`separation in the peeling layer 2, and will take less time for
`the subsequent removal of the peeling layer. The thickness
`of the peeling layer 2 should be as uniform as possible.
`The method for forming the peeling layer 2 is not par-
`ticularly limited, provided that it allows the peeling layer 2
`to be formed with a uniform thickness, and may be selected
`according to the film composition and conditions such as the
`film thickness. Examples include various vapor phase film-
`
`TSMC-1002
`
`
`
`US 6,814,832 B2
`
`7
`
`forming methods such as CVD (including MOCVD, low
`pressure CVD, and ECR-CVD), deposition, molecular beam
`deposition (MB), sputtering, ion plating, and PVD, various
`plating methods such as electroplating, dipping, and elec-
`troless plating, coating methods such as the Langmuir-
`Blodgett method, spin coating, spray coating, and roll
`coating, various types of printing methods, transfer methods,
`ink jet coating methods, and powder jet methods, as well as
`combinations of two or more of the above.
`
`For example, when the composition of the peeling layer
`2 is an amorphous silicon (a-Si),
`the film is preferably
`formed by CVD, particularly low pressure CVD or plasma
`CVD.
`
`When the peeling layer 2 is made of a ceramic by a sol-gel
`method, the film should be formed by a coating method,
`particularly spin coating.
`Although not shown in FIG. 1A, an interlayer may be
`placed between the element-forming substrate 1 and the
`peeling layer 2 in order to improve the adhesion between the
`two according to the properties of the substrate 1 and peeling
`layer 2. The interlayer serves at least one function such as
`the function of a protective layer for physically or chemi-
`cally protecting the layer that is to be transferred during
`manufacture or use, an insulating layer, a barrier layer to
`prevent components from migrating to or from the layer that
`is to be transferred, or a reflection layer.
`The composition of the interlayer may be selected accord-
`ing to the intended purpose. Examples include silicon oxide
`such as SiO2 in the case of interlayers formed between a
`layer that is to be transferred and a peeling layer formed of
`amorphous silicon. Examples of other interlayer composi-
`tions include metals such as Pt, Au, W, Ta, Mo, Al, Cr, Ti,
`or alloys based thereon.
`The interlayer thickness may be determined according to
`the purpose for which it is formed. It should normally be
`about 10 nm to 5 pm, and preferably about 40 nm to 1 pm.
`A thicker interlayer will preserve film uniformity and will
`result in fewer adhesion irregularities, whereas a thinner
`interlayer will result in lower loss of the light transmitted to
`the peeling layer.
`Methods for forming the interlayer can include the vari-
`ous methods described for the peeling layer 2. The interlayer
`can be formed of a single layer, or can be formed of two or
`more layers using a plurality of materials with the same or
`different composition.
`An element-forming layer 3 including an element is then
`formed on the peeling layer 2. The element-forming layer 3
`may include TFT or other active or passive elements, or a
`circuit comprising a combination thereof. Things that can be
`formed with the element-forming layer 3 include individual
`elements, individually functioning chips such as integrated
`circuits, and parts of circuits which do not function indi-
`vidually between the two but which function independently
`in combination with other elements or circuits. As such, the
`structure and size are not limited.
`
`It is particularly desirable in the present invention to form
`an integrated circuit composed of a plurality of thin-film
`elements with the element-forming layer 3. A process at a
`certain elevated temperature is required to produce a thin-
`film element, and the substrate on which the thin-film
`elements are formed must meet a variety of conditions, as
`with the element-forming substrate 1. The final
`transfer
`substrate serving as the final product can provide a flexible
`substrate, for example. In the production of such thin-film
`elements, the requirements for the final substrate and the
`conditions required of the substrate for producing the thin-
`
`10
`
`15
`
`20
`
`30
`
`35
`
`40
`
`45
`
`50
`
`55
`
`60
`
`65
`
`8
`film element can be mutually contradictory, but the method
`for transferring an element according to the present inven-
`tion can be used to produce a thin-film element with a
`substrate that meets the manufacturing conditions, and the
`thin-film element can then be transferred to a transfer
`
`substrate that does not meet such manufacturing conditions.
`Examples of such thin-film elements include TFT as well
`as thin-film diodes, photoelectric converter elements com-
`prising a silicon PIN junction (sensors and solar cells),
`silicon resistor elements, and other thin-film semiconductor
`devices, electrodes (i.e. transparent electrodes such as mesa
`films and ITO), switching elements, memory, low voltage
`elements, actuators such as piezoelectric elements, micro-
`mirrors (piezo thin-film ceramics), magnetic recording thin-
`film heads, coils, inductors, resistors, capacitors, thin-film
`high-permeability materials and micromagnetic devices
`combined with them, filters, reflecting films, and dichroic
`mirrors.
`
`In this embodiment, a thin-film transistor is included in
`the formation of the element-forming layer 3. That is, as
`shown in FIG. 1A, the element-forming layer 3 comprises a
`thin-film transistor composed of an insulation layer 31 such
`as a silicon oxide film, a silicon layer 32 including an
`impurity-doped source/drain region, a gate insulating film
`33, a gate wiring film 34, an interlayer insulating film 35, a
`source/drain wiring film 36, and the like.
`FIG. 3 illustrates a method for manufacturing a thin-film
`transistor T as an example of a method for producing the
`element-forming layer 3.
`First, as shown in FIG. 3A, an SiO2 film is deposited on
`the element-forming substrate 1 to form an insulating layer
`31, which is an underlayer. Examples of methods for form-
`ing an SiO2 film include well-known methods such as
`plasma enhanced chemical vapor deposition (PECVD), low
`pressure chemical vapor deposition (LPCVD), sputtering or
`similar vapor deposition. A 1 pm thick insulating layer 31
`can be formed, for example, using PECVD. A silicon layer
`32 is then formed using a well-known method such as
`LPCVD. The silicon layer 32 is patterned and formed into
`the configuration of the semiconductor region of a thin-film
`transistor.
`
`Next, as shown in FIG. 3B, a gate insulating film 33 of
`SiOz, for example, is formed by a prescribed method, such
`as electron cyclotron resonance-PECVD (ECR-CVD), par-
`allel plate PECVD, or LPCVD.
`thin film of a
`Then, as shown in FIG. 3C, a metal
`prescribed gate metal such as tantalum or aluminum is
`formed by sputtering, and is then patterned to form a gate
`wiring film 34. The gate wiring film 34 is then used as a
`mask for the ion implantation of impurities serving as a
`donor or acceptor, and source/drain and channel regions are
`produced in a self-aligned manner relative to the gate wiring
`film 34 on the patterned silicon layer 32. In order to produce
`an NMOS transistor,
`for example, phosphorus (P)
`is
`implanted as the impurity element at
`the prescribed
`concentration, such as a concentration of 1><1016 cm'z, in the
`source/drain region. The impurity is then activated by the
`application of suitable energy, such as with an XeCl excimer
`laser at a radiation energy density of about 200 to 400
`mJ/cm2 or a heat treatment at a temperature of about 250 to
`450° C.
`
`Then, as shown in FIG. 3D, an interlayer insulating film
`35 is formed with about 500 nm SiO2 or the like by a
`prescribed method such as PECVD on the upper surface of
`the gate wiring film 34 and gate insulating film 33. Contact
`holes reaching the source/drain region are then provided in
`
`TSMC-1002
`
`
`
`US 6,814,832 B2
`
`9
`the insulating films 33 and 35, and aluminum or the like is
`deposited by a prescribed method such as sputtering in and
`around the contact holes to form a wiring film 36 for
`patterning.
`A thin-film transistor T can be formed in the aforemen-
`
`tioned step, but various other well-known techniques can
`also be used as the method for forming the element.
`An SiO2 film was used as the insulating layer 31 serving
`as the underlayer in contact with the peeling