(19) Japanese Patent Office (JP)
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`(12) Publication of Unexamined Patent Application (A)
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`(11) Disclosure number
`H9-179130
`(43) Date of disclosure July 11, 1997
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`(51) Int.Cl.6
`G02F
`1/1339
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`1/1343
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`ID symbol
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`JPO file No.
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`Request for examination not filed Number of claims: 23 FD
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`Tech. Indic.
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`(14 pages in all)
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`(21) Application number
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`(22) Filing date
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`(54) [Title of Invention] Liquid crystal display device
`
`(57) [Abstract]
`[Problem] To improve the yield and reliability of a liquid
`crystal display device by making the level difference of the
`sealant uniform.
`[Solution means] The starting film of the scan lines is
`patterned, square-pillar-shaped first-layer dummy wiring
`301 that is not electrically connected is formed on region
`R1 and region R2, wiring 302 that extends from the pixel
`part is formed in region R3, and wiring 303, which has a
`connection terminal part 303a, is formed in region R4.
`After an inter-layer insulating film is formed on these
`surfaces, the starting film of the signal line is patterned,
`second-layer dummy wiring 304 is formed so as to close
`the gap between wirings 301 to 303, and the wiring 303 is
`connected with wiring 305, which extends from the pixel
`part. As a result, the cross-sectional composition along line
`A-A’ in a sealant formation region 107 can be made
`uniform.
`
`
`
`Pat. Appl. H7-350229 [1995]
`
`
`
`July 12, 1995
`
`000153878
`Semiconductor Energy Laboratory
`Co., Ltd.
`398 Hase, Atsugi-shi, Kanagawa-ken
` Hiroisa Hari
`in Semiconductor Energy Laboratory
` Co., Ltd.
`398 Hase, Atsugi-shi, Kanagawa-ken
`
`
`(71) Applicant
`
`
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`(72) Inventor
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`
`CMI Exhibit 1006
`1
`
`

`

`
`
`
`1
`
`(2)
`
`Unexamined patent H9-197130
`2
`
`[Claims]
`[Claim 1] In a liquid crystal display device that has
`an element substrate that has a matrix circuit;
`a facing substrate that faces the element substrate; and
`sealant for bonding together the element substrate and the
`facing substrate,
`a liquid crystal display device that is characterized in that in
`the element substrate, a substrate spacing correction means
`that has a laminated structure of at least one layer is
`disposed in the region in which the sealant is formed.
`[Claim 2] In claim 1, a liquid crystal display device that is
`characterized in that the substrate spacing correction means
`includes at least a support member made of the same
`material as the wiring of the matrix circuit.
`[Claim 3] In claim 1, a liquid crystal display device that is
`characterized in that the matrix circuit has a layered wiring
`structure that is insulated in each layer by an insulating film,
`and the substrate spacing correction means at least has the
`same laminar structure as the layered wiring.
`[Claim 4] In claim 1, a liquid crystal display device that is
`characterized in that the maximum value of the thickness of
`the substrate spacing correction means is approximately
`equal to the maximum value of the thickness of the matrix
`circuit.
`[Claim 5] In the element substrate recited in claim 1, a
`liquid crystal display device that is characterized in that a
`peripheral circuit for driving the matrix circuit is disposed
`between the matrix circuit and the sealant.
`[Claim 6] In a liquid crystal display device that has
`an element substrate that has a matrix circuit that is
`disposed in a matrix form, has signal lines and scan lines
`that are separated into layers by a first inter-layer insulating
`film, is disposed at the intersections of the signal lines and
`the scan lines, and has pixel electrodes separated into layers
`with the signal lines by a second inter-layer insulating film,
`as well as a peripheral drive circuit for controlling the
`matrix circuit;
`a facing substrate that faces the element substrate; and
`sealant for surrounding the matrix circuit and bonding
`together the element substrate and the facing substrate,
`a liquid crystal display device that is characterized in that in
`the element substrate it has, in the sealant formation region,
`at least a first support means made of the same material as
`the signal lines, a second support means made of the same
`material as the first inter-layer insulating film and the
`signal lines, and a substrate spacing correction means in
`which the second inter-layer insulating films are formed in
`mutually different layers.
`[Claim 7]
` A liquid crystal display device that is
`characterized in that, in the element substrate recited in
`claim 6, the peripheral circuit for driving the matrix circuit
`is disposed between the matrix circuit and the sealant.
`[Claim 8]
` A liquid crystal display device that is
`characterized in that, in the substrate spacing correction
`means recited in claim 6, the end face of the first support
`member and the end face of the second support member do
`not overlap.
` A liquid crystal display device that is
`[Claim 9]
`characterized in that the substrate spacing correction means
`recited in claim 6 at least has in the matrix the same
`laminar structure as in the region where the signal lines and
`the scan lines overlap.
`
`[Claim 10] A liquid crystal display device that is
`characterized in that, in claim 6, the maximum value of the
`thickness of the substrate spacing correction means is
`approximately equal to the maximum value of the thickness
`of the matrix circuit.
`[Claim 11] A liquid crystal display device that is
`characterized in that, in claim 6, the wiring for connecting
`the circuit disposed inside the sealant, the circuit disposed
`outside the sealant on the element substrate, or the circuit
`outside the element substrate, is formed integrally with the
`first support member, and the first support member extends
`to the outside of the sealant.
`[Claim 12] A liquid crystal display device that is
`characterized in that, in claim 6, the wiring for connecting
`the circuit disposed inside the sealant, the circuit disposed
`outside the sealant on the element substrate, or the circuit
`outside the element substrate, is connected inside the
`sealant with the first support member, and the first support
`member extends to the outside of the sealant.
`[Claim 13] A liquid crystal display device that is
`characterized in that, in claim 6, the second support
`member is not electrically connected with the circuit that is
`disposed inside the sealant, the circuit that is disposed
`outside the sealant on the element substrate, and the circuit
`outside the element substrate.
`[Claim 14] A liquid crystal display device that is
`characterized in that, in the substrate spacing correction
`means recited in claim 6, in the first support member the
`linear wiring is disposed with equal spacing, and in the
`second wiring layer the linear wiring that is parallel to the
`signal lines or scan lines is disposed with equal spacing in
`the gaps of the first wiring layer.
`[Claim 15] A liquid crystal display device that is
`characterized in that, in claim 6, the first support member
`has a shape that zigzags approximately equally with the
`width of the sealant.
`[Claim 16] A liquid crystal display device that is
`characterized in that, in claim 6, in the first support member,
`the pitch of the rix second support member is roughly equal
`to the pitch of the pixel electrodes.
`[Claim 17] A liquid crystal display device that is
`characterized in that that matrix circuit recited in claim 6
`has pixel electrodes that are connected to the signal lines
`and thin-film transistors that drive the pixel electrodes; the
`first support member is formed simultaneously with the
`scan lines; and the second support member is formed
`simultaneously with the signal lines.
`[Claim 18] In a liquid crystal display device that has
`an element substrate that has a matrix circuit that is
`disposed in a matrix form, has signal lines and scan lines
`that are separated into layers by a first inter-layer insulating
`film, is disposed at the intersections of the signal lines and
`the scan lines, and has pixel electrodes separated into layers
`with the signal lines by a second inter-layer insulating film,
`as well as thin-film transistors for driving the pixel
`electrodes, as well as a peripheral drive circuit for
`controlling the matrix circuit;
`a facing substrate that faces the element substrate; and
`sealant for surrounding the matrix circuit and bonding
`together the element substrate and the facing substrate,
`a liquid crystal display device that is characterized in that in
`the element substrate it has, in the sealant formation region,
`
`CMI Exhibit 1006
`2
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`

`

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`3
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`(3)
`
`Unexamined patent H9-197130
`4
`
`at least a support means made of the same material as the
`scan lines, and a substrate spacing correction means in
`which the first inter-layer insulating film and the second
`inter-layer insulating film are formed in mutually different
`layers.
`[Claim 19] A liquid crystal display device that is
`characterized in that, in the element substrate recited in
`claim 18, a peripheral circuit for driving the matrix circuit
`is disposed between the matrix circuit and the sealant.
`[Claim 20] A liquid crystal display device that is
`characterized in that, in claim 18, the wiring for connecting
`the circuit disposed inside the sealant, the circuit disposed
`outside the sealant on the element substrate, or the circuit
`outside the element substrate, is formed integrally with the
`support member, and the first support member extends to
`the outside of the sealant.
`[Claim 21] A liquid crystal display device that is
`characterized in that, in claim 18, the wiring for connecting
`the circuit disposed inside the sealant, the circuit disposed
`outside the sealant on the element substrate, or the circuit
`outside the element substrate, is connected to the support
`member inside the sealant, and the support member extends
`to the outside of the sealant.
`[Claim 22] A liquid crystal display device that is
`characterized in that, in claim 18, the support member is a
`linear member that has multiple branches along the edge of
`the element substrate.
`[Claim 23] It is characterized in that, in claim 22, the
`branches of the support member are formed inside the
`region in which the sealant is formed and outside the
`element substrate.
`[Detailed Description of the Invention]
`[0001]
`[Field of technology to which the invention belongs] The
`present invention concerns an active matrix type liquid
`crystal display device, and its purpose is to reduce the
`nonconformities that occur when substrates are attached
`together. In particular, it concerns a liquid crystal display
`device that is integral with it peripheral circuitry.
`[0002]
`[Prior art] In a conventional active matrix type liquid
`crystal display device, a display is obtained by controlling
`the transparence and other optical properties of a liquid
`crystal material that is sandwiched in between pixel
`electrodes, making use of the switching effects of two-
`terminal elements like MIMs [metal-insulator-metal] or
`three-terminal elements like TFTs [thin-film transistors],
`which are arranged in a pixel [picture element] part in a
`matrix layout. In general, TFTs, which use amorphous
`silicon, are widely used as switching elements for pixel
`electrodes.
`[0003] But because the electric field effect mobility of
`amorphous silicon is low, being about 0.1 cm/Vs to 1
`cm/Vs, a TFT that uses amorphous silicon cannot be
`disposed in a peripheral drive circuit that controls the TFTs
`that are connected to the picture element electrodes.
`[0004] Thus with a conventional active matrix type liquid
`crystal display device, a peripheral drive circuit made up of
`semiconductor integrated circuits is externally attached to
`the liquid crystal panel by a method such as tape automatic
`bonding (TAB) or chip-on-glass (COG).
`
`[0005] FIG. 16 is a front view of a sketch of an active
`matrix type liquid crystal panel in a first conventional
`example, in which a peripheral drive circuit is attached to
`the outside. As shown in FIG. 16, arranged in a matrix on
`an element substrate 1 of glass, quartz, or the like are scan
`lines 2 and signal lines 3, and, in the pixel part 4, connected
`to the intersections of this wiring are pixel electrodes and
`pixel TFTs for switching of the pixel electrodes. Each scan
`line 2 and signal line 3 extends to the outside of the sealant
`region 5, and because of this, the number of wiring lines
`that cross the sealant is only the number of scan lines 2 and
`signal lines 3. The ends of these wiring lines serve
`themselves as leader terminals 6, and peripheral circuitry,
`which is not pictured, is connected to the leader terminals 6.
`In addition, the element substrate 1 and a facing substrate,
`which is not pictured, are joined together by a sealant that
`is formed in the sealant region 5, and a liquid crystal
`material is sealed between these substrates by a sealant.
`[0006] Also, in recent years much research has been done
`in technology for fabricating TFTs using crystalline silicon
`in order to obtain a TFT which a high electric field effect
`mobility. With a TFT that makes use of crystalline silicon,
`faster operation is possible than with an amorphous silicon
`TFT, and with crystalline silicon, not just NMOS TFTs but
`also PMOS TFTs are obtained in the same way, making it
`possible to form a CMOS circuit. Therefore peripheral
`drive circuitry can be fabricated together with the display
`unit on the same substrate.
`[0007] FIG. 17 is a front view of a sketch of an active
`matrix type liquid crystal display device in a second
`conventional example, in which a peripheral drive circuit
`and the display unit are integrated in the panel. As shown
`in FIG. 17, a pixel part 12 is disposed on an element
`substrate 11 of glass, quartz, or the like, and around the
`pixel part 12, a signal line drive circuit 13 is provided on
`the upper side, and a scan line drive circuit 14 is provided
`on the left side. Signal lines 15 and scan lines 16 are
`connected to the signal line drive circuit 13 and the scan
`line drive circuit 14, respectively. The signal lines 15 and
`the scan lines 16 form a grid in the pixel part 12, and ends
`that are not connected to the signal line drive circuit 13 and
`the scan line drive circuit 14 extend as far as the outside of
`the sealant region 17, and control circuitry, power source,
`and the like, which are not pictured, are connected. Also,
`the element substrate 11 and the facing substrate 18 are
`bonded together by a sealant that is formed in the sealant
`region 17, and a liquid crystal material is sealed between
`these substrates 11 and 18 by a sealant form. In addition,
`an external terminal 19 is provided on the element substrate
`11.
`[0008]
`[Problems that the invention is to solve] In the first
`conventional example shown
`in FIG. 16,
`the wiring
`structure around the four sides of the pixel part 4 are
`symmetrical up-down and left-right as shown in the
`drawing, so the level difference of the seal unit is uniform,
`and thus the substrate spacing can be made equal.
`[0009] But with the first conventional example, there is the
`problem that because peripheral drive circuitry is connected
`outside of the sealant, a large number of wiring lines cross
`the sealant, moisture gets in from the interface between the
`sealant and the wiring that is connected to the pixel part
`
`CMI Exhibit 1006
`3
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`

`

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`5
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`(4)
`
`Unexamined patent H9-197130
`6
`
`from the drive circuit, and this degrades the liquid crystal
`display material. Also, because the peripheral drive
`circuitry is on the outside, the device itself is larger than it
`otherwise would be.
`[0010] In order to avoid these problems, in the second
`conventional example, shown in FIG. 17, which is an active
`matrix type liquid crystal display device of the type that is
`integrated with peripheral drive circuitry, a peripheral drive
`circuit is disposed inside the sealant region 17. Also, in
`general a one-side drive method is adopted, in which no
`redundant circuitry is provided. Because of this, as shown
`in FIG. 13, only the wiring lines on the right side and lower
`side of the element substrate 11 cross the sealant, so the
`wiring structure no longer has any up-down and left-right
`symmetry as would be shown in the drawing, and the level
`difference of the sealant is different on the peripheral drive
`circuit side and the side where the wiring lines extend.
`Therefore when the substrates are attached together, the
`pressure on the substrates is not uniform, making it difficult
`to make the substrate spacing uniform. This causes display
`unevenness, which reduces the picture quality.
`[0011] In particular, because the level difference of the
`sealant on the peripheral drive circuit side is low, when the
`substrates are attached together, the wiring might short out
`between top and bottom in the peripheral drive circuit,
`making it more likely for line defects to occur. These
`problems create new causes for lower yield and lower
`reliability in a liquid crystal display device that is
`integrated with a peripheral drive circuit.
`[0012] And in the pixel part, the part that juts out the
`farthest is the region where a scan line and a signal line
`overlap, and in this region what is laminated together is not
`just the scan lines, the signal lines, and the inter-layer
`insulating film for keeping them apart from each other, but
`also the pixel electrodes, the black matrix, and other parts.
`In general, cylindrical fibers for maintaining the substrate
`spacing are mixed into the sealant. The dimensions of the
`fibers are set, taking a margin into consideration, to values
`that combine the thickness of the protruding part of the
`pixel part and the dimensions of the spacers that are
`dispersed within the sealant, so as to make the level
`difference of the sealant higher than the pixel part, but a
`spacer is disposed on the protruding part of a pixel part, this
`part will be higher than the sealant, so if the substrates are
`attached together in this state, because of the spacer the
`scan line and the signal line will short out between top and
`bottom, causing point defects and line defects.
`[0013] The purpose of the present invention is to solve the
`above problems by providing a liquid crystal display device
`that is integrated with a peripheral drive circuit and that
`offers excellent picture quality and high reliability.
`[0014]
`[Means for solving the problems] In order to solve the
`above problems, the composition of the liquid crystal
`display device of the present invention is characterized in
`that -- in a liquid crystal display device that has an element
`substrate that has a matrix circuit;
`a facing substrate that faces the element substrate; and
`sealant for bonding together the element substrate and the
`facing substrate -- in the element substrate, a substrate
`spacing correction means that has a laminated structure of
`
`at least one layer is disposed in the region in which the
`sealant is formed.
`[0015] Also, another composition of the present invention
`is characterized in that -- in a liquid crystal display device
`that has an element substrate that has a matrix circuit that is
`disposed in a matrix form, has signal lines and scan lines
`that are separated into layers by a first inter-layer insulating
`film, is disposed at the intersections of the signal lines and
`the scan lines, and has pixel electrodes separated into layers
`with the signal lines by a second inter-layer insulating film,
`as well as a peripheral drive circuit for controlling the
`matrix circuit; a facing substrate that faces the element
`substrate; and sealant for surrounding the matrix circuit and
`bonding together the element substrate and the facing
`substrate -- in the element substrate it has, in the sealant
`formation region, at least a first support means made of the
`same material as the signal lines, a second support means
`made of the same material as the first inter-layer insulating
`film and the signal lines, and a substrate spacing correction
`means in which the second inter-layer insulating films are
`formed in mutually different layers.
`[0016] In addition, another composition of the liquid
`crystal display device of
`the present
`invention
`is
`characterized in that -- in a liquid crystal display device that
`has an element substrate that has a matrix circuit that is
`disposed in a matrix form, has signal lines and scan lines
`that are separated into layers by a first inter-layer insulating
`film, is disposed at the intersections of the signal lines and
`the scan lines, and has pixel electrodes separated into layers
`with the signal lines by a second inter-layer insulating film,
`and thin-film transistors for driving the pixel electrodes, as
`well as a peripheral drive circuit for controlling the matrix
`circuit; a facing substrate that faces the element substrate;
`and sealant for surrounding the matrix circuit and bonding
`together the element substrate and the facing substrate -- in
`the element substrate it has, in the sealant formation region,
`at least a support means made of the same material as the
`scan lines, and a substrate spacing correction means in
`which the first inter-layer insulating film and the second
`inter-layer insulating film are formed in mutually different
`layers.
`[0017]
`[Embodiments of the invention] Embodiments of the
`present invention are described using the drawings. FIG. 1
`is a front view of a sketch of the element substrate of an
`active matrix type liquid crystal display device of this
`working example; peripheral circuits 103 and 102 and a
`display unit 102 are disposed on an element substrate 101.
`[0018] As shown in FIG. 1, on the right side and lower
`side as shown in the drawing, signal line 105 and scan line
`106 cut across the sealant formation region 107, but these
`wiring lines do not cut across in the sealant formation
`region 107 on the side of the peripheral circuits 103 and
`104. Because of this, in the present invention, a substrate
`spacing correction means is formed that makes the level
`difference of the lower structure of the sealant uniform.
`[0019] FIG. 6 is a cross-sectional view, in the sealant
`width direction, of a substrate spacing maintenance means.
`As shown in FIG. 6, first support members 301, 302, and
`303, which are made of the same material as the scan line
`106, first inter-layer insulating film 220, which separates
`the signal line 105 and the scan line 106, and second
`
`CMI Exhibit 1006
`4
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`

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`7
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`(5)
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`Unexamined patent H9-197130
`8
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`support member 304, which is made of the same material
`as the signal line 105, are laminated together. In particular,
`because it was arranged that there be no second support
`member 304 on top of the first support members 301, 302,
`and 303, the cross-sectional composition of the substrate
`spacing maintenance means along the edge of the sealant
`formation region 107 becomes constant, and thus the level
`difference of the sealant can be made uniform.
`[0020] FIG. 15 is a cross-sectional view, in the sealant
`width direction, of another substrate spacing maintenance
`means. As shown in FIG. 15, on the sealant formation
`region 107 are laminated first support members 301, 302,
`and 303, which are made of the same material as the scan
`line 106, a first inter-layer insulating film 220, which
`separates the signal line 105 and the scan line 106, and a
`second support member 701, which is made of the same
`material as the signal line 105. The region where the
`thickness of the matrix circuit is greatest is the region
`where the signal line 105 and the scan line 106 overlap,
`which is where at least the signal line, the inter-layer
`insulating film, the scan line, and a passivation film are
`laminated together on the element substrate. Therefore in
`the present invention, by adopting an arrangement in which
`the first support members 301, 302, and 303, and the
`second support member 701, are piled atop each other, the
`level difference of the substrate spacing holding means and
`the height of the region in which the thickness of the matrix
`circuit is at its maximum can be made approximately equal,
`and thus the level difference of the matrix circuit including
`spacers becomes lower than the sealant, so the pressure
`when attaching the substrates together can be supported by
`the sealant, and thereby it is possible, with the spacers, to
`prevent scan lines and signal lines from shorting out
`between top and bottom. Moreover, because the pixel
`electrodes, the black matrix, and the like are also laminated
`in the region where the signal line 105 and the scan line
`106 overlap, the pixel electrodes, black matrix, and the like
`may likewise be laminated in the substrate spacing
`formation means as well.
`[0021] FIG. 4 is a top view of a substrate spacing
`correction means; disposed in the sealant formation region
`107, in alternation with equal spacing, are the linear first
`support members 301, 302, and 303, and the second
`support member 304
`[0022] In the region R3 where the scan line that is
`extended from the matrix circuit crosses the sealant
`formation region 107, it is formed integrally with the first
`support member 302, and is extended to the outside of the
`sealant formation region 107. On the other hand, the signal
`line 305, which is extended from the matrix circuit 102, is
`connected inside the sealant formation region 107 to the
`first support member 303, which crosses the sealant
`formation region 107.
`[0023] In this way, with the present invention, because a
`wiring pattern that crosses the sealant formation region 107
`and is electrically connected with a circuit outside the
`element substrate consists only of the first support members
`302 and 303, the level difference of the sealant can be made
`more uniform.
`[0024] Also, as shown in FIG. 8, in the regions R1 and R2
`where the wiring from the matrix circuit 102 or from the
`peripheral circuits 103 and 104 does not cross the sealant
`
`formation region 107, it is formed in the shape of a square
`wave and is approximately equal to the width of the sealant
`formation region 107, without partitioning into sections the
`first wiring layer 401. In this way, because a first wiring
`layer is present in the cross-sectional composition in any
`width direction of the sealant formation region 107, the
`seeping in of moisture from the outside can be prevented.
`[0025] Also, in the present invention, the substrate spacing
`maintenance means is formed together with the thin-film
`transistors that drive the pixel electrodes, the first wiring
`layer is formed simultaneously with the signal lines, and
`the second wiring layer is formed simultaneously with the
`signal lines.
`[0026]
`[Working examples] The present invention is described in
`detail, referring to the working examples in the drawings.
`[0027] FIG. 1 is a front view of a sketch of the element
`substrate of an active matrix type liquid crystal display
`device of working examples 1 to 5; the display unit is made
`integral with the peripheral circuits. As shown in FIG. 1, a
`pixel part 102 is disposed on an element substrate 101 of
`glass, quartz, or the like, and around the pixel part 102, a
`signal line drive circuit 103 is provided on the top side, and
`a scan line drive circuit 104 is provided on the left side.
`The signal line drive circuit 103 and the scan line drive
`circuit 104 are connected to the pixel part 102 by signal
`lines 105 and scan lines 106, respectively, the signal lines
`105 and the scan lines 106 form a grid in the pixel part 102,
`and connected respectively in series to their intersections
`are a liquid crystal cell 111 and a pixel TFT 112. In the
`pixel TFT 112, the gate electrode is connected to the signal
`line 105, the source electrode is connected to the scan line
`106, and the drain electrode is connected to the electrode of
`a liquid crystal cell 111.
`[0028] In addition, a sealant region 107 is disposed so as to
`surround the pixel part 102, the signal line drive circuit 103,
`and the scan line drive circuit 104; the element substrate
`101 and a facing substrate that is not pictured are bonded
`together by the sealant that is formed in the sealant region
`107; and a liquid crystal material is sealed in between these
`substrates.
`[0029] On the right side and lower side as shown in the
`drawing, signal lines 105 and scan lines 106 are extended
`to outside the sealant formation region 107 and are
`connected to a panel external control circuit and the like.
`In addition, an external terminal 108 is provided on the
`element substrate 101, and the signal line drive circuit 103
`and the scan line drive circuit 104 are each connected to the
`external terminal 108 by a wiring line 109.
`[0030] [Working example 1] With this working example,
`in the active matrix type liquid crystal display device
`shown in FIG. 1, it is characterized in that in order to make
`the level difference of the sealant uniform, it is made
`uniform by disposing in the sealant formation region 107 a
`wiring pattern (dummy wiring structure) that is shaped
`from the starting films of signal lines 103 and scan lines
`104 and is substantially insulated electrically. Also, with
`this working example, such a wiring pattern is fabricated
`simultaneously with the TFTs that are arranged on the
`liquid crystal panel.
`[0031] Referring to FIG. 2 to 6, we describe the fabrication
`steps for the active matrix type liquid crystal panel of this
`
`CMI Exhibit 1006
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`9
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`(6)
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`Unexamined patent H9-197130
`10
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`working example. FIG. 2 shows, in a cross-sectional view,
`the fabrication steps for TFTs; on the left side of FIG. 2 are
`shown the fabrication steps for a drive circuit TFT that is
`disposed in the peripheral drive circuits (signal line drive
`circuit 203, scan line drive circuit 204), and on the right
`side are show the fabrications steps for a pixel TFT that is
`disposed in the pixel part 202.
`[0032] Also, shown in FIG. 3 to FIG. 6 are diagrams of the
`fabrication steps for the dummy wiring 301 of the first
`layer. FIG. 3 and FIG. 4 are schematic top views of the
`sealant formation region 107; this is an enlarged view of
`the regions R1 to R4 shown in the ovals in FIG. 1. And
`FIG. 5 and FIG. 6 are cross-sectional views along line A-A’
`in FIG. 3 and FIG. 4, respectively.
`[0033] In fabricating a TFT, as shown in FIG. 2(A), a
`silicon oxide film that is 1,000 to 3,000 Å thick is formed
`on a substrate 201, such as a quartz substrate, a glass
`substrate, or the like, as a substrate oxide film 202. As the
`method of making this silicon oxide film, one may use
`sputtering or plasma CVD [chemical vapor deposition] in
`an oxygen atmosphere.
`[0034] Next, plasma CVD or LPCVD [low-pressure CVD]
`is used to form an amorphous silicon film of thickness 300
`to 1,500 Å, and preferably 500 to 1,000 Å. Then the silicon
`film is crystallized by hot-annealing it at a temperature of at
`least 500ºC, and preferably 800 to 950ºC. Following
`crystallization by hot annealing, the crystallinity may be
`further increased by carrying out thermal annealing. Also,
`during crystallization by thermal annealing, nickel or
`another element that promotes the crystallization of silicon
`(a catalytic element) may be added, as described in
`unexamined patent H6-244103 [1994] and unexamined
`patent H6-244104 [1994].
`[0035] Next, the crystallized silicon film is etched,
`forming active layer 203 (for use in a P channel type TFT)
`for an island-shaped TFT in a peripheral circuit, 204 (N
`channel type TFT), and active layer 205 for a TFT of a
`matrix circuit (a pixel TFT). In addition, silicon oxide of
`thickness 500 to 2,000 Å is formed as a gate insulating film
`206 by sputtering in an oxygen atmosphere. Plasma CVD
`may be used as the method for forming the silicon oxide
`film. If the silicon oxide film is formed by plasma CVD, it
`is preferable to use dinitrogen monoxide (N2O) or oxygen
`(O2) and monsilane (SiH4) as the raw material gases.
`[0036] Following this, the starting film of the wiring in the
`first layer is formed.
` In this working example, a
`polycrystal silicon film of thickness 2,000 Å to 5 μm, and
`preferably 2,000 to 6,000 Å (including a minute quantity of
`phosphorus to raise the electrical conductivity), is formed
`by LPCVD. Then this is etched to form gate electrodes 207,
`208, and 209 (FIG. 2(A)).
`this working example,
`in
`