`
`CMI CORP. v. PATENT OF YOSHIHARU HIRAKATA and
`SHUNPEI YAMAZAKI
`
`IPR 2013—00068
`
`
`
`IIIIIIIIIIIIIIIIIIIIIIIIII‘IIIIIIIIIIIIIIIIllIIlIIIIIIIIIIIIIIIIIIIIIIIIIII
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`U5005995189A
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`United States Patent
`
`[19]
`
`Zhang
`
`[11] Patent Number:
`
`5,995,189
`
`[45] Date of Patent:
`
`Nov. 30, 1999
`
`[54] LIQUID-CRYSTAL DISPLAY DEVICE
`
`[75]
`
`Inventor: Hongyong Zhang, Kanagawa, Japan
`
`5,621,553
`4/1997 Nishiguchi et a1.
`.................... 349/153
`5,684,555 11/1997 Shiba et a1. .......... 349/149
`
`4/1998 Gmpp etal. ............................ 349/153
`5,745,208
`
`[73] Assignee: Semiconductor Energy Laboratory
`Co., Ltd., Kanagawa-ken, Japan
`
`Primary Exmniner—Tiep H. Nguyen
`Attorney, Agent, or Firm—Fish & Richardson
`
`
`
`[21] Appl. No.: 08/768,066
`
`[22]
`
`[30]
`
`Filed:
`
`Dec. 16, 1996
`
`Foreign Application Priority Data
`
`Dec. 21, 1995
`
`[JP]
`
`Japan .................................... 7-350229
`
`[51]
`
`[52] US. Cl.
`
`Int. Cl.6 ....................... GOZF 1/1339; GOZF 1/1345;
`GOZF 1/1333
`.......................... 349/153; 349/151; 349/122;
`345/206
`[58] Field of Search ..................................... 349/153, 151,
`349/122, 152; 345/206
`
`[56]
`
`References Cited
`U.S. PATENT DOCUMENTS
`
`5,148,301
`5,179,460
`5,396,356
`
`................ 349/153
`9/1992 Snwatsubashi et at.
`
`1/1993 Hinata et a1.
`........
`349/149
`3/1995 Fukuchi
`.................................. 349/153
`
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`ABSTRACT
`
`The present invention related to unifying steps of sealing
`material so that the yield and the reliability of a liquid—
`crystal display device become high. A starting film of
`scanning lines is patterned so that prismatic dummy wirings
`301 for the first layer which are not electrically connected
`are formed in regions R1 and R2, and wirings 302 extending
`from the pixel section are formed in a region R3, and wirings
`303 having connection end portions 303a are formed in a
`region R4. After an interlayer insulation film is formed on
`those surface, the starting film of the signal lines is patterned
`so that the dummy wirings 304 for the second layer are
`formed to embed the gaps between the Wirings 301 to 303,
`and also the wirings 305 and the wirings 303 which extend
`from the pixel portion are connected to each other. As a
`result, the cross-sectional structure along the line A-A' of the
`sealing material formation region 107 can be unified.
`
`23 Claims, 12 Drawing Sheets
`
` SIGN/ll. UNE
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`DRIVE CIRCUITSIDE
`REG/0N R2
`
`
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`SCANNING UNE DHIVE CIRCUIT SIDE
`REGION R1
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`SCANNING LINE DRIVE EXTENSIDN SIDE
`REGION H3
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`REGION H4
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`SIGNAL UNE EXTENSION SIDE
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`
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`US. Patent
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`N0v.30, 1999
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`Sheet 1 of 12
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`5,995,189
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`
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`108
`101
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`FIG. 1
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`US. Patent
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`N0v.30, 1999
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`Sheet 2 of 12
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`5,995,189
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`
`
`FIG, 2A
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`DRIVER CIRCUIT TFT->L— PIXEL TFT
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`US. Patent
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`Nov. 30, 1999
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`Sheet 3 of 12
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`5,995,189
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` SIGNAL LINE
`
`DRIVE CIRCUIT SIDE
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`REGION R2
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`SIGNAL LINE DRIVE CIRCUIT SIDE
`REGION R1
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`SIGNAL LINE EXTENSION SIDE
`REGION R3
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`303a
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`FIG. 3
`
`REGION R4
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`SIGNAL LINE EXTENSION SIDE
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`
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`US. Patent
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`Nov. 30, 1999
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`Sheet 4 0f 12
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`5,995,189
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`SIGNAL LINE
`
`DRIVE CIRCUIT SIDE
`
`REG/0N R2
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`SCANNING LINE DRIVE CIRCUIT SIDE
`REG/0N R7
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`SCANNING LINE DRIVE EXTENSION SIDE
`
`REG/0N R3
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`SIGNAL LINE EXTENSION SIDE
`
`REG/0N R4
`
`FIG. 4
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`
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`US. Patent
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`N0v.30, 1999
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`Sheet 5 0f 12
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`5,995,189
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`E301, 302, 303
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`FIG. 5
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`£01, 302, 303
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`FIG. 6
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`
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`US. Patent
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`N0v.30,1999
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`Sheet 6 of 12
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`5,995,189
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`SIGNAL L/NE DRIVE CIRCUIT SIDE
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`REGION R2
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`SIGNAL L/NE DRIVE CIRCUIT SIDE
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`SIGNAL LINE EXTENSION SIDE
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`REG/0N R1
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`REG/0N R3
`
`
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`SIGNAL LINE EXTENSION SIDE
`REGION R4
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`FIG. 7
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`
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`US. Patent
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`Nov. 30, 1999
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`Sheet 7 0f 12
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`5,995,189
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`SIGNAL LINE DRIVE CIRCUIT SIDE
`
`REG/0N R2
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`SIGNAL LINE DRIVE CIRCUIT SIDE
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`SIGNAL LINE EXTENSION SIDE
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`REG/0N R1
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`REG/0N R3
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`FIG. 8
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`US. Patent
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`Nov. 30, 1999
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`Sheet 8 0f 12
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`5,995,189
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`
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`PIXEL PORTION
`
`SIDE
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`7
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`US. Patent
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`N0v.30,1999
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`Sheet 9 of 12
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`5,995,189
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`FIG. 11
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`
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`US. Patent
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`Nov. 30, 1999
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`Sheet 10 of 12
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`5,995,189
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`301
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`
`
`PIXEL PORT/0N
`
`FIG. 12
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`US. Patent
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`Nov. 30, 1999
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`Sheet 11 of 12
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`5,995,189
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`
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`PIXEL PORT/0N
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`FIG. 14
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`FIG. 15
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`US. Patent
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`Nov} 30, 1999
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`Sheet 12 of 12
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`5,995,189
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`FIG. 16
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`(PRIOR ART)
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`71
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`' FIG. 17
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`(PRIOR ART)
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`5,995,189
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`1
`LIQUID-CRYSTAL DISPLAY DEVICE
`
`BACKGROUND OF THE INVENTION
`
`1. Field of the Invention
`
`The present invention relates to a liquid-crystal display
`device of the active matrix system for reducing failure
`occurring when bonding substrates, and more particularly to
`a peripheral circuit
`integral
`type 1iquid~crystal display
`device.
`
`2. Description of the Related Art
`Aconventional active matrix liquid-crystal display device
`is so designed as to control the optical characteristics such
`as a light transmission property of a liquid-crystal material
`which is held between a pair of pixel electrodes using the
`switching operation of a two~terminal element such as an
`MIM which is disposed in a pixel section in the form of a
`matrix or a three-terminal element such as a TFT, for display.
`In general, TFTs using amorphous silicon have been widely
`used for the switching element of the pixel electrodes.
`However, because the mobility of the electric field effect
`of amorphous silicon is low to the degree of 0.1 to 1 cm/Vs,
`the TFT using amorphous silicon cannot be disposed in a
`peripheral drive circuit that controls the TFT connected to
`the pixel electrode.
`For that reason, in the conventional active matrix liquid-
`crystal device, the peripheral drive circuit which is made up
`of a semiconductor integrated circuit is attached externally
`to a liquid-crystal panel through the tape automatic bonding
`(TAB) technique or the chip on glass (COG) technique.
`FIG. 16 is a front view showing the outline of an active
`matrix 1iquid~crystal panel in accordance with a first con-
`ventional example,
`to which a peripheral drive circuit is
`attached externally, As shown in FIG. 16, scanning lines 2
`and signal lines 3 are disposed on an element substrate 1
`made of, for example, glass or quartz in a matrix, and in a
`pixel section 4, pixel electrodes and a switching pixel TFT
`for the pixel electrodes are connected to each of the cross
`portions of those wirings. The scanning lines 2 and the signal
`lines 3 extend up to the outside of a sealing material region
`5, respectively, and for that reason, the number of wirings
`which are transverse to the sealing material is as much as the
`number of the scanning lines 2 and the signal lines 3 at the
`minimum. The ends of those wirings form extension termi—
`nals 6 as they are, and the extension terminals 6 are
`connected with a peripheral drive circuit not shown.
`Furthermore, the element substrate 1 is joined to an opposite
`substrate not shown through the sealing material disposed in
`the sealing material region 5, and a liquid—crystal material is
`interposed between those substrates through the sealing
`material.
`
`Also, in recent years, in order to obtain a TFI‘ with a large
`mobility of the electric field eifect, a technique for fabricat-
`ing the TFT using crystalline silicon has been intensively
`researched. The TFT using the crystalline silicon enables
`operation which is remarkably higher than that of an amor-
`phous silicon TFT, and not only a TFT of NMOS but also a
`TFT of PMOS are obtained from crystalline silicon in the
`same manner, thereby being capable of obtaining a CMOS
`circuit. Hence, a display section as well as the peripheral
`drive circuit can be fabricated on the same substrate.
`FIG. 17 is a front View showing the outline of an active
`matrix liquid-crystal display device in accordance with a
`' second conventional example, in which a peripheral drive
`circuit and a display section are integrated on a panel. As
`shown in FIG. 17, a pixel section 12 is disposed on an
`
`2
`element substrate 11 made of, for example, glass or quartz,
`and a signal line drive circuit 13 is disposed on an upper side
`of the pixel section 12 around the pixel section 12, and a
`scanning line drive circuit 14 is disposed on a left side
`thereof. Signal lines 15 and scanning lines 16 are connected
`to the signal line drive circuit 13 and the scanning line drive
`circuit14, respectively. The signal lines 15 and the scanning
`lines 16 form a lattice in the pixel section 12, and the ends
`of the signal lines 15 and the scanning lines 16 extend up to
`the outside of the sealing material region 17 and are con-
`nected with a control circuit, a power supply not shown, or
`the like. Also, the element substrate 11 and the opposite
`substrate 18 are joined to each other through the sealing
`material formed in the sealing material region 17, and a
`liquid-crystal material is interposed between those sub—
`strates 11 and 14 by the shape of the sealing material.
`Further, an external terminal 19 is disposed on the element
`substrate 11.
`
`In the first conventional example shown in FIG. 16, the
`wiring structure around the pixel section 4 is symmetrical
`with respect to top and down as well as right and left on the
`paper surface with the result that the steps of the sealing
`section are made uniform, thereby being capable of making
`an interval between the substrates uniform.
`
`However, in the first conventional example, because the
`peripheral drive circuit is connected to the outside of the
`sealing material, there are a lot of wirings that are transverse
`to the sealing material, and moisture enters from the inter-
`faces between the wirings which connect the drive circuit to
`the pixel section and the sealing material, resulting in such
`a problem that the liquid~crystal surface material is deterio-
`rated. Also, because the peripheral drive circuit is disposed
`outside, the device is made large in size.
`In order to eliminate those problems, the peripheral drive
`circuit
`integral
`type active matrix liquid—crystal display
`device in accordance with the second conventional example
`shown in FIG. 17 has a peripheral drive circuit disposed
`inside the sealing material region 17. Also, a one-side drive
`system is generally adopted without any provision of a
`redundant circuit. For that reason, as shown in FIG. 17, since
`wirings are transversal to the sealing material only on the
`right side and the lower side of the element substrate 11, the
`wiring structure has no symmetry with respect to top and
`down as well as right and left on the paper surface, the step
`ofthe sealing material on the peripheral drive circuit side is
`diiferent from that of the sealing material on a wiring
`extending side. Hence, in bonding the substrates together,
`because no pressure is uniformly applied to the substrate. It
`is difficult to make an interval between the substrates uni—
`form. As a result, nonuniformity occurs on display, or an
`image quality is deteriorated.
`In particular, because the step of the sealing material on
`the peripheral drive circuit side is low, when bonding the
`substrates together, there may be a case in which the wirings
`are short—circuitcd between the top and the bottom in the
`peripheral drive circuit, thereby being liable to generate a
`line defect. Those problems lead to additional causes such as
`the deterioration of the yield of the peripheral drive circuit
`integral type liquid-crystal display device, or the lowering of
`the reliability.
`Also, in the pixel element, a most projected portion is in
`a region where the scanning lines and the signal lines are
`superimposed one on another, and in the region, not only the
`scanning line, the signal line, an inter-layer insulation film
`for separating those lines from each other, but also a pixel
`electrode, a black matrix and so on are laminated one on
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`another. In general, columnar fibers for maintaining the
`interval between the substrates are mixed with the sealing
`material. The dimensions of the fiber are set
`to values
`obtained by taking into consideration the margin in addition
`to the thickness of the projected portion in the pixel section
`and the dimensions of spacers dispersed inside the sealing
`material in such a manner that
`the step of the sealing
`material is higher in level than the pixel section. However,
`if the spacer is disposed on the projected portion of the pixel
`section, the pixel portion becomes higher than the sealing
`material, and when the substrates are bonded together under
`this state, the scanning lines and the signal lines are short-
`eircuited between the top and the bottom through the
`spacers, thereby causing the point defect and the line defect.
`
`SUMMARY OF THE INVENTION
`
`The present invention has been made to eliminate the
`above problems with the conventional devices, and therefore
`an object of the present invention is to provide a peripheral
`drive circuit
`integral
`type liquid-crystal display device
`which is excellent in image quality and high in reliability.
`In order to solve the above problems, according to the
`present invention, there is provided a liquid-crystal display
`device, comprising: an element substrate having a matrix
`circuit; an opposite substrate which is opposite to said
`element substrate; a sealing member for bonding said ele-
`ment substrate and said opposite substrate together; and
`substrate interval correction means having a laminate struc-
`ture consisting of at least one layer and disposed in a region
`where said sealing material is formed.
`Also, according to the present invention, there is provided
`a liquid-crystal display device, comprising: an element
`substrate matrix circuits having signal lines and scanning
`lines which are disposed in a matrix and separated from each
`other through a first interlayer insulation film, and pixel
`electrodes disposed on cross points of said signal lines and
`said scanning lines and separated from the signal
`lines
`through a second interlayer insulation film, and a peripheral
`drive circuit for controlling said matrix circuit; an opposite
`substrate which is opposite to said element substrate; a
`sealing material which surrounds said matrix circuit and
`bonds said element substrate and said opposite substrate
`together; and substrate interval correction means having at
`least first support means made of the same material as the
`signal lines, said first
`interlayer insulating film, second
`support means made of the same material as the signal lines,
`and a second interlayer insulation film formed in different
`layers from each other,
`in the formation region of said
`sealing material in said element substrate.
`Further, according to the present invention, there is pro—
`vided a liquid~crystal display device, comprising: an ele—
`ment substrate matrix circuits having signal lines and scan~
`ning lines which are disposed in a matrix and separated from
`each other through a first interlayer insulation film, pixel
`electrodes disposed on cross points of said signal lines and
`said scanning lines and separated from the signal
`lines
`through a second interlayer insulation film, and a thin-film
`transistor for operating the pixel electrode, and a peripheral
`drive circuit for controlling said matrix circuit; an opposite
`substrate which is opposite to said element substrate; a
`sealing material which surrounds said matrix circuit and
`bonds said element substrate and said opposite substrate
`together; and substrate interval correction means having at
`least support means made of the same material as the
`scanning lines, said first interlayer insulating film, and a
`second interlayer insulation film formed in dilferent layers
`
`4
`from each other, in the formation region of said sealing
`material in said element substrate.
`
`The above and other objects and features of the present
`invention will be more apparent from the following descrip-
`tion taken in conjunction with the accompanying drawings.
`FIG. 1 is a front view showing the outline of an element
`substrate of an active matrix type liquid-crystal display
`device in accordance with embodiments of the present
`invention, in which peripheral drive circuits 103, 102 and a
`display section 102 are disposed on an element substrate
`101.
`
`As shown in FIG. 1, signal lines 105 and scanning lines
`106 are transversal to a sealing material formation region
`107 on the right and bottom sides of a paper surface, but
`those lines 105 and 106 are not transversal to the sealing
`material formation region 107 on the side of peripheral
`circuits 103 and 104. For that
`reason,
`in the present
`invention,
`there is formed substrate interval correction
`means that makes the step of the sealing material uniform.
`FIG. 6 is a cross-sectional view showing substrate interval
`maintaining means taken along a width direction of the
`sealing material. As shown in FIG. 6, in the sealing material
`formation region, first support members 301, 302 and 303
`made of the same material as that of the scanning lines 106,
`a first interlayer insulation layer 220 that separates the signal
`lines 105 from the scanning lines 106, and second support
`members 304 made of the same material as that of the signal
`lines 105 are laminated one on another.
`In particular,
`because it is designed that the second support members 304
`do not exist on the first support members 301, 302 and 303,
`the cross-sectional structure of the substrate interval main~
`taining means along the edge portion of the sealing material
`formation region 107 is made uniform,
`thereby being
`capable of making the step of the sealing material uniform.
`FIG. 15 is a cross-sectional view showing another sub-
`strate interval maintaining means taken along the width
`direction of the sealing material. As shown in FIG. 15, in the
`sealing material formation region 107, first support members
`301, 302 and 303 made of the same material as that of the
`scanning lines 106, a first interlayer insulation layer 220 that
`separates the signal lines 105 from the scanning lines 106,
`and second support members 701 made of the same material
`as that of the signal lines 105 are laminated one on another.
`A region where the thickness of the matrix circuit is maxi-
`mum is a region in which the signal lines 105 and the
`scanning lines 106 are superimposed one on the other. In the
`region, the signal lines, the interlayer insulation layer, the
`scanning lines and a passivation film are laminated one on
`another at least on the element substrate. Hence,
`in the
`present invention, the first support members 301, 302 and
`303 and the second support members 701 are designed so as
`to be superimposed one on the other, thereby being capable
`of making the step of the substrate interval maintaining
`means nearly equal to the height of the region in which the
`thickness of the matrix circuit is maximum. Also, the step of
`the matrix circuit containing a spacer is made lower than the
`sealing material,
`thereby being capable of supporting a
`pressure required when bonding the substrates together by
`the sealing material. As a result, the spacer can prevent the
`scanning lines and the signal lines from being short-circuited
`between the upper and lower sides. It should be noted that
`because in the region where the signal lines 105 and the
`scanning lines 106 are superimposed one on the other, pixel
`electrodes, a black matrix and so on are further laminated
`one on another, the substrate interval formation means may
`be also designed so that the pixel electrodes,
`the black
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`matrix and so on are laminated one on another in the
`formation means.
`
`FIG. 4 is a top View showing the substrate interval
`correction means, in which linear first support members 301,
`302 and 303 and second support members 304 are disposed
`alternately at regular intervals in the sealing material for-
`mation region 107.
`The scanning lines extending from the matrix circuit are
`formed integrally with the first support members 302 in a
`region R3 transversal
`to the sealing material formation
`region 107 and extend to the outside of the sealing material
`formation region 107. On the other hand, the signal lines 305
`that extend from the matrix circuit 102 are connected to the
`first support members 303 that are transversal to the sealing
`material formation region 107 inside the sealing material
`formation region 107.
`As described above, according to the present invention, a
`wiring pattern which is transversal to the sealing material
`formation region 107 and electrically connected to an exter-
`nal circuit of the element substrate is made up of only the
`first support members 302 and 303, thereby making the step
`of the sealing material more uniform.
`Also, as shown in FIG. 8, a wiring from the matrix circuit
`102 or the peripheral circuits 103 and 104 is not transversal
`to the sealing material formation region 107 in the regions
`R1 and R2. The wiring is formed in the shape of a rectan-
`gular wave which is nearly equal to the width of the sealing
`material formation region 107 without disconnecting a first
`Wiring layer 401. As a result, because the first wiring layer
`exists in an arbitrary cross~sectional structure in the Width
`direction of the sealing material formation region 107,
`moisture can be prevented from entering from the exterior.
`Also,
`in the present
`invention,
`the substrate interval
`maintaining means is so designed as to be formed together
`with a thin-film transistor that drives said pixel electrode, the
`first wiring layer is formed together With the signal lines, and
`the second Wiring layer is formed together with the signal
`line.
`
`BRIEF DESCRIPTION OF THE DRAWENGS
`
`FIG. 1 is a top view showing a liquid—crystal display
`device in accordance with embodiments 1 to 5 of the present
`invention;
`FIGS. 2A to 2E are diagrams showing a process of
`fabricating a TFT in accordance with embodiments 1 to 5;
`FIG. 3 is a diagram showing a process of fabricating the
`lower structure of a sealing material in accordance with
`embodiment 1;
`FIG. 4 is a diagram showing a process of fabricating the
`lower structure of a sealing material in accordance with
`embodiment 1;
`FIG. 5 is a cross-sectional View taken along a line A-A‘ in
`FIG. 4 and a cross-sectional View taken along a line B—B’ in
`FIG. 7;
`FIG. 6 is a cross-sectional view taken along a line A-A' in
`FIG. 4 and a cross-sectional view taken along a line B—B' in
`FIG. 8;
`FIG. 7 is a diagram showing a process of fabricating a
`substrate interval correction means in accordance with
`embodiment 2;
`FIG. 8 is a diagram showing a process of fabricating the
`substrate interval correction means in accordance with
`embodiment 2;
`FIG. 9 is a diagram showing a process of fabricating the
`substrate interval correction means in accordance with
`embodiment 3;
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`10
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`15
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`20
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`25
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`30
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`35
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`4D
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`45
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`50
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`55
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`60
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`65
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`6
`FIG. 10 is a cross-sectional View taken along a line GO
`in FIG. 9;
`FIG. 11 is a cross—sectional View taken along a line D-D’
`in FIG. 9;
`FIG. 12 is a top view showing a substrate interval
`correction means in accordance with embodiment 4;
`FIG. 13 is a cross—sectional view taken along the line BE
`in FIG. 12;
`top view showing a substrate interval
`FIG. 14 is a
`correction means in accordance with embodiment 5;
`FIG. 15 is a cross—sectional View taken along the line F-F’
`in FIG. 14;
`FIG. 16 is a top view showing a liquid-crystal display
`device in accordance with conventional example 1; and
`FIG. 17 is a top view showing a liquid-crystal display
`device in accordance with conventional example 2.
`
`DETAILED DESCRIPTION OF THE
`PREFERRED EMBODIMENTS
`
`Now, a description will be given in more detail of
`embodiments of the present invention with reference to the
`accompanying drawings.
`FIG. 1 is a front View showing an outline of an element
`substrate of an active matrix type liquid-crystal display
`device in accordance with embodiments 1 to 5 of the present
`invention, in which a peripheral drive circuit is integral with
`a display section. As shown in FIG. 1, a pixel section 102 is
`disposed on an element substrate 101 made of glass, quartz
`or the like, and a signal line drive circuit 103 is disposed on
`the top side in the periphery of the pixel section 102 whereas
`a scanning line drive circuit 104 is disposed on the left side.
`The signal line drive circuit 103 and the scanning line drive
`circuit 104 are connected to the pixel section 102 through the
`signal lines 105 and the scanning lines 106, respectively. The
`signal lines 105 and the scanning lines 106 form a lattice in
`the pixel section 102, and in the intersections thereof,
`liquid-crystal cells 111 and pixel TFTs 112 are connected in
`series, respectively. In the pixel TFI‘s 112, a gate electrode
`is connected to the signal lines 105, a source electrode is
`connected to the scanning lines 106, and a drain electrode is
`connected to an electrode of the liquid—crystal cell 111.
`Furthermore, a sealing material region 107 is so arranged
`as to surround the pixel section 102, the signal line drive
`circuit 103, and the scanning line drive circuit 104. The
`element substrate 101 is bonded to an opposite substrate not
`shown through the sealing material formed in the sealing .
`material region 107, and a liquid-crystal material is sealingly
`held between those substrates.
`
`On the right and bottom sides of the paper surface, the
`signal lines 105 and the scanning lines 106 extend to the
`exterior of the sealing material formation region 107 so as to
`be connected to a control circuit outside of the panel, or the
`like. Furthermore, an external terminal 108 is disposed on
`the element substrate 101, and the external terminal 108 is
`connected With the signal line drive circuit 103 and the
`scanning line drive circuit 104 through wirings 109, respec—
`tively.
`
`EMBODIMENT 1
`
`The active matrix liquid-crystal display device shown in
`FIG. 1 according to embodiment 1 is characterized in that,
`in order to make the step of the sealing material uniform, a
`wiring pattern (dummy wiring structure) which is shaped
`and substantially electrically insulated from a starting film of
`
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`5,995,189
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`7
`signal lines 103 and scanning lines 104 is disposed in a
`sealing material formation region 107 to make the structure
`of the lower portion of the sealing material uniform so that
`the step of the sealing material is unified. Also,
`in this
`embodiment, the above wiring pattern is fabricated together
`with TFTs disposed on the liquid—crystal panel.
`A process of fabricating the active matrix liquid—crystal
`panel in accordance with this embodiment will be described
`with reference to FIGS. 2 to 6. FIG. 2 shows a cross—
`sectional view of a process of fabricating a TFT, in which the
`left side of FIG. 2 shows a process of fabricating a drive
`circuit TFT disposed in a peripheral drive circuit (a signal
`line drive circuit 203, a scanning line drive circuit 204),
`whereas the right side thereof shows a process of fabricating
`an pixel TFT disposed in a pixel section 202.
`Also, FIGS.- 3 to 6 show diagrams showing dummy
`wirings 301 for a first layer. FIGS. 3 and 4 show schematic
`top views of the sealing material formation region 107,
`which are enlarged diagrams of regions R1 to R4 indicated
`by ellipses in FIG. 1. Also, FIGS. 5 and 6 are cross-sectional
`views respectively taken along a line A—A‘ in FIGS. 3 and 4.
`In fabrication of the TFT, as shown in FIG. 2A, on a
`substrate 201 such as a quartz substrate or a
`lass substrate
`is formed a silicon oxide film 1000 to 3000
`in thickness
`as a base oxide film 202. As a method of forming the silicon
`oxide film, a sputtering method or a plasma CVD method
`may be used in an oxide atmosphere.
`Subsequently, an amorphous silicon film is formed in
`thickness of 300 to 1500 A, preferably 500 to 1000 A
`through the plasma CVD method or the LPCVD method.
`Then, the thermal annealing is conducted on the silicon film
`at a temperature of 500° C. or higher, preferably, 800 to 950°
`C., to thereby crystalize the silicon film. After the silicon
`film has been crystallized through the thermal annealing, the
`optical annealing may be conducted on the crystallized
`silicon film to further enhance crystallinity. Also, in crys-
`tallization of the silicon film through the thermal annealing,
`as disclosed in Japanese Patent Unexamined Publication
`Nos. Hei 6~244103 and Hei 6—244104, an element (catalytic
`element) such as nickel which promotes the crystallization
`of silicon may be added.
`Then, the silicon film thus crystallized is etched to form
`active layers 203 (for a p-channel type TFT) and 204 (for an
`n-channel type TFT) of TFTs in an island-like peripheral
`drive circuit and an active layer 205 of TFTs (pixel TFTs) in
`the matrix circuit, respectively. Moreover, an oxide silicon
`500 to 2000 A in thickness is formed as a gate insulation film
`206 through the sputtering method in an oxide atmosphere.
`As a method of forming the silicon oxide film, the plasma
`CVD method may be used. In the case of forming the silicon
`oxide film through the plasma CVD method, it is preferable
`that dinitrogen monoxide (N20) or oxygen (02) and mono—
`silane (SiH4) may be used as a raw gas.
`Thereafter, a starting film of a wiring for the first layer is
`formed. In this embodiment, a polycrystalline silicon film
`(containing a small amount of phosphorus that enhances the
`electrically conductivity) 2000 A to 5 am, preferably 2000
`to 6000 A in thickness is formed on the overall surface of the
`substrate through the LPCVD method. Then, the polycrys-
`talline silicon film thus formed is etched to form gate
`electrodes 207, 208 and 209 (FIG. 2A).
`Furthermore, in this embodiment, the starting film of the
`wiring for the first layer is patterned even in the sealing
`material region 107 to form a wiring pattern as shown in
`FIG. 3, simultaneously when the gate electrodes 207 to 209
`are formed.
`
`8
`Since it is unnecessary to form a wiring pattern which are
`transversal to the sealing material formation region 107 in
`the scanning line drive circuit side region R1 and the signal
`line drive circuit side region R2, linear dummy wirings 301
`for the first layer are formed by patterning the silicon film in
`such a manner that it is disposed at regular intervals so as not
`to be electrically connected to each other.
`In the scanning line extension side region R3, wirings 302
`are formed so as to bc transversal to the sealing material
`formation region 107. The wirings 302 correspond to the
`scanning lines 106 shown in FIG. 1 and are formed by the
`extensions of the gate electrodes 209 of the pixel TFTs.
`In the signal line extension side region R4, wirings 303
`are formed so as to be transversal to the sealing material
`formation region 107. In the end portions of the wirings 303
`on the pixel section 102 side are formed connection end
`portions 303a for connecting with wirings extending from
`the pixel section 102 for the second layer.
`It should be noted that the respective intervals between
`the dummy wirings 301 and the wirings 302, 303 are set to
`be identical with the intervals between the scanning lines
`106, that is, to be substantially identical with the intervals
`between the pixels. In this embodiment,
`the respective
`intervals between the dummy wiring 301 for the first layer,
`the wiring 302 and the dummy wiring 301 for the first layer
`are set to about 50 ,um, and their widths are set to about 10
`,um.
`Therefore, because the dummy wiring 301 for the first
`layer, the wiring 302 and the wiring 303 are disposed at
`regular intervals in the sealing material formation region 107
`as shown in FIG. 5,
`the cross~sectional structure of the
`sealing material formation region 107 can be unified.
`It should be noted that the‘ material of the starting films of
`the gate electrodes 207 to 209, the dummy wirings 301, the
`wirings 302 and 303 for the first layer is not limited to a
`silicon film, and the material of the gate electrode which is
`usually used may be used therefor. For example, silicide, or
`aluminum, tantalum, chromium, molybdenum or the like
`which is an anodizable materi