`
`(19) Japan Patent Office (JP)
`
`[11) Japanese Unexamined Patent
`
`(13) Japanese Unexamined Patent
`
`Application Publication (A)
`
`I‘ll-180523
`
`(51‘) Int Cl.4
`
`Identification
`
`symbols
`
`0 02 F l/l33
`
`H01 L27/12
`
`29/78
`
`327
`
`311
`
`JPO file
`
`number
`7370-2H
`
`A—7Sl4-SF
`
`A—79ZS—SF
`
`(-13.) Publication date: July l8. I989
`
`Request for examination Not yet requested No. of claims
`
`8
`
`(Total of 6 pages)
`
`'
`
`_' (54) Title of the Invention: AThin-film Transnstor Matrix and the Production Method Thereof
`363-3707
`(21 )Application number
`
`(22) Date of application
`(72') Inventor
`
`Eiji Matsuzaki
`
`(72) Inventor
`
`Mifumi Yoritomi
`
`January 13, 1988
`
`do Production Engineering Research Laboratory, Hitachi,
`
`Ltd, 292 Yoshida-cho, Totsuka-ku. Yokohama. Kanagawa
`Prefecture
`
`c/o Production Engineering Research Laboratory. Hitachi.
`
`Ltd. 292 Yoshida-cho, Totsuka-ku. Yokohama, Kanagawa
`Prefecture
`
`(72) Inventor
`
`Takao Takano
`
`c/o Production Engineering Research Laboratory, Hitachi,
`
`Ltd, 292 Yoshida-cho, Totsuka—ku, Yokohama, Kanagawa
`Prefecture
`
`(72) Inventor
`
`Akihiro Kenmochi
`
`c/o Production Engineering Research Laboratory. Hitachi.
`
`Ltd., 292 Yoshida-cho. Totsuka-ku. Yokohama, Kanagawa
`Prefecture
`
`(71 ) Applicant
`
`Hitachi‘ Ltd.
`
`4-6 Surugadar. Kanda, Chryoda-ku, Tokyo
`
`(74) Representative
`
`[Patent Anomey]
`
`and one other
`
`Katsuo Ogawa
`
`Continued on the last page
`
`Specification
`1. Title of the Invention
`
`A thin-film transrstor
`
`matrix
`
`and
`
`the
`
`production method thereof
`2 Claim
`
`l. A thin-film transistor matrix comprising: a
`substrate; a gate electrode formed on said
`
`substrate. a gate insulator formed on said gate
`electrode; a semiconductor thin-film formed
`
`on said gate insulator; and a drain electrode
`
`CMO 0183033
`
`Exhibit 1007, page 1
`
`Exhibit 1007, page 1
`
`

`

`
`
`Japanese Unexamined Patent Hl-l80523(12)
`
`and
`
`source
`
`electrode
`
`formed
`
`on
`
`said
`
`transistor according to Claim 1. the method
`
`semiconductor
`
`thin-film.
`
`the
`
`thin-film
`
`being characterized as
`
`creating a pixel
`
`transrstor matrix being characterized as
`
`electrode using a transparent conductive film
`
`having a gate line connected to said gate
`
`comprising
`electrode
`conductive film and at
`
`a
`least
`
`transparent
`two types of
`
`formed on said transparent
`films
`metal
`conductive film
`
`formed at the same time with said transparent
`conductive film.
`
`8. A production method of a
`
`thin-film
`
`transistor matrix according to Claim 7, the
`
`method being characterized as processing a
`
`2. A thin-film transistor matrix according to
`
`transparent conductive film used for said
`
`Claim 1. wherein said transparent conductive
`
`pixel electrode as protecting by said metal
`
`film is a thin film comprising at least one of
`iridium oxide and tin oxide. and said metal
`
`film in
`
`contact with
`
`the
`
`transparent
`
`conductive film of said gate line. connecting
`
`film in
`
`contact wrth
`
`said
`
`transparent
`
`said semiconductor thin-film to said pixel
`
`conductive film is a high melting point metal
`
`electrode, and removing said metal film on
`
`film that can be etched using a chemical with
`
`said pixel electrode.
`
`low corrosiveness
`conductive film.
`
`of
`
`said
`
`transparent
`
`3. Detailed Description of Invention
`
`3. A thin-film transistor matrix according to
`
`Claim 2, wherein said high melting point
`metal film is selected from Cr. Ti, Ta, Nb.
`and Zr
`
`1
`[Industrial Application Field]
`The present invention relates to a thin-film
`transistor matrix, and specifically relates to
`a
`thin-film transistor matrix
`and
`the
`
`production method thereof suitable for a flat
`
`4. A thin~film transistor matrix according to
`
`panel display using a material such as liquid
`
`Claim 2 or Claim 3, wherein the metal film
`
`crystal.
`
`on the opposite side of said transparent
`
`[PnorArt]
`
`conductive film in contact with said high
`
`A thin film transistor using a semiconductor
`
`melting point metal film is comprised of Al
`
`thin—film such as amorphous silicon, CdSa
`
`or A] containing a transition metal
`5. A thin-film tranSistor matrix according to
`Claim 4, wherein said transition metal is Si‘
`Ti‘ Cu. Sb, or Pd.
`
`6. A thin-film transistor matrix according to
`
`any of Claims
`
`1
`
`to 5. wherein a pixel
`
`transparent
`electrode is comprised of a
`conductive film formed at the same time with
`
`said transparent conductive film.
`
`has garnered attention as a switching element
`
`of an active matrix mulli—element display
`device.
`
`an example of
`FIG 4 is
`cross-section
`structure of
`a
`thin
`
`the
`film
`
`transistor used in a conventional
`
`thin-film
`
`transistor matrix.
`
`In other words.
`
`a gate
`
`a
`3‘
`insulator
`gate
`a
`2,
`electrode
`semiconductor film 4. a drain electrode 5.
`
`7. A production method of a
`
`thin-film
`
`and a source electrode 6 are sequentially
`
`CMO 0183034
`
`Exhibit 1007, page 2
`
`Exhibit 1007, page 2
`
`

`

`
`
`Japanese Unexamined Patent I‘ll-18052313)
`
`stacked on an insulating substrate 1. The
`
`[n
`
`the
`
`above-mentioned
`
`prior
`
`art,
`
`no
`
`source electrode 6 is connected to the pixel
`electrode 7. which is one of the electrodes for
`
`consideration was given to both production
`
`yield
`
`improvement
`
`and
`
`reduction
`
`of
`
`a
`
`liquid crystal
`
`cell. Then.
`
`a
`
`thin-film
`
`tranststor matrix is composed by connecting
`
`photo—etching processing, and the challenge
`was to be able to obtain a thin-film transistor
`
`the gate electrode 2 to the scarunng line 8
`
`matrix at a low production cost.
`
`(also called a gate line),
`
`and the drain
`
`The
`
`objective
`
`of
`
`the
`
`present
`
`electrode to the signal line 9 (also called as a
`
`mvention is to provide a thin-film transistor
`
`drain line).
`
`matrix and the production process thereof,
`
`Currently,
`
`the challenges
`
`in the
`
`wherein
`
`the
`
`number of
`
`photo-etching
`
`production process of the above-described
`thin-film tranststor matrix is to improve yield,
`
`processes is reduced, the production yield is
`
`high. and the Wiring reStstance is lower at the
`
`reduce cost by reducing the number of
`
`photo-etching processes. and reduce Wiring
`
`resistance
`
`Regarding
`
`prevention
`
`of
`
`disconnecting a Signal line and seaming line,
`
`time of production
`[Means for Solving the Problem]
`A thin-film transistor matrix of the present
`invention has a thin film transistor
`that
`
`and
`
`reduction of wiring
`
`resistance,
`
`a
`
`comprises
`
`a
`
`substrate,
`
`a gate
`
`electrode
`
`two—layer wiring 81 and 82. 91 and 92 (Cr
`
`and M0 or Cr and Al. for example) by a metal
`
`fanned
`
`formed on. said substrate, a gate insulator
`electrode.
`a
`
`on
`
`said
`
`gate
`
`film,
`
`for which selective etching can be
`
`semiconductor film, and a drain electrode and
`
`performed as shown in FIG 5. has been
`
`proposed Examples of this include Japanese
`
`Unexamined Patent Application Publication
`
`861-93488. However, in order to improve the
`above-mentioned
`effect,
`the number of
`
`photo-etching processes must be increased.
`Meantime, in order to reduce the number of
`
`process
`the
`processes,
`photo-etching
`indicated in FIG 6 has been proposed in
`Japanese Unexamined Patent Application
`Publication S 61-276374. In this case,
`the
`
`formed »
`electrode
`source
`semiconductor
`thin-film,
`as
`element.
`
`said
`on
`switching
`
`a
`
`The abovementioned objective can
`
`be attained by formmg the scanning line with
`
`at
`
`least
`
`three types of conductive films.
`
`Specifically. it is effective if the scanning line
`
`has a structure of sequential stacking of at
`least.
`from the side of
`the substrate,
`a
`
`transparent conductive film. a high melting
`
`point metal that can be etched by a chemical
`
`decrease in yield of signal lines or scanning
`lines 15 not considered. Furthermore.
`the
`
`fluid unsuitable for etching, and an Al base
`metal film
`
`lowering resistance of wiring is not sufficient
`as the substrate size IS increased.
`
`[Operation of the Invention]
`Because the items described below are made
`
`[Problems to be Solved by the Invention]
`
`possible by the application of the Invention to
`
`CMO 0183035
`
`Exhibit 1007, page 3
`
`Exhibit 1007, page 3
`
`

`

`
`
`
`
`Japanese Unexamined Patent Ill-18052314)
`
`a thin-film transistor matrix. it is possible to
`obtain a thin-film transistor matrix with low
`
`winng resrstance of the scanning line and a
`
`high
`
`production
`
`yield without
`
`greatly
`
`increasing the number of photo-etching
`processes.
`
`the thin film transistor when the invention
`
`was applied. and the FIG 3 is a flowchart
`
`illustrating an example of the production
`process.
`
`The
`
`scanning
`
`line
`
`8
`
`is
`
`a
`
`multi-layered wrung comprising.
`
`from the
`
`(I) When a transparent conductive film can
`
`side of the insulating substrate 1, [TO film
`
`be formed first, then in principle, the number
`
`(indium oxide + tin oxide) 81, Cr film 82. Al
`
`can be
`the photo-etching processes
`of
`reduced to a small number. This is made
`
`film 83 In this example. for the prevention of
`
`disconnection,
`
`the signal
`
`line 9 is also a
`
`possible by an application of the invention.
`
`multi-layered wiring comprising the Cr film
`
`(2) Because the conductive layer of the
`
`91 and the Al film 92. The gate electrode 2
`
`invention is the first layer film. the restriction
`
`is a multi-layered structure comprising
`
`against etching is low and defects from the
`
`the transparent conductive ITO film 21
`
`etching process can be extremely reduced.
`
`Moreover. because it is protected by a high
`
`and the Cr film 22 that are transparent
`conductive films. The connection of
`the
`
`melting point metal film. the occurrence of
`
`source electrode 6 and the pmel electrode 7 is
`
`defects originating from the
`
`transparent
`
`implemented via the Cr film 7|, used in the
`
`conductive film during processing is rare.
`
`protection of the [TO film forming a pixel
`
`(3') It is possible to lower the resistance and
`
`electrode. The production method will be
`
`to prevent disconnecting the scanning line,
`
`because
`
`the
`
`scanning
`
`line
`
`can
`
`be
`
`multi-layered wiring with
`
`at
`
`least
`
`a
`
`a
`
`transparent conductive film. a high melting
`
`point metal. and a low resistance Al film, and
`
`the photoetching is at least more than in two
`
`processes.
`
`{Embodiments}
`One
`embodiment of
`
`the
`
`invention
`
`IS
`
`explained according to the flow chart of FIG
`3.
`
`First, on the insulating substrate 1.
`
`form films using a
`such as a glass plate.
`method such as sputtering technique in the
`order from the ITO film, the Cr film, and the
`
`Al
`
`film. Next. process the Al
`
`film With a
`
`photo-etching in order to form a Al wiring
`
`line 83 of the scanning line 8. ant
`
`then
`
`explained below using FIG I to 3.
`
`process photo-etching and form the ITO
`
`of
`
`the
`
`FIG l(a) is a plan View of the part
`thin-film tranststor matrix with
`
`winng line 81 and the Cr Wiring line 82 of
`
`the scanning line 8. At this time. in order to
`
`application of the invention. FIG llbl is a
`
`prevent undercut of the ITO film, the order is
`
`cross section structure of the scanning line
`
`Cr etching —>
`
`ITO etching -> Cr etching.
`
`illustrating the characteristics of the invention.
`
`using the some photo resist. For etching of
`
`FIG 2 is a cross section structure example of
`
`the Al film. the etching solution, compnsing
`
`.——————___—_—.._———— ____.,.._.._. .
`
`CMO 0183036
`
`Exhibit 1007, page 4
`
`Exhibit 1007, page 4
`
`

`

`
`
`Next, by using the plasma CVD
`
`(Qhemical Xapor
`
`erosition)
`
`g method
`
`consecutively form films. a silicon nitride
`
`film used as
`
`a gate
`
`insulator
`
`film. an
`
`amorphous
`
`silicon
`
`film used
`
`as
`
`a
`
`and the Cr film 71 used for the protection ol~
`the
`ITO film
`In
`addition,
`remove
`the
`silicon
`
`fihri
`
`doped with
`
`amorphous
`
`
`
`Japanese Unexamined Patent Ill-1805236)
`
`H,PO.+HN03+CHJCOOH+H20 is typically
`
`Next, sequentially form 3 Cr film
`
`used. Therefore, depending on the film
`
`and an Al film with the sputtering technique.
`
`quality of the ITO film. it may be damaged
`
`After
`
`that, process
`
`the Al
`
`film by
`
`by this etching solution. However. in this
`case,
`there is no need for concermng the
`
`photo-etching and form the Al winng line
`
`92 of the signal lme 9. the Al part 53 of
`
`problem because it is protected by the Cr film.
`
`the drain electrode 5. the Al part of the
`
`Also‘ in the etching of the [TO film, due to
`
`source electrode 6 and the Al part 63 of
`
`the variation of its film quality, there is a high
`
`the wiring line that connect to the pixel
`
`occurrence of defects such as etching residue
`
`electrode. Moreover, process the Cr film
`
`However. because the top layer A] film and
`
`by photo-etching, and separate the drain
`
`the Cr film are protected by a resist. and it
`
`electrode 5 (Cr part is 52) and the source
`
`exist in the lowest layer. there is no difficulty
`
`electrode 6 (Cr part 15 6| [sic 62]) as well
`
`in selecting etching and therefore, with wider
`
`as
`
`removing the Cr
`
`film on the pixel
`
`freedom in the selection of etching solutions.
`
`electrode 7. At this time, the source electrode
`
`it is easier to prevent etching defects.
`
`6 and the pixel electrode 7 of the thin film
`
`transistor are connected by the Cr film 62
`used as the source electrode. the Al film 63.
`
`semiconductor film. and an n type amorphous
`
`phosphorus from the channel pan of the thin
`
`Silicon film doped with phosphorus used for
`electrode contact.
`In this case also.
`the
`
`film transistor. and separate the drain contact
`SI and the source contact 61. The drain
`
`deterioration
`
`of
`
`film quality
`
`from the
`
`contact and the source contact are comprised
`
`exposure to the reduction atmosphere can be
`
`of the n type amorphous silicon film doped
`
`prevented because the ITO film 7. which is
`
`with phosphorus. When the Cr film is further
`
`used as a pixel electrode. is protected by the
`Cr film 7 l,
`
`Next.
`
`form a thin film transnstor
`
`etched using the same reSISt. the Cr film 52
`and 62 of the drain electrode 5 and the source
`electrode 6 move backward and the undercut
`
`area by photo-etching. Perform a dry etching
`
`of the n type amorphous silicon film can be
`
`using a CF4+01 gas as an etching gas. Form
`
`the amorphous Silicon film area 4 and the
`
`the
`prevented. From the above processes,
`active matrix substrate of FIG.
`land 2 is
`
`silicon nitriding film area 3 by setting the
`
`completed
`
`etching condition. in which the etching speed
`
`Because the scanning line and the
`
`for the amorphous silicon film is greater than
`
`signal line are comprised of more than two
`
`that of the silicon nitriding film,
`
`types of etching selectable conductive layers,
`
`CMO 0183037
`
`Exhibit 1007, page 5
`
`Exhibit 1007, page 5
`
`

`

`Japanese Unexamined Patent H l -I 80523! 6)
`
`
`
`the photo~etching processing is conducted
`
`5. This effect
`
`is created by sequentially
`
`twice,
`
`the disconnection can be reduced
`
`significantly. In other words. the production
`yield equivalent to that of the case in FIG 5
`
`stacking the transparent conductive film and
`high melting point metal film of the scanning
`line 8. In this case. the high melting point
`
`that is effective for improving yield, can be
`obtained. Also. because the Al film is used as
`
`metal film on the transparent conductive film
`
`must be an etching selectable. Furthermore,
`
`a component of a wiring line, the lowering
`
`in order to reduce wiring resistance of the
`
`the rcswtnncc of the wiring line can be
`
`scanning line 8.
`
`the Al
`
`film needs to be
`
`achieved This effect for the scanning line is
`
`achieved by the application of the invention.
`In other words. one of the invention‘s main
`ideas is to include a low resistance Al in the
`
`arranged on the high melting paint metal. as
`described
`above.
`
`Accordingly,
`
`the
`
`above-mentioned high melting pomt metal
`
`must be able to protect
`
`the pixel electrode
`
`component films of the scanning line. The Al
`
`from the etching solution of the Al line. For
`
`film may include Si. Tl. Cu. Sb, or Pd for
`
`the
`
`transparent
`
`conductive
`
`film of
`
`the
`
`prevention of hirox growth.
`
`thin-film transistor matrix. a film comprised
`
`In FIG 3. the photo-etching process
`
`lines,
`is boxed off by double
`embodiment,
`the
`number
`
`In this
`of
`the
`
`photo-etching processes is five.
`
`of tin oxide and indium oxide is appropriate.
`Therefore. it is benefiCial to use Cr. Ti, Ta.
`
`Nb, and Zr as a high melting point metal,
`above-mentioned
`which
`fulfills
`the
`
`In the case of FIG 5 haVing the
`g
`objective of improving the production yield
`
`requirement.
`
`In this embodiment. the number of
`
`of the thin-film tranSistor matrix. it requires
`
`photo-etching processes
`
`required is
`
`three
`
`the photo-etching process to be conducted
`
`times for forming thin films that compose the
`
`seven times.
`
`includingtcrmmal exposing at
`
`signal line 9. the drain electrode 5, and the
`
`the
`
`connection
`
`terminal
`
`part.
`
`Even
`
`whenterminal exposing and limiting the thin
`film transistor area is conducted with the
`
`source electrode 6 This is one photo-etching
`more than in the case of FIG 6. which
`
`requires two photo-etchings. However,
`
`this
`
`same photo-etching,
`
`it
`
`still
`
`requires
`
`six
`
`embodiment has benefits such as a high
`
`repetitions of the photo—etching processing,
`
`production yield of the scanning line and the
`
`Therefore, by applying the present invention.
`
`reduction of wiring resistance that are more
`
`it is possible to obtain a high yield of the
`thin-film transistor matrix with fewer number
`
`than sufficient to cover the shortcoming.
`
`Although the scanning line has a
`
`of the photo-etching processes as indicated
`
`three-layer structure wherein a transparent
`
`by FIG 5.
`
`Instead, because the number of
`
`conductive film. a high melting point metal
`
`photo-etching processes can be reduced. its
`
`film, and an Al film are sequentially stacked,
`
`yield is actually higher than the case of FIG
`
`for the purpose of protecting the Al film in
`
`
`
`CMO 0183038
`
`Exhibit 1007, page 6
`
`Exhibit 1007, page 6
`
`

`

`Japanese Unexamined Patent H l -l 8053(7)
`
`
`
`this embodiment, a metal film may be further
`
`layered. However. it is not preferable to make
`
`example of a cross-sectional diagram of a
`conventional thin film transistor. FIG. 5 is a
`
`the film of the scanning line thicker than
`necessary.
`
`plan View illustrating an example of the
`thin-film transistor matrix. and FIG 6 IS a
`
`the case is
`In this embodiment,
`described in which a thin film transistor
`
`comprising a silicon nitriding film as a gate
`
`diagram illustrating an example of
`
`the
`
`production process of the thin-film transistor
`matrix.
`
`insulator and an amorphous silicon film as a
`
`l—insulating substrate
`
`semiconductor film,
`
`is used as a switching
`
`l—gate electrode
`
`element. However,
`
`the invention can be
`
`applied when using different insulators such
`as silicon nitriding film as a gate insulator. or
`
`for a thin-film transistor matrix using a thin
`
`l—gate insulator
`4—semiconductor tilrn
`
`5—drain electrode
`
`6—source electrode
`
`film transrstor comprised of other types of
`
`7—pier electrode
`
`semiconductor film such as multi-crystalline
`
`B—scanning line (gate line)
`
`silicon film as a switching element
`
`9—signal line (drain line)
`
`[Effect of the Invention]
`
`Representative: Katsuo Ogawa, Chartered
`
` Patent Attorney
`
`According to the invention. it is possible to
`
`obtain a high production yield of thin~film
`transrstor matrix with a fewer number of
`
`photo-etching processes, so the effect of the
`
`invention is obtaining of a thin-film transistor
`
`is cheaper than a conventional
`matrix that
`thin-film transistor matrix.
`
`4. Brief Description ofthe Drawings
`
`FIG 1(a)
`
`is a plan view of a part of the
`
`thin-film transistor matrix with application of
`
`the invention, FIG ltb) is a cross-sectional
`
`diagram of the scanning line illustrating the
`characteristics of the invention. FIG 2 is a
`
`cross-sectional diagram of the thin film
`
`transistor with the invention application, FIG
`
`3 is a flowchart illustrating the production
`
`process ofthe thin-film transistor matrix with
`
`the invention application, FIG. 4 is an
`
`CMO 0183039
`
`Exhibit 1007, page 7
`
`Exhibit 1007, page 7
`
`

`

`
`
`Japanese Unexamined Patent Hl~l8052 3(8)
`
`F101
`
`FIG}
`
`
`
`Film formallan of [TO film + Cr film +AL film
`
`Ph-IIo-etchmg ofAl filr'n (patrermng ofscanmng line by Al film)
`
`Photo-etching of ITO film + Cr film (pallemmg ofscannlng lme.
`gale electrode and one] elecrrodcl
`
`_—___L-.———~——
`FIlm l'unnanon of SthOn nvmdmg film. amu hous SlllEOn film.
`and sew-crystal srlrcon film doped wrllr phosp or
`
`Pholo-elchlng of 5IlIcoI-I nIu-Idrng film, amorphws srlrcon film.
`and semr-crysul sIlmon film doped wnh phosphor Ihmlung Ihe
`Ihin film transrslor areal
`
`Fomrauon of Cr film + Al film
`
`_____.i_._.__.——_._.
`Photo etchmg of Al film (patterning of a signal line by an Al
`film. connection ofo (hm film Iransrstor and a pnel eleclmde)
`
`__..
`_
`Photo etchmg of 3 Cr film + a phosphor doped amorphous srlIcon
`film
`(panem forrurng of a sourre and a drum electrode. srgml linc
`pane-mmg. conneclmn of .1
`than film transrslm wilh a pad
`elcclmlc removal nf a nhnsnhnr dnned amnrnhnuc (Ihmn film
`
`FIG. 4
`
`
`
`CMO 0183040
`
`Exhibit 1007, page 8
`
`
`
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`7. Fuel electrode
`8. Scam-mg lure Igale lme)
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`
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`
`51. 62 Hugh mclung
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`film (Cr
`film)
`$3. 61 Afilm
`
`.)
`‘
`
`Exhibit 1007, page 8
`
`

`

`Japanese Unexamined Patent Hl-180523(9)
`
`FIG 6
`
`
`
`FIG 5
`
`81.9I High melting pom! maul "
`MIMCI film)
`32.92 Alfilm
`
`
`
`
`CMO 0183041
`
`Exhibit 1007, page 9
`
`Exhibit 1007, page 9
`
`

`

`
`
`
`
`Japanese Unexamined Patent III-18052300.)
`
`Continued from page 1
`(72) Inventor
`
`Toshiyuki Kosbita
`
`c/o Production Engineering Research Laboratory.
`
`Hitachi. Ltd . 292 Yoshida-cho, Totsuka-ku,
`
`Yokohama. Kanagawa Prefecture
`
`(72) Inventor
`
`Kunihiko Watanabe
`
`c/o Production Engineering Research Laboratory,
`
`[72) Inventor
`
`Mitsuhiko Nukatnni
`
`c/o Production Engmeering Research Laboratory.
`
`Hitachi, Ltd, 292 Yoshida-cho. Totsuka-ku,
`
`Yokohama. Kanagawa Prefecture
`
`(72 ) Inventor
`
`Kazuo Sunahard
`
`c/o Mobara Plant, Hitachi. Ltd., 3300 Hayano.
`
`Mobam. Chiba Prefecture
`
`Hitachi, Ltd. 292 Yoshrda—cho, Totsuka-ku,
`
`Yokohama. Kanagawa Prefecture
`
`CMO 0183042
`
`Exhibit 1007, page 10
`
`Exhibit 1007, page 10
`
`

`

`TRANSLATOR CERTIFICATION
`
`-' sewn-u. .
`.-
`450 7th Ave I 6th Floor I New York, NY 0123 I Tel 2|Z64348800I Fax 2I2.63.005 Iwwwmsiderom
`
`MORNINGSIDE TRANSLATIONS
`
`
`
`Date: October 3, 2006
`
`Description of Documents Translated:
`
`the English and Japanese
`in
`fluent
`|, Kazuho Tokito, a translator
`languages, on behalf of Morningside Translations, do solemnly and
`sincerely declare that the following is, to the best of my knowledge and
`belief, a true and correct English translation of the Japanese document(s)
`listed below in a form that best reflects the intention and meaning of the
`original text.
`I
`
`MOl'ningSi dc I Translations
`
`
`
`
`JP—H01-180523
`
`Exhibit 1007, page 11
`
`Exhibit 1007, page 11
`
`

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