UNITED STATES PATENT AND TRADEMARK OFFICE
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
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`INNOLUX CORPORATION
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`Petitioner
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`v.
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`PATENT OF SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
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`Patent Owner
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`CASE IPR2013-00038
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`PATENT 7,956,978
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`RESPONSE OF THE PATENT OWNER
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`

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`TABLE OF CONTENTS
`
`I.
`INTRODUCTION ............................................................................................. 1
`THE REAL PARTIES IN INTEREST .............................................................. 1
`II.
`III. THE ’978 PATENT ........................................................................................... 2
`A. THE BACKGROUND OF THE TECHNOLOGY .......................................................... 2
`B. THE ADVANTAGES OF THE CLAIMED INVENTION ................................................ 3
`1. Uniform Cell Gap ............................................................................................ 3
`2. Preventing the Entry of Moisture .................................................................... 6
`3. Preventing Short Circuiting By Electrically Isolating the Dummy Wiring .... 9
`C. CLAIMS 7 AND 17 ................................................................................................ 10
`IV. THE ’978 PATENT IS PATENTABLE ........................................................... 16
`A. BACKGROUND OF THE PRIOR ART....................................................................... 16
`1. The Sono Patent .............................................................................................. 16
`2. The Watanabe Patent ...................................................................................... 19
`3. The Admitted Prior Art ................................................................................... 20
`B. THE ’978 PATENT IS PATENTABLE OVER SONO .................................................. 21
`1. Sono Does Not Disclose First and Second Conductive Layers ...................... 22
`2. Sono Does Not Disclose First and Second Conductive Layers Formed
`From the Same Layer As the Second Conductive Lines ....................................... 27
`3. Sono Does Not Disclose Conductive Layers That Are Electrically Isolated .. 33
`4. Sono Does Not Disclose Conductive Layers Longer Than A Pitch ................ 38
`5. Sono’s Dummy Pixels Cannot Be the Claimed Conductive Layers ................ 41
`C. THE ’978 PATENT IS PATENTABLE OVER ADMITTED PRIOR ART WITH SONO
`AND WATANABE ........................................................................................................ 44
`1. Watanabe Does Not Disclose First and Second Conductive Layers Longer
`Than a Pitch of Adjacent Second Conducive Lines .............................................. 46
`2. Watanabe Fails To Disclose First and Second Conductive Layers
`Electrically Isolated From Each Other and the First and Second Conductive
`Lines ...................................................................................................................... 56
`CONCLUSION .................................................................................................. 58
`
`V.
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`- i -
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`

`

`Previously filed
`
`EXHIBIT LIST
`
`Exhibit 2001 – Complaint, Semiconductor Energy Laboratory Co., Ltd. v.Chimei
`Innolux Corp., et al., Case No. SACV 12-0021-JST (C.D. Cal).
`
`Exhibit 2002 – Defendants’ Motion to Stay Litigation Pending Outcome of Inter
`Partes Review, Semiconductor Energy Laboratory Co., Ltd. v. Chimei Innolux
`Corp., et al.
`
`Exhibit 2003 – Supplemental Declaration of Gregory S. Cordrey in Support of
`Defendants' Motion for Stay, Semiconductor Energy Laboratory Co., Ltd. v.
`Chimei Innolux Corp., et al.
`
`Exhibit 2004 – Defendants’ Reply in Support of their Motion to Stay,
`Semiconductor Energy Laboratory Co., Ltd. v. Chimei Innolux Corp., et al.
`
`Exhibit 2005 – Defendant Westinghouse Digital's Notice of Joinder,
`Semiconductor Energy Laboratory Co., Ltd. v. Chimei Innolux Corp., et al.
`
`Exhibit 2006 – ‘978 Patent Prosecution History Excerpt Part I - Prior Art
`considered by the Office
`
`Exhibit 2007 – ‘978 Patent Prosecution History Excerpt Part II - Expert Opinion of
`Dr. Silzars considered by the Office
`
`Exhibit 2008 – [Proposed] Patent Owner’s Requests for Production to Petitioner
`
`Exhibit 2009 – [Proposed] Patent Owner’s Interrogatories to Petitioner
`
`Exhibit 2010 – [Proposed] Patent Owner’s Requests for Admission to Petitioner
`
`Currently Filed
`Exhibit 2011 – Declaration of Roger Stewart
`
`Exhibit 2012 – Deposition transcript of Miltiadis Hatalis, Ph.D dated May 20,
`2013
`
`Exhibit 2013 – Declaration of Miltiadis Hatalis, Ph.D, Exhibit 1007 in IPR2013-
`00068
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`- ii -
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`

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`I.
`
`INTRODUCTION
`
`Semiconductor Energy Laboratory Co., Ltd. (“Patent Owner”) provides this
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`response under 35 U.S.C. § 316(a)(8) and 37 C.F.R. § 42.220 and respectfully
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`submits that U.S. Patent No. 5,513,028 (“Sono”) and the admitted prior art
`
`(“APA”) with Sono and U.S. Patent No. 5,504,601 (“Watanabe”) fail to render
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`obvious claims 7 and 17 of U.S. Patent No. 7,956,978 (the “’978 patent”).
`
`Specifically, Sono fails to disclose numerous limitations of both claims 7 and 17,
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`and Watanabe and the APA fail to cure the deficiencies of Sono. Accordingly, the
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`claims are patentable over the prior art and Patent Owner respectfully requests that
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`claims 7 and 17 be confirmed.
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`II. THE REAL PARTIES IN INTEREST
`Patent Owner respectfully submits that the Board lacks statutory authority to
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`consider the Petition because Petitioner failed to identify all real parties-in-interest
`
`according to 35 U.S.C. § 312(a)(2). Notably, Chi Mei Optoelectronics USA, Inc.,
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`Acer America Corporation, ViewSonic Corporation, VIZIO
`
`Inc., and
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`Westinghouse Digital, LLC are real parties-in-interest, which Petitioner failed to
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`identify in its Petition. See Paper No. 8, Preliminary Response, (“Preliminary
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`Resp.”), at 3-7; Paper No. 13, Request for Rehearing (“Reh. Request”), at 1-6. The
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`Petition should have been denied on this ground.
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`1
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`III. THE ’978 PATENT
`A. The Background of the Technology
`The ’978 patent relates to an active matrix LCD device for reducing
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`problems associated with the TFT and counter substrates being bonded together
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`with an uneven cell gap and for preventing moisture from entering from the
`
`exterior. Preliminary Resp., at 12; Ex. 1001, ’978 patent, at col. 1, ll. 7-11, col. 12,
`
`ll. 38-50, and col. 14, ll. 7-27; Ex. 2011, Declaration of Roger Stewart (“Stewart
`
`Decl.”), at ¶¶ 36-53. As the Decision to Institute (“Decision” or “Dec.”) notes, an
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`LCD with an uneven cell gap, due to wiring inconsistently crossing the sealing
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`material on the four sides of the sealant, results in a deteriorated image quality.
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`Paper No. 9 (“Decision” or “Dec.”), at 2-3; Preliminary Resp., at 12-13; Ex.
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`1001, ’978 patent, at col. 1 l. 27-col. 2, l. 58, FIGS. 16, 17. The ’978 patent solves
`
`this problem by using dummy structures (or as the claims recite, conductive layers)
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`to create a uniform sealant between the two substrates. Preliminary Resp., at 12-
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`17; Dec., at 3; Ex. 1001, ’978 patent, at col. 6, ll. 16-49, and col. 13, l. 14-col. 14, l.
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`54, FIGS. 1, 9; Ex. 2011, Stewart Decl., at ¶¶ 41-53. Through the use of these
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`dummy structures, deterioration of the liquid-crystal and deterioration of image
`
`quality are prevented and other advantages are achieved. Ex. 2011, Stewart Decl.,
`
`at ¶¶ 41-53.
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`2
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`

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`The Advantages of the Claimed Invention
`
`B.
`The ’978 patent discloses three advantages from the claimed invention, all of
`
`which are achieved by claims 7 and 17. The Petition states that “Sono, just like
`
`the ’978 patent, describes the use of dummy areas for the purpose of providing a
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`uniform cell gap that avoids unevenness in display color. (Ex. 1003, at col. 2, ll.
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`10-13) (Ex. 1005, Hatalis Decl. at ¶ 32).” Paper No. 2 (“Pet.”), at 14; Ex. 1005,
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`Declaration of Miltiadis Hatalis, Ph.D. (“Hatalis Decl.”), at ¶ 32 (“Sono also
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`attempts to solve the very same problem described in the ’978 patent, in the very
`
`same manner.”). Dr. Hatalis also contends that “Watanabe also a [sic] describes
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`(shows or teaches) how to solve the very same problem described in the ’978
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`patent, in the very same manner.” Ex. 1005, Hatalis Decl., at ¶ 49. Contrary to the
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`foregoing assertion in the Petition and Declaration of Dr. Hatalis, the ’978 patent
`
`includes elements that achieve effects for solving problems that are not described
`
`in Sono and Watanabe. Thus, the ’978 patent is an invention totally different from
`
`Sono and Watanabe. These three advantages and effects of the ’978 patent are
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`described below.
`
`1.
`
`Uniform Cell Gap
`
`Generally, the ’978 patent relates to the peripheral configuration of an LCD
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`panel, which is manufactured by bonding two substrates, a TFT substrate and a
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`counter substrate, together by using a sealing material. A portion of the gap
`3
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`between the two substrates is filled with liquid crystal material, which is retained
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`by the sealing material. This results in two types of areas, depending on whether
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`or not the wiring to connect to the external drive circuits is formed in the sealing
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`area. As can be seen in prior art FIG. 17 below, wirings cross the area on the right
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`side sealant but they do not cross the sealant on the opposite side. When the two
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`substrates are bonded together, the gap between the two substrates is uneven, for
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`example, as shown in Scheme 1a below. Due to wiring crossing the sealant in
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`some areas and not others, it is difficult to achieve a uniform gap between the
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`substrates, which leads to nonuniformity of the display and deteriorated image
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`quality. The ’978 patent solves this problem. For example, as can be seen in
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`annotated FIG. 1 below, in area R3 the wirings cross the sealant, but on the
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`opposite side, area R1, no wirings cross the sealant. The ’978 patent discloses,
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`however, that in R1, and along the length of that edge, dummy structures exist to
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`correct for the wiring that crosses the sealant at R3. Ex. 1001, ’978 patent, at col. 4,
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`ll. 6-14; see also Ex. 2011, Stewart Decl., at ¶ 41-53.
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`4
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`
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`Specifically, the ’978 patent discloses the use of dummy structures or
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`conductive layers of the same thickness as the wiring to achieve a uniform cell gap
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`and uniform thickness of the sealing material. See Ex. 2011, Stewart Decl., at ¶¶
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`43-47. A conductive layer (or dummy wiring) having the same thickness as the
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`wiring that transverses the sealing material is formed in the area where there is no
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`wiring under the sealing material, as shown in Scheme 1b. Thus, by maintaining a
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`5
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`uniform gap between the two substrates, the nonuniformity of display disappears
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`and a high accuracy display becomes available.
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`This advantage is achieved by claims 7 and 17. Specifically, claims 7 and
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`17 include the limitation: “at least first and second conductive layers formed from
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`a same layer as the plurality of second conductive lines, wherein at least part of
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`each of the first and second conductive layers is overlapped with the portion of the
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`sealing member.” By forming the conductive layers from the same layer as the
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`second conductive lines in the sealing member, dummy structures of the same
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`thickness under the sealing member in areas where no conductive lines exist can be
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`created to achieve a uniform cell gap. See, e.g., Ex. 1001, ’978 patent, at col. 13, ll.
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`51-66, FIG. 9; see also Ex. 2011, Stewart Decl., at ¶¶ 44-47.
`
`2.
`
`Preventing the Entry of Moisture
`
`Another problem addressed by the ’978 patent is moisture entering from the
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`exterior into the display region and resulting in deterioration of the liquid crystal
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`material. Ex. 1001, ’978 patent, at col. 2, ll. 23-30, col. 5, ll. 19-25, col. 13, ll. 44-
`
`50, col. 14, ll. 18-27.
`
`The ’978 patent addresses this moisture problem by providing dummy
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`structures that are effective in preventing the entry of moisture from the exterior
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`into the display region. That is, the length and arrangement of the dummy
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`structures are such that the dummy structures block moisture from entering the
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`display region. See Ex. 2011, Stewart Decl., at ¶¶ 48-49, 67, 90, 111, 112. Scheme
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`2 below is an enlargement of the red box in annotated FIG. 1 above. For example,
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`as can be seen by the topmost blue line, moisture generally enters from interfaces
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`between the wiring and the sealing material. However, if the dummy structure
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`overlaps the sealing portion (i.e., region R1) extending in a first direction, and the
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`dummy structure is formed from the same layer as the conductive lines (i.e.,
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`horizontal lines) extending in a second direction, and the length of the dummy
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`structure along the first direction is longer than a pitch of the conductive lines, then
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`the dummy structure can prevent moisture from getting through to the display
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`region, as seen by the bottom two blue lines in Scheme 2 below.
`
`
`Claims 7 and 17 have limitations that achieve this effect. This advantage is
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`attained by structures meeting the following limitations of claims 7 and 17:
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`
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`7
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`a first substrate having a first side edge extending in a first direction and a
`second side edge extending in a second direction orthogonal to the
`first direction
`…
`a plurality of second conductive lines extending over the first substrate in the
`second direction
`…
`a sealing member disposed between the first substrate and the second
`substrate, the sealing member having a portion adjacent to the first
`side edge;
`at least first and second conductive layers formed from a same layer as the
`plurality of second conductive lines, wherein at least a part of each of
`the first and second conductive layers is overlapped with the portion
`of the sealing member,
`wherein a length of the first conductive layer along the first direction and a
`length of the second conductive layer along the first direction are
`longer than a pitch of adjacent ones of the plurality of second
`conductive lines.
`
`
`Ex. 1001, ’978 patent, at claims 7 and 17. In other words, the effect of preventing
`
`the entry of moisture into the display region can be achieved with creating dummy
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`structures in the portion of the sealing member adjacent to the first side edge
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`extending in the first direction, which are orthogonal to the direction of the second
`
`conductive lines extending in the second direction, and which are formed from the
`
`same layer as the second conductive lines, and which have a length longer than a
`
`pitch of the second conductive lines along the first direction. See, e.g., Ex.
`
`1001, ’978 patent, at FIG. 1, 9, col. 5, ll. 19-25, col. 12, ll. 31-34, col. 14, ll. 18-27;
`
`see also Ex. 2011, Stewart Decl., at ¶¶ 48-49, 67, 90, 111, 112.
`
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`8
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`

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`3.
`
`Preventing Short Circuiting By Electrically Isolating the
`Dummy Wiring
`
`Another problem with manufacturing uniform displays is short circuiting.
`
`See Ex. 2011, Stewart Decl., at ¶¶ 50-52. LCD devices contain thousands of
`
`connections between tiny metal structures. As a result, if one connection short
`
`circuits, at least the surrounding connections will also short circuit. See Ex. 2011,
`
`Stewart Decl., at ¶¶ 51-52. The ’978 patent specifies that the dummy structures are
`
`electrically isolated from the conductive lines. Thus, generally, there is no
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`electrical interaction between the dummy structures and the conductive lines.
`
`Furthermore, the ’978 patent specifies that the dummy structures also are
`
`electrically isolated from each other. If dummy structures are used that are not
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`electrically isolated from each other and the conductive lines, then if one shorts,
`
`the entire display may be destroyed. See Ex. 2011, Stewart Decl., at ¶ 50-52. Thus,
`
`the ’978 patent teaches electrically isolated dummy structures to prevent short
`
`circuits from destroying the entire display. See, e.g., Ex. 1001, ’978 patent, at col.
`
`6, ll. 53-58, col. 13, ll. 61-66; see also Ex. 2011, Stewart Decl., at ¶¶ 51-52, 68,
`
`101, 102. This advantage is achieved by the following limitations in claims 7 and
`
`17:
`
`
`
`wherein the first and second conductive layers are electrically isolated from
`both the plurality of first conductive lines and the plurality of second
`conductive lines, and
`
`
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`9
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`

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`wherein the first and second conductive layers are electrically isolated from
`each other.
`
`
`Ex. 1001, ’978 patent, at claims 7 and 17
`
`
` Claims 7 and 17
`
`C.
`While specific limitations exist in claims 7 and 17 to achieve certain
`
`advantages of the ’978 patent as discussed above, all of the limitations of claims 7
`
`and 17 are interrelated and cannot be taken in isolation. Patent Owner respectfully
`
`submits that Section C of the Decision on Request for Rehearing (Paper No. 20,
`
`“Rehearing Decision” or “Reh. Dec.”) makes various misstatements in this regard.
`
`First, the Rehearing Decision misstates the connections between the first and
`
`second conductive lines and the thin film transistors and the pixel electrodes. On
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`page 6 of the Rehearing Decision, the Board states that “SEL does not explain
`
`clearly, by pointing to a specific claim phrase, how the Board overlooked a claim
`
`requirement precluding reliance on different portions of Sono’s conducting lines in
`
`the dummy regions and display regions. Contrary to SEL’s argument, claims 7 and
`
`17 do not preclude some of the thin film transistors and pixel electrodes, such as
`
`those in Sono’s dummy pixel area, from being electrically disconnected from the
`
`conductive lines.” Patent Owner respectfully submits that the following language
`
`in Claims 7 and 17 provides such support:
`
`a plurality of first conductive lines extending over the first substrate in the
`first direction;
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`a plurality of second conductive lines extending over the first substrate in
`the second direction;
`
`. . .
`
`a plurality of thin film transistors electrically connected to the plurality of
`first conductive lines and the plurality of second conductive lines;
`
`a plurality of pixel electrodes electrically connected to the plurality of thin
`film transistors.
`
`Ex. 1001, ’978 patent, at claims 7 and 17. Because of their antecedent basis, the
`
`thin film transistors responsive to claims 7 and 17 are the thin film transistors
`
`electrically connected to the first and second conductive lines, and the pixel
`
`electrodes responsive to claims 7 and 17 are the pixel electrodes connected to the
`
`thin film transistors. When a term is first introduced in a claim, it is referenced by
`
`“a.” After that, it may then be referred to as “the” or “said.” In other words, when
`
`a claim refers to “the component” there must be a previous reference to “a”
`
`component. See, e.g., Eastman Chemical Co. v. BASF Aktiengesellschaft, 47 Fed.
`
`App’x. 566, 573 (Fed. Cir. 2002) (affirming district court’s claim construction and
`
`reliance “on rules of patent drafting promulgated by the Patent Trademark Office,
`
`which state that the words ‘the’ and ‘said’ cannot be used unless the term modified
`
`by them has been previously defined”); Manual Patent Examining Procedure
`
`§2173.05(e). Here, the antecedent basis for the thin film transistors excludes from
`
`claims 7 and 17 thin film transistors that are not connected to both the first and
`
`second conductive lines. See Ex. 2011, Stewart Decl., at ¶¶ 57-58. Thus, the
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`limitations of claims 7 and 17 cannot be viewed in isolation, and the antecedent
`
`basis of the claim elements cannot be ignored.
`
`Second, because claims 7 and 17 require the thin film transistors to be
`
`electrically connected to the plurality of first and second conducting lines,
`
`conducting lines that are not connected to a thin film transistor do not meet the
`
`claim limitations for the first and second conducting lines. For the forgoing
`
`reasons, the Rehearing Decision misconstrues the first and second conductive lines
`
`that must intersect, and be partly overlapped by, the black matrix in claim 17.
`
`Thus, the Rehearing Decision states: “Claim 17 does not specify the location of the
`
`claimed intersections between the first and second conductive lines or require the
`
`intersections electrically to connect to transistors and electrodes.” Reh. Dec., at 6.
`
`Again, based on the claim language above demonstrating the antecedent basis for
`
`the thin film transistors and the first and second conductive lines, the “intersections
`
`between the first and second conductive lines” are the intersections of the first and
`
`second conductive lines that are electrically connected to the thin film transistors.
`
`Additionally, Patent Owner would like to clarify that “layer” as used in
`
`claims 7 and 17, “formed from the same layer” and “first and second conductive
`
`layers,” uses “layer” having the same meaning. Ex. 2011, Stewart Decl., at ¶¶ 61-
`
`66. In both these claim limitations, “layer” means a continuous, unitary structure.
`
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`12
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`Ex. 2011, Stewart Decl., at ¶¶ 61-63, 66. The specification explains that “the
`
`silicon film thus crystalized is etched to form active layers 203 (for a p-channel
`
`TFT) and 204 (for an n-type TFT) of TFTs in an island-like peripheral drive circuit
`
`and an active layer 205 of TFTs (pixel TFTs) in the matrix circuit, respectively.”
`
`Ex. 1001, ’978 patent, at col. 7, ll. 33-37; Ex. 2011, Stewart Decl., at ¶ 62.
`
`Additionally, “first and second conductive layers formed from a same layer as the
`
`plurality of second conductive lines” is supported by “[t]he starting film is
`
`patterned so that while the gate electrodes/wiring of a TFT are formed, dummy
`
`wirings 501 which are not electrically connected are formed as shown in FIG. 9.”
`
`Ex. 1001, ’978 patent, at col. 13, ll. 63-66. Here, “layer” is used to describe a
`
`“unitary structure.” Ex. 2011, Stewart Decl., at ¶¶ 61-63. That is, one of skill in
`
`the art would have understood that “small unitary structures (e.g., dummy wirings)
`
`expressed by ‘first and second conductive layers’ are formed from a large unitary
`
`structure (e.g., starting film) expressed by the ‘same layer.’” Ex. 2011, Stewart
`
`Decl., at ¶ 66. Thus, in order to meet the “first and second conductive layers” and
`
`“same layers” limitation of claims 7 and 17, a unitary structure formed from a
`
`same structure as the second conductive lines must exist.
`
`As depicted below, in the thin film semiconductor process, the following
`
`steps are repeated: (i) deposition; (ii) formation of the mask; (iii) etching; (iv)
`
`
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`13
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`

`removal of the mask. One of skill in the art would have understood that the
`
`claimed “same layer” indicates the metal film in the state of (i) and (ii) and the
`
`claimed “first and second conductive layers” indicate the metal film in the state
`
`(iii) and (iv). Ex. 2011, Stewart Decl., at ¶ 66. “One of skill in the art, at the time
`
`of the invention, would have understood that in this context, ‘first and second
`
`conductive layers formed from a same layer’ means ‘a first and second unitary
`
`structure formed from a unitary structure.’” Ex. 2011, Stewart Decl., at ¶ 61.
`
`
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`14
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`

`Further, these structures must be “electrically isolated” from each other,
`
`which one of skill in the art, at the time of the invention, would have understood
`
`means “no electrical interaction, free floating and not connected by a conductive
`
`
`
`
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`15
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`path,” in view of the disclosures of the ’978 patent. Ex. 2011, Stewart Decl., at ¶
`
`50.
`
`IV. THE ’978 PATENT IS PATENTABLE
`A. Background of the Prior Art
`1.
`The Sono Patent
`
`In the Petition and Decision, features of the dummy pixel are improperly
`
`attributed to the dummy circuit. See Pet., at 14-16; Dec., at 9-18. Specifically, the
`
`configuration of the dummy pixels and dummy circuits are different. However,
`
`Patent Owner respectfully submits that Sono discloses two different types of
`
`dummy structures: dummy pixels and dummy circuits, which are unrelated. Ex.
`
`2011, Stewart Decl., at ¶¶ 76-81. Figure 4 of Sono, annotated and reproduced
`
`below, depicts the dummy pixels outlined in blue. Figure 7 of Sono, annotated and
`
`reproduced below, depicts the dummy circuits disclosed in Sono highlighted in red.
`
`Ex. 2011, Stewart Decl., at ¶¶ 77, 81.
`
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`16
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`
`
`As shown in the figure on the right, the dummy pixels and dummy circuits
`
`of Sono relate to two completely different areas of the LCD device. Ex. 2011,
`
`Stewart Decl., at ¶ 80. Specifically, as shown in FIGS. 4 and 5, the dummy pixels
`
`are on the edge of the pixel area, within the sealing material 25; the dummy pixels
`
`are covered by liquid crystal—not sealing material 25. See Ex. 1003, Sono, at col.
`
`4, ll. 20-31. On the other hand, as shown in FIG. 7, the dummy circuits 74 and 75
`
`are outside of the pixel area 71 and completely under the sealant (i.e., seal are 76).
`
`Ex. 2011, Stewart Decl., at ¶ 80. Thus, the description of the dummy circuits
`
`cannot be applied to the dummy pixels and vice versa because the dummy pixels
`
`and dummy circuits are different and relate to two different portions of the display.
`
`Ex. 2011, Stewart Decl., at ¶ 80.
`
`Moreover, Sono also discloses that the dummy pixels and dummy circuits
`
`have different functions. Thus, one of skill in the art would not apply a disclosure
`
`related to one structure to the other. Ex. 2011, Stewart Decl., at ¶¶ 76-79. For
`
`example, Sono provides that the objective of the dummy pixels is the following:
`
`“By surrounding the display area with a dummy area as explained above, same
`
`orientation of the liquid crystal can be obtained in the end portions of the display
`
`area as in the central portion thereof, and image display of high quality can be
`
`attained.” Ex. 1003, Sono, at col. 4, ll. 27-31 (emphasis added). Thus, in Sono,
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`the dummy pixels are formed to attain the same orientation of the liquid crystal in
`
`the display area. Ex. 2011, Stewart Decl., at ¶ 78. The dummy circuits, however,
`
`have a different objective: “The present embodiment can provide a uniform liquid
`
`crystal cell gap, because patterns 72-75 of a same step are provided on the four
`
`sides of a pixel area 71 on the semiconductor substrate 78, and liquid crystal seal
`
`areas 76 are provided on said patterns.” Ex. 1003, Sono, at col. 6, ll. 27-31
`
`(emphasis added). Sono’s dummy circuits 74 and 75 explicitly correspond to
`
`peripheral scanning circuits 72 and 73 and are not equivalent to the dummy pixel
`
`area formed adjacent to the pixel area. Ex. 2011, Stewart Decl., at ¶ 79. Because
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`the function of the dummy pixels is to achieve the same orientation in the edge
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`portion of the pixel area and the function of the dummy circuits is to achieve a
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`uniform cell gap in the sealing portion, one of skill in the art would not apply a
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`disclosure regarding the dummy pixels to the dummy circuits and vice versa. “A
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`person skilled in the art would not have formed a dummy pixel area based on
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`attributes of Sono’s dummy peripheral circuit. Likewise, a person skilled in the art
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`at the time of the invention would not have formed a dummy circuit having, for
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`example, pixel electrodes.” Ex. 2011, Stewart Decl., at ¶ 80. Thus, Patent Owner
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`respectfully submits that the Decision errs, for example, in applying disclosures
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`18
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`regarding the formation and electrical isolation of the dummy pixels to the dummy
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`circuits. Dec., at 15, 18.
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`2.
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`The Watanabe Patent
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`In the Petition, CMI asserts that the separate gap adjusting layers 25 and 27
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`may be grouped so as to allegedly correspond to the claimed first and second
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`conductive layers in the ’978 patent. Pet., at 49-52, 55-59. Dr. Hatalis also
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`provides similar testimony. Ex. 1005, Hatalis Decl., at ¶¶ 52, 55; Ex. 2012, Hatalis
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`Dep., at 139:14-15, 141:2-4, 179:9-22. However, Patent Owner respectfully
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`submits that grouping the separate gap adjusting layers 25 and 27 disclosed in
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`Watanabe is improper.
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`19
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`Watanabe discloses gap adjusting layers 25 and 27 for adjusting the cell gap.
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`Watanabe discloses two key characteristics of gap adjusting layers 25 and 27. First,
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`the gap adjusting layers are formed so as not to short circuit with the signal and
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`scanning lines (which have lead portions 13 and 17, respectively). Ex. 1004,
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`Watanabe, at col. 5, ll. 49-51, col. 13, ll. 35-37; see also Ex. 2011, Stewart Decl.,
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`at ¶¶ 112. Second, the gap adjusting layers are formed from the same layer as the
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`conductive lines and lead portions 5, 9, 13, and 17. Ex. 1004, Watanabe, at col. 12,
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`ll. 49-65; see also Ex. 2011, Stewart Decl., at ¶¶ 112. Thus, as seen in Watanabe
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`FIG. 5 reproduced and annotated above, the substrate gap adjusting layers cannot
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`touch or extend over the lead portions, meaning adjusting layers 25 and 27 are
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`limited in size by their adjacent lead portions. Ex. 1004, Watanabe, at col. 13, ll.
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`35-48; see also Ex. 2011, Stewart Decl., at ¶¶ 112-113. For all of these reasons, as
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`discussed in more detail in Section IV.C. below, one of skill in the art, at the time
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`of the invention, would have understood that gap adjusting layers 25 and 27 cannot
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`be grouped.
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`3.
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`The Admitted Prior Art
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`The admitted prior art (APA) does not disclose the use of dummy structures
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`to create a uniform cell gap. Ex. 2011, Stewart Decl., at ¶ 70-75. As can be seen
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`below in annotated FIG. 17, because drive circuits 13 and 14 are provided inside
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`the sealing member, there exist regions R1 and R2 where wirings are not provided
`20
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`while in regions R3 and R4 wirings are provided. This causes an uneven sealant,
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`which can be seen in Scheme 2a below. Ex. 1001, ’978 patent, at col. 1, l. 62-col.
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`3, l. 11. The APA does not disclose the use of dummy structures or any other
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`solution to solve the problem of an uneven cell gap or to make it possible to
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`prevent moisture from entering from the exterior. Ex. 2011, Stewart Decl., at ¶¶
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`71-73.
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`
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`The ’978 Patent Is Patentable Over Sono
`
`B.
`It is respectfully submitted that the Petitioner cannot meet its burden of
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`proving that claims 7 and 17 are obvious over Sono, especially under the
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`requirements of 35 U.S.C. § 311(b) that a ground be “only on the basis of prior art
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`consisting of patents or printed publications.” That is, the Petitioner relies on Dr.
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`Hatalis’ opinions, which lack any support in the specification of Sono, rather than
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`disclosures in Sono. Even considering Petitioner’s reliance on Dr. Hatalis, the
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`
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`21
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`’978 patent is patentable over Sono because Sono fails to disclose the following
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`elements of claims 7 and 17: (1) first and second conductive layers; (2) first and
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`second conductive layers formed from a same layer as the second conductive lines;
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`(3) first and second conductive layers electrically isolated from each other; and (4)
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`first and second conductive layers having a length along the first direction that is
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`longer than a pitch of adjacent second conductive lines.
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`1. Sono Does Not Disclose First and Second Conductive
`Layers1
`Sono fails to disclose “first and second conductive layers.” Contrary to the
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`Board’s conclusion in the Decision (see Dec., at 12-18) and Rehearing Decision
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`(see Reh. Dec., at 7-8), Sono does not teach either explicitly or in context that
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`dummy circuit 74 or 75 includes first and second conductive layers or “long
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`conductive layer runs.” Petitioner’s entire argument is based on declaration
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`testimony from Dr. Hatalis that the dummy circuits would have power, ground, and
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`clock lines, which would be the long conductive layers. Ex. 1005, Hatalis Decl.,
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`1 Dr. Hatalis clarified in his deposition that he is not relying on the dummy pixels
`of Sono for the disclosure of “first and second conductive layers.” Thus, in
`Sections IV.B. 1-4, this analysis focuses on the dummy circuits of Sono. See Ex.
`2012, Hatalis Dep., at 200:2-4. Patent Owner provides the explanations to
`demonstrate why Dr. Hatalis, and Petitioner cannot rely on the dummy pixels of
`Sono for the disclosure of the “first and second conductive layers.” See Section
`IV.A.1.; see also Preliminary Resp., at 34-36
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`22
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`at ¶¶ 25, 39. However, Sono does not disclose the structure of dummy circuits 74,
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`75 or the structure of the scanning circuits 72, 73. While Sono discloses that the
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`dummy circuits 74 and 75 are formed from the “same process” and have the “same
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`st