IVI LLC EXHIBIT 2012
`XILINX V. IVI LLC
`IPR Case 2013-00029
`
`

`

`US 6,266,037 B1
`Page 2
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`U.S. PATENT DOCUMENTS
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`US 6,266,037 B]
`
`l
`WAFER BASED ACTIVE MA'I‘RIX
`
`This application is a continuation of application Ser. No.
`(J8r'023,475, filed Feb. 25, I993. which is a continuation of
`application Ser. No. (t7.*'392,859, tiled Aug. ll, [989 now
`abandoned.
`
`BACKGROUND OF THE INVEN'I‘ION
`
`the invention relates generally to light encoding systems
`and more particularly to a wafer based active matrix reflec-
`tive light encoding system.
`During the last two decades. there have been numerous
`efforts to develop and commercialize light encoding systems.
`such as flat panel displays to effectively compete with the
`conventional cathode ray tube (CRT) or to develop products
`which are not possible utilizing CR’I"s. Of these efforts,
`plasma display panels (I’Dl’), electroluminescent displays
`(EL) and several types of liquid crystal displays (LCD) have
`clearly been the most successful and have exhibited the most
`dynamic growth and future potential. One specific type of
`display. active matrix liquid crystal displays (AMI..("D). has
`demonstrated su fiieient performance to address some major
`market segments.
`The cost ofAMI.('.‘])‘s is largely determined by the yield
`of useable devices, where the yield is the percentage of
`useable devices from the total produced. Yield of AMIITD’s
`is in large part determined by the device design, manufac-
`turing process tolerance and the display size. In general, the
`larger the display size, the lower the yield and hence higher
`the cost of the device.
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`The first direct view AMICI) utilizing a single crystal
`silicon wafer was produced in the early 1970's. Work on this
`development continued into the early IOSO‘s, utilizing stan-
`dard crystal silicon wafers and wafer fabrication techniques.
`This work appears to virtually have been abandoned since
`the display sizes are limited to less titan the available wafer
`size and because the wafers are not
`transparent. These
`devices utilized dynamic scattering guest—host or dyed phase
`change rather
`than conventional
`twisted nematic LC
`material, which required expensive and elaborate photoli-
`thograpliy to produce the required diffuse reflective alumi-
`num back surface. These devices do provide fast, high
`performance and stable displays with integrated address and
`drive circuitry.
`New markets have been recognized which include home
`theatre high definition ‘l'V. audio visual machines and high
`resolution large area computer aided design (CAD) stations.
`Each of these markets require very large, high resolution.
`full color and video speed imaging. In reviewing these
`marketsApplicant has determined that the large area dictates
`projection systems. either front or rear projection, that the
`high resolution requires integrated drivers and that projec-
`tion systems do not require either transparent substrates or
`large display sizes. Further,
`these markets all essentially
`utilize what can be considered iight encoding devices. Other
`types of light encoding devices include wafer or printed
`circuit board mask sets.
`
`It, therefore, would be desirable to provide a wafer based
`active matrix reliective light encoding system having high
`resolution, integrated drivers and manufactured with con—
`ventional wafer fabrication techniques.
`SUMMARY OF INVENTION
`
`The disadvantages of the prior art light encoding systems
`and techniques are overcome in accordance with the present
`invention by providing a wafer based active matrix reflective
`light encoding system utilizing a conventional wafer.
`A source of light
`is directed to the wafer based active
`matrix which imparts or encodes information onto a light
`beam reflected therefrom. The wafer based active matrix
`includes a specular reflective back surface and an I.(‘ or
`similar characteristic material formed thereon which is elec-
`tronically altered to impart or encode the information to the
`light beam reflected therefrom. The LC material preferably
`is a solid light modulating material having bodies of LC
`material suspended in the solid material.
`The matrix transistors can be any conventional type of
`crystalline based structure, such as NMOS, CMOS or
`PMUS. The pixel capacitor can be a junction or oxide type
`capacitor or a combination thereof. The matrix bit andi’or
`word lilies can include strapping to prevent open lines. The
`transistors can be coupled to the bit and.’or word lilies by
`fuses to prevent shorts associated with a single pixel from
`shorting a whole line.
`'l'he wafer based active matrix can be mated to a light
`directing and projecting structure to form a reflective image
`plane module. The reflective image plane module light
`projecting structure projects the rellected beam for viewing
`or imaging, such as through one or more lens. The reflective
`image plane module light directing and projecting structure
`is formed from a prism or mirror which passes the light or
`light component through a first surface to the wafer based
`active matrix mated to a seconrl surface and which projects
`the reflected light from the first surface to be viewed or
`imaged.
`BRIEF DESCRIPTION 015 THE DRAWINGS
`
`FIG. I is a diagrammatic view ofa prior art light encoding
`transmissive projector system;
`
`The focus of etIorls in recent years has been in developing,
`direct view display sizes large enough to replace existing TV
`and com pttter monitors. Pocket TV's have been introduced
`having one to three inch wide display screens, with the
`expressed goal of producing larger displays as volume and ‘
`yield increase. An intense elfort is being made to produce a
`fourteen inch diagonalor larger display. The ultimate goal of
`some ell‘orts is to produce wall size direct view displays for
`the TV market. This goal is very likely to be frustrated by the
`inherent obstacles in producing a CRT or any other type of
`direct view display of that size.
`The AMICD effort has concentrated on utilizing a matrix
`of nonlinear devices on a glass or fused silica substrate. The
`nonlinear devices allow individual control over each display
`picture element or "pixel" to provide superior optimal
`performance. The nonlinear devices generally are amor—
`photls or polycrystalline silicon thin lllm transistors (TI-"U;
`however, thin lilm diodes (TFD) and metal-insulator-metal
`(MIM) devices also have been employed.
`A transparent substrate is considered necessary for these
`displays, because most liquid crystal (LC) materials require
`a polarizer at both the front and the back ot'the LCD device.
`Further, the conventional position on color displays is that
`they must be transmissive rather than reflective, because of
`the light losses inherent in the color rellective mode.
`In developing larger size displays, substrate cost becomes
`important. Amorphous silicon TII'f AMLCD's utilize inex-
`pensive drawn glass. Polycrystalline silicon on the other
`hand, requires either very high temperature glass or fused
`silica substrates. Either of these substrates is prohibitively
`expensive in widths over eight
`inches. The inexpensive
`amorphous silicon AMLCD substrates are offset by the fact
`that these displays require separate address devices which
`result
`in several hundred interconnections to the display
`substrate. Polycrystalline silicon AMLCD's allow integra-
`tion of the addressing circuitry on the substrate which
`reduces the number of interconnections to a very few.
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`US 6,266,037 B]
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`3
`FIG. 2 is a schematic block diagram ol~ a water based
`active matrix embodiment of the present present invention;
`FIG. 3 is a schematic diagram 01‘ one pixel of the wafer
`based active matrix 01. FIG. 2;
`FIG. 4 is a partial cross section ot'one pixel embodiment
`ol‘ the wafer based active matrix of FIG. 2;
`FIGS. 5A 6’: 5B are top and side sectional views ot‘ a
`reverse bias junction capacitor strtlcture ol‘
`the present
`invention;
`H G. 6 is a further cross section view of the structure of
`FIG. 5;
`FIG. 7 is a cross sectional view of an oxide capacitor
`structure of the present invention;
`FIG. 8 is a cross sectional view of a combination capacitor
`structure of the present invention;
`FIGS. 9A, 9B and 9C are cross sectional views of other
`oxide capacitor structures of the present invention;
`FIGS. 10A, 1015 and Inc are cross sectional views of
`further oxide capacitor structures of the present invention;
`FIG. 11 is a diagram illustrating one pixel embodiment of
`the present invention:
`FIG. 12 is a diagram illustrating, one subdivided pixel
`embodiment;
`FIG. 13 is a schematic diagram of a [use protected pixel
`embodiment ol‘ the present invention;
`FIG. 14 is a diagrammatic perspective view illustrating
`the activation ol~ a conventional LCD structure;
`FIGS. 15A, 15B, 15C, 15D and 1513 are schematic cross
`sections of polymer disperser] LC material illustrating the
`operation thereof;
`FIGS. 16A and 1613 are of cross sectional views of a
`lateral drive LCD embodiment of the present invention;
`FIGS. 17A and 1713 are cross sectional vich ol‘a second
`lateral drive LCD embodiment of the present invention;
`FIG. 18 is a plan view of a lateral drive LCD structure of
`the present invention;
`FIG. 19 is a cross sectional view taken along the line
`19—19 in FIG. 18;
`FIG. 20 is a diagrammatic plan view ol‘ a bitt'word line
`strapping embodiment of the present invention:
`FIG. 21 is a cross sectional view taken along the line
`21—21 in FIG. 20;
`FIG. 22 is a cross sectional view taken along the line
`22—22 in FIG. 20;
`FIG. 23 is a plan view of one biti'Word line strapping
`embodiment structure of the present invention;
`FIGS. 24A, 248 and 24C are diagrammatic top, front and
`side views of one reflective image plane module embodi-
`ment utilizing the water based active matrix of the present
`invention;
`FIGS. 25A, 258 and 25C are diagrammatic top, front, and
`side views of a second reflective image plane module
`embodiment utilizing the wafer based active matrix of the
`present invention;
`FIG. 26 is a diagrammatic side view of one projection
`system embodiment utilizing the water based active matrix
`of the present invention; and
`FIG. 27 is a diagrammatic side view of yet another
`projection system embodiment utilizing a water based active
`matrix of the present invention.
`DESCRIPTION 0]" THE PREFERRED
`EMBODIMENTS
`
`One major utilization of light encoding devices is light
`encoding projector systems. The wafer based active matrix
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`light encoding system ofthe present invention is not limited
`to utilization in such systems; however, projector systems
`will be described for example purposes.
`Referring to FIG.
`I. a prior light an light encoding
`transmissive projection system It)
`is
`illustrated. A light
`source 12 provides light to a lens or lens system 14, which
`directs the light
`to a
`transmissive LCD 16. A video or
`computer signal source (not illustrated) is coupled by a line
`18 to a video drive circuit 211. The video drive circuit 20
`
`operates on the signal coupled thereto and generates the
`required drive signals coupled over a line 22 to the LCD 16.
`Typically the drive signals will be the audio, red video, blue
`video, green video, vertical sync, horizontal sync, reset and
`pixel clock signals. The drive signals cause the pixels of the
`LCD 16 to block or transmit light to impart or encode the
`required information onto the light transmitted through the
`LCD 16 to a lens or lens system 24 which projects the
`composite color picture onto a screen 26. A monochrome
`projection system would operate in the same manner with
`only one video light component, rather than the separate
`blue, green and red video signals.
`One prior art
`transmissive projection system has been
`developed by Seiko Epson Corp. and utilizes three separate
`LCD panels, one for each of the blue, green and red video
`signals. The signals then are combined by a dichroic prism
`prior to projecting onto the screen.
`'l‘hese transmissive
`projection systems sufl'er l'rom a number 01' problems. One
`significant problem is caused by the construction required by
`the LC material. The LCD panels include a polarizcr on each
`side of the LC material, such as twisted nematic material.
`and are utilized as a shutter to absorb the light not
`to be
`transmitted. Both the polarizers and the LC material absorb
`light which generates heat, which is deleterious to the LCD
`panel. Further, because of the two polarizers, and the I_(.‘
`material utilized, only about fifteen per cent or less of the
`light directed to the LCD panel is transmitted therethrough
`[or projection to the screen. The devices exhibit
`low
`brightness, because of the amount of light absorbed.
`Further, thc resolution of the transmissive panels, typi-
`cally based upon amorphous silicon deposited active matrix
`devices, is not as great as that which could be achieved if
`crystalline based techno logy was utilized. The pixel density
`can be made greater by placing the pixel drain pads centered
`over row and column lines in crystalline devices. Amor—
`phous silicon devices have to leave spaces between pixels
`for the row and column lines and hence cannot be packed as
`densely without severely decreasing the yield.
`As mentioned above, deposited amorphous silicon
`devices have a much greater number of LCD panel
`inter—
`connects. This decreases reliability and tncrcases cost. These
`devices are also designed as large area devices which again
`decreases yield and increases costs.
`[1" polysilicon is utilized to decrease the number of
`interconnects, other problems occur since the polysilicon
`transistors are leaky. 'I‘herel'ore, typically these LCD devices
`utilize two transistors in series at each pixel, which again
`decreases reliability and increases costs.
`Referring to FIG. 2, a block diagram of a water based
`active matrix embodiment ot‘ the present invention is des—
`ignated generally by the reference numeral 30. The wafer
`based active matrix 30 preferably is formed on a conven—
`tional silicon wafer, which forms a substrate 32 [or the water
`based active matrix 3|]. 'l‘ypically, the substrate 32 will be
`only a segment ol’ a wafer, as a plurality ol‘ the wafer based
`active matrices 3|) will be formed at the same time on a
`wafer.
`
`

`

`US 6,266,037 B]
`
`5
`The wafer based active matrix 30 includes a plurality of
`bit or column lines 34 fomted into a matrix intersecting a
`plurality of word or row lines 36. The bit
`lines 34 are
`coupled to a conventional bit sample and hold circuit 38,
`which preferably also is formed onto the wafer segment 32
`as a part ofthe wafer based active matrix 30. The word lines
`36 are coupled to a conventional word select shift register
`40, also preferably formed on the wafer segment 32.
`An analog or digital data signal will be fed to the circuits
`3S and 40 on an input line 42. The data signal is derived from
`a standard signal source, such as NTSC or HDTV television
`or computer graphic signals. The standard signal is fed to a
`video interface board where the signal is decomposed into
`seVen parallel signals: audio, red analog video. green analog
`video, blue analog video, vertical sync, horizontal sync,
`reset and the pixel clock which then are fed to the line 42.
`Referring to FIG. 3, a pixel 44 of the wafer based active
`matrix 30 is illustrated schematically. (ienerally, a pixel or
`picture element, is formed of a size approximating the space
`between an intersecting set ofbit lines 34 and word lines 36.
`The pixel 44 can he formed between the lines or. as will be
`discussed hereafter, can be formed over the intersections of
`the bit and word lines 34, 36. In any event. a transistor 46
`of a conventional structure, preferably NMOS, ("M03 or
`t’MOS. is coupled to each pair of intersecting bit and word
`lines 34, 36 to activate or deactivate the pixel 44.
`A cross section, not to scale, of one embodiment of the
`pixel 44 is illustrated in FIG. 4. The pixel 44 is formed on
`the substrate segment 32 and includes a capacitor structure
`48 formed onto the segment 32. Aspecular aluminum alloy
`layer or back reflector 50 is formed on the capacitor 48. The
`specular alloy Iayer 50 acts as a mirror to reflect light from
`the wafer based active matrix 30. An LCD or similar
`
`characteristic material 52, such as an electrophorctic mate—
`rial
`is formed onto the reflector 59. One preferable LCD
`material
`is a solid light modulating material formed of a
`polymer matrix having bodies of LC material suspended
`therein. Examples olisttch LCD materials are described in
`US. Pat. Nos. 4,435,047 and 4,688,900, which are incor-
`porated herein by reference. This polymer dispersed LCD
`material (hereinafter PIMP.) requires higher operating volt-
`ages on the order of [2 volts RMS, which is far more suited
`to crystalline active matrix devices than to polysilicon or
`amorphous silicon devices. The crystalline devices also have
`greater current carrying capacity and faster switching
`speeds.
`An activating electrical contact layer 54 is formed on top
`of the LCD material layer 52. The layer 54- preferably is
`formed from indium tin oxide (ITO). Although not
`illustrated. a thin oxide layer could be formed between the
`layers 52. and 54, if necessary to prevent a l')(..‘ offset on the
`layer 52. This would complete the pixel structure 44, with
`the ITO layer 54 formed directly onto the LCD material
`layer 52. This should be possible on the solid host PDLC
`material, but for other types of LCD material, as well as for
`different processing techniques, a further glass top layer 56
`can be utilized on top of the layer 52.
`Utilizing the glass layer 56, the ITO layer 54 could be
`formed thereon and then the two layers 54, 56 placed onto
`the layer 52. The layer 52 preferably still would he semi—
`liquid and also could be formed onto the ”U layer 54 on the
`glass 56 and then all three layers 52, 54 and 56 placed onto
`the rellective layer 50, where the layer 52 solidilies.
`When utilizing the FDIC material 52, the refractive index
`ol‘the LC material matches the index of the polymer matrix
`when the pixel
`'44 is activated. When the indexes are
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`6
`matched, very little light is scattered and most of the light is
`rellected oil‘ the rellector 50 back out of the pixel 44 and
`hence the wafer based active matrix 30. When a field is not
`present on the layer 52, the indexes do not match and most
`ot‘the light is scattered. The light is still reflected or scattered
`out of the pixel 44 and hence the wafer based active matrix
`30, but the light is dispersed resulting in a black or 011' pixel
`when projected. Since the scattering is proportional to the
`field applied to the pixel 44, a gray scale can be obtained by
`utilizing a range of voltages.
`The wafer based active matrix 30 can be a very high speed
`and dense matrix since it
`is formed utilizing conventional
`crystalline technology. Utilizing high speeds, the circuit 38
`preferably would be multiplexed. such as into eight seg-
`ments to decrease the sampling time. The output of the eight
`segments then can be sent in parallel to the wafer based
`active matrix 30.
`
`With the increased switching speeds and increased current
`capacity of the crystalline transistor 46, the pixel 44 can be
`charged much faster than with amorphous silicon devices.
`Amorphous silicon devices have a relatively long turn on
`time and a low current capacity. Since the bit and Word lines
`34. 36 are relatively long. there is an associated line capaci—
`tance. As the frame rate and number ofpixel lines increase,
`there is a shorter and shorter time period in which to charge
`the capacitor. There can be a requirement of a 10 microsec-
`ond turn on and charge time. An amorphous silicon device
`can take two to live microseconds just to turn on.
`A further advantage of utilizing the crystalline active
`matrix devices is the fact that the PDIC material has a low
`resistivity relative to other LC materials. Since a charged
`pixel must have a time constant of about
`live frame time
`periods to accurately reproduce good gray scale, the native
`capacitance or the PDI..(‘. material 52 can't be utilized solely
`by itself, but requires the separate capacitor 48. Typically
`amorphous active matrix devices utilize a different LCD
`material, such that the native LC capacitance can be utilized.
`This is specially true. since it is dillicult to deposit a good
`thin lilm oxide for utilization as a capacitor. Utilizing
`crystalline technology, a grown oxide can be formed on the
`crystalline substrate 32 which is orders of magnitude better
`than a deposited oxide.
`Applicant
`ltas developed a wafer based active matrix
`structure 30, which utilizes a minimum number of metal
`layers, a variety ot'capacitor structures and various enhance—
`ment features. The preferred structure 30 includes diffused
`bit lines 34 and deposited polysilicon word lines 36, with
`aluminum alloy drain pads 50. Utilizing diffused hit iines34,
`shorts between the hit and word lines 34, 36 at the crossovers
`are minimized since a grown field oxide is formed between
`the lines. Opens in the lines are virtually eliminated, because
`the diffused bit
`lines 34 have very high integrity and the
`polysilicon Word lines 36 provide good adherence to the
`structure and provide good step coverage. Since the bit lines
`34 are diffused into the substrate 32, steps over the bit lines
`34 are eliminated.
`
`There are a substantially infinite variety of capacitor
`structures 48, which can be utilized with the wafer based
`active matrix 30 of the present invention. These structures
`can he an oxide—dielectric based capacitor structure,
`a
`reverse bias junction structure or a combination of the two.
`Referring to FIGS. 5A and SE, a reverse bias junction
`capacitor structure 60 of the present invention is illustrated.
`The capacitor 60 includes a source 62, such as an N+ doped
`region implanted in a P type substrate 32, coupled by a gate
`64 to a large implanted N+ doped drain 66. The gate 64 is
`
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`US 6,266,037 B]
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`1!]
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`15
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`‘
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`311
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`7
`formed over a gate oxide layer 68, which can be a Iield oxide
`(FOX) grown on the substrate 32. The drain 66 forms a
`reverse bias junction 70 between the N+ drain 66 and the P
`substrate 32. lb is reverse bias junction 70 forms a depletion
`region between the two regions which acts like a capacitor.
`A cross section of one capacitor structure 48 connected to
`the reflector or electrode 50 is illustrated in FIG. 6. The
`substrate 32 in this embodiment is a l’— doped wafer and
`thus requires a lJ layer 72 to be implanted before the N+
`layer 66 to provide a sullicient charge dill'erence for the
`capacitor structure 48. The layer 66 is optionally covered by
`an oxide layer 74, such as a vapor deposited oxide
`(VAPOX). The VAPOX layer 74 provides an enhancement
`to the layer 66. since the odds of a defect in the layer 66
`coinciding with a pinhole opening in the VAI’DX layer 74 is
`minimal. Aconnection between the layer 72 and the rellector
`50 Would form a short or other leakage path. Further, the
`rellector 50 is connected to the layer 66 through a via 76 in
`the layer 74 to provide an electrical connection therebe-
`tween. Again, a defect in the layer 66 coinciding with the
`small via 76 is very unlikely.
`'ll'te VAI-‘UX layer 74 also can be added for smoothing
`purposes. The VAI’OX layer 74 is deposited and then heated
`which smooths the upper surface thereol‘ as well as rounding
`the edges of the layer, for example, the edges of the via 76,
`for better step coverage of the aluminum layer 50.
`The capacitor structure 48 also can he an oxide-dielectric
`type capacitor structure 78 as illustrated in FIG. '1'.
`'Ilte P-
`substrate 32 includes a 13+ doped layer 80 to minimize the
`depletion region and maximize storage capacitance with a
`FOX layer 82 grown thereon. The FOX layer 82 is covered
`by the reflector 50 with the capacitor 78 being l‘ornted by the
`layers 80, 82 and 50.
`If desired, the two capacitor structures can he combined ‘
`to form a capacitance structure 84 as illustrated in FIG. 8.
`The combined capacitor structure 84 provides protection
`from an electrical short
`in one of the two capacitor
`structures, which are essentially a combination ol"the capaci-
`tor structures 48 and 78. The two capacitors 48 and 78 are
`formed in series with the layer 66 being a common plate,
`such that a short in one capacitor leaves the other operating
`capacitor so that the pixel is still operational.
`The gate oxide of each pixel also can he utilized as a part
`of an oxide capacitor structure 86. 88 and 90 as illustrated
`in FIGS. 9A, 9B and 9C. Each of the structures 86, 88 and
`90 form two capacitors in parallel, one formed by the gate
`oxide area 68 and the second formed over :1 FOX layer 92
`which could be substantially coexistent with the whole pixel
`area. The capacitor 86 includes only the FOX layer 92,
`although an additional VAPOX layer (not illustrated) could
`be added over the FOX layer 92 ildesired. The capacitor 88
`includes an additional polycrystalline layer 94 formed over
`the FOX layer 92 as an enhancement to the layer 50. In some
`instances, the doping process or implanting roughens the _
`surface of the substrate 32. In those types ol‘ processes, a
`further VAI’OX layer 96 is formed on top of the poly layer
`94 or the FOX layer 92, since the VAPOX layer 96 is very
`smooth and provides a smooth surl‘aee for adherence of the
`reflective layer 50. The layer 50 is connected to the poly
`layer 94 through a via 98.
`Oxide capacitor structures 100, 102 and 104, which are
`similar to the capacitor structures 86, 88 and 90 are illus—
`trated in FIGS. 10A, 10B and 10C. The capacitor structures
`100, 102 and 104 do not utilize the gate oxides. The
`capacitor structures [00, I02 and 104 are otherwise essen-
`tially the same as the structures 86. 88 and 90. The FOX
`
`411
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`45
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`511
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`{)[J
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`65
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`8
`layer 92 is a further growth ol‘ the gate oxide 68, alter the
`gate oxide lirst is treated as desired and masked to prevent
`further growth. The tradeoll‘ between the capacitor structures
`86, 88 and 90 versus the capacitor structures 100, 102 and
`104 is dependent upon the relative size ot'the gate oxide area
`68 versus the rest of the pixel area. As the pixel density is
`increased. the gate oxide area 68 can become large versus
`the rest of the pixel area. The tradeoll dc pends upon which
`area provides the smallest defect density.
`Referring to FIG. 11, a further pixel embodiment 106 is
`illustrated, which is formed over an intersection 108 ol‘ the
`bit lines 34 and the word lines 36.
`In the pixel 106, Four
`capacitors III), 112, 114 and 116 are formed by depositing
`the Vl’l’QX layer 96 over the whole structure including the
`crossover 108 and transistor 46. The VAI’UX layer 96 then
`is removed Irom the area ol‘the capacitors 110. 112, 114 and
`116. The oxide layer can be either the gate oxide 68 or the
`FOX layer 82 or both, as illustrated in capacitor 112. The
`VAPOX layer 96 provides protection [or the lines 34, 36,
`crossover 108 and the transistor 46, when the metal layer or
`pad 50 is deposited over the whole pixel 106. The structure
`106 provides a very dense wafer based active matrix since
`the pixel 106 can be very close to the adjacent pixel 106'. A
`space 118 is left between the pixels 106 and 106', which is
`only limited by the minimum feature size of the wafer
`process and can be much smaller than the width of the lines
`34, 36. The electrode pad 50 also forms a light shield for the
`transistor 46.
`
`Asubdivided pixel embodiment 120 ol‘the present inven—
`tion is illustrated in FIG. 12. The pixel 120 includes four
`separate subpixels 122, 124, 126 and 128 each including its
`own transistor 46 and pad 50.
`In the pixel
`[20,
`if one
`transistor 46 or one capacitor structure fails, the other three
`will remain operating. If the size of the subpixels is small
`enough, the defect will not be visually noticeable, whereas.
`a defective whole pixel 120 area would be noticeable.
`A further enhancement of the water based active matrix
`30 is the utilization 01‘ a [use protected pixel embodiment
`130 as illustrated in FIG. 13. The transistor 46 includes a
`
`first I‘use 132 coupling the source of the transistor 46 to the
`bit line 34. Aseconcl fuse 134 is formed coupling the gate of
`the transistor 46 to the word line 36. If a short is developed
`in the pixel, between the source and the gate or between the
`gate and the drain of the transistor, or in either of the
`capacitors 48 or 52, then one or the other of the [uses 132.
`134 will blow, disconnecting the transistor 46 and hence the
`pixel 130 from the water based active matrix 30. The fuses
`132, 134 preferably are formed by appropriate polysilicon
`segments connecting the gate and source to the lines 34, 36.
`Referring to FIG. 14, a conventional operation 01‘ a LCD
`device 136 is illustrated. The device 136 includes the
`substrate 32 and a plurality of pixels 44- formed thereon. The
`device 136 includes a common top electrode or contact 54,
`such as IT() formed on the glass 56. When the pixels 44 are
`activated, a plurality of electric Iield lines 138 are formed
`through the If. material 52 between the pixels 44 and the
`common electrode 56 in a conventional manner. The Iield
`and hence the lines 138 are formed essentially perpendicular
`between the pixels 44 and the electrode or plate 56.
`When an electric field is applied to II" material, many
`types ot‘
`internal molecular and electrooptie property
`changes can occur. For example, standard twisted ncumatic
`material does not change the polarimtion of incident light
`when the electric Iield is present. When the electric lleld is
`not present,
`the incidental
`light polarization is
`rotated,
`typically 90" or 270°. By utilizing polarizers on both sides
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`US 6,266,037 B]
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`9
`of the transmissive LCD device, an image is formed by
`activating selected ones of the pixels 44. Referr