SEL EXHIBIT NO. 2027
`INNOLUX CORP. v. PATENT OF SEMICONDUCTOR ENERGY
`LABORATORY CO., LTD.
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`IPR2013-00028
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`SILICON PROCESSING
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`FOR
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`THE VLSI ERA
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`VOLUME 2:
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`PROCESS INTEGRATION
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`STANLEY WOLF Ph.D.
`Professor, Department of Electrical Engineering
`California State University, Long Beach
`Long Beach, California
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`LATTICE PRESS
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`Sunset Beach, California
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`124
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`SILICON PROCESSING FOR THE VLSI ERA — VOLUME II
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`3.5.2 Materials Used as Diffusion Barriers
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`Of the various materials investigated as diffusion barriers in ICs, those that have
`achieved the widest adoption have been Ti:W (sputter deposited), Ti (sputter deposited),
`polysilicon, TiN, and CVD W.47 Their properties will be described in more detail here;
`a brief mention of some other experimental diffusion-barrier materials will also be made
`at the close of this section.
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`Sputter-Deposited Titanium-Tungsten (Stuffed Barrier).
`3.5.2.1
`Titanium tungsten (Ti:W) was among the first materials to be employed as a diffusion
`barrier, although Ti:W thin films were in fact first introduced by Cunningham et al. in
`1970 to improve the thermal stability and corrosion resistance of contacts with gold
`wire bonding and thermal packaging.48 In 1978 Ghate et al. described the use of Ti:W
`as a contact barrier for the ohmic contact structures of bipolar integrated circuits. The
`shallow emitter-base junctions of bipolar devices were more susceptible to A1 spiking
`than were the NMOS source/drain junctions of that time. Ti:W diffusion barriers were
`eventually considered for CMOS use when the source/drain junctions of the well devices
`approached the same shallow depths as those of the bipolar emitter-base junctions.49
`A typical ohmic contact structure that uses a Ti:W diffusion barrier is shown in Fig.
`3-27a. A PtSi layer (50-100 nm thick) is in direct contact with the heavily doped Si
`regions and is covered with a sputter-deposited Ti:W layer (100-200 nm thick). Finally,
`a layer of Al (or an A1 alloy) is deposited on the Ti:W. When the metal is patterned,
`the Ti:W remains under the Al layer and thus becomes part of the interconnect structure
`as well.
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`While tungsten is by itself a fairly good diffusion barrier,* the Ti is added for several
`reasons. First, Ti improves the adhesion of the tungsten to SiOz. Second, it protects
`the tungsten from corrosion by forming a thin layer of titanium oxide on the surface,
`making the tungsten an even better diffusion barrier. Finally, the maximum temperature
`that the contacts can withstand is increased to ~500°C.47
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`Ti:W diffusion-barrier layers are deposited by sputtering, normally from a single
`target. Such targets are now available in MOS grade — that is, with an alkali metal
`content as low as that available in Al (1%Si) targets. The nominal composition of the
`target used in the sputter deposition of Ti:W films is Ti0_3W0.7 (10:90wt%). Films
`deposited from such targets exhibit resistivities of 60-100 uQ-cm, depending on the
`deposition conditions.
`The sputter-deposition process is commonly carried out in an Ar-Ng ambient, so that
`nitrogen is incorporated into the Ti:W film.50 The nitrogen is believed to improve the
`barrier properties of the film by "stuffing" the grain boundaries, thereby substantially
`reducing the rate of interdiffusion.
`In addition, it may decrease the reactivity of the
`titanium in the film through the formation of TiN. Each of these effects acts to extend
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`* Reference 47 presents data that contacts made with W as the barrier layer can withstand
`temperatures of up to 450°C.
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`CONTACT TECHNOLOGY AND LOCAL INTERCONNECTS FOR VLSI
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`Fig. 3-27 (a) IC contact structure using Ti:W as a diffusion barrier to prevent reaction
`between PtSi and Al. (b) Comparison of the step coverage of Ti:W (0.6 #111 thick) and Al:Si
`(0.9 gm thick) deposited into a 1.2-pm-wide vertically sided, 0.9-].tm-deep contact hole.143
`
`-cm
`the lifetime of the layer. The resistivity of Ti:W is found to increase from 75
`in a pure film to 200 uQ-cm when the nitrogen content in the film is 25 at%. 0 This
`is not of consequence, however, since the resistance of a 100-nm-thick film with this
`resistivity in a l-um2 contact hole would still be only 0.2 Q.
`The sputter-deposited Ti:W films also exhibit another important advantage for
`contact structure fabrication. Good step coverage results when these films are sputter-
`deposited into high-aspect-ratio contact holes. This improves the reliability of the metal
`interconnects fabricated with Ti:W underlayers.54 Figure 3-27b illustrates the step
`coverage of sputtered Ti:W as a function of the aspect ratio of the contact hole opening
`and shows its superiority with respect to step coverage by sputtered Al.143
`In the contact-metallization system just described, the Ti:W does not act as a perfect
`barrier. During annealing, the following reactions with the A1 occur:
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`
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`—> TiA13 (400°C)
`Ti + 3A1
`w + 12A1 —> WA112(450-500°C)
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`(3-7a)
`(3-7b)
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`126
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`SILICON PROCESSING FOR THE VLSI ERA — VOLUME II
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`lnterdiffusion is the dominant process that destroys these coatact structures. A detailed
`failure analysis performed by Canali et al.53 shows that Al begins to diffuse through
`the Ti:W barrier at 500°C and decomposes the underlying PtSi layer to form the
`intermetallic compound £0th with the platinum. At the same time, WAln forms at
`the Al/Ti:W interface. Volume expansion due to the Alth formation causes the Ti:W
`layer to break up, leading to the dissolution of Si and the growth of W812 and
`TixW1_xSi2 ternary compounds. It has been observed, however, that little degradation
`of the contacts occurs when a nitrogen-stuffed Ti:W diffusion layer is subjected to up to
`a 525°C anneal for 30 minutes.
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`If the Ti:W is used as a contact layer (i.e., without an underlying PtSi layer) with an
`overlying Al layer, the incorporation of nitrogen is also found to reduce the contact
`resistance to n+ Si but to increase the contact resistance to p+ Si.
`In one report, a
`550°C anneal was needed before a Ti:W layer deposited directly on Si could dissolve the
`native—oxide layer.51 Alloying at a temperature of 625°C was necessary to obtain the
`lowest value of specific contact resistivity to p+ Si. This annealing temperature would
`be problematic if an Al layer were present on the Ti:W.
`It was also noted that low
`contact resistivity by Ti:W to n+ Si was nevertheless achievable at the lower annealing
`temperature of 400°C.
`In another report, a multistep surface-preparation routine (after contact holes have
`been dry-etched in SiOz) was used to reduce the contact resistance of Ti:W in direct
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`contact with Si by a factor of 4. The specific contact resistivity of Ti:W to p+ Si was
`reduced to ~1x10'6 Q—cm2 following a 450°C anneal.14 The silicon surface at the
`bottom of the contact holes was first cleansed of any polymers (that may have been
`deposited during the contact opening process through an oxygen plasma), and then was
`subjected to a 1000°C RTP anneal for 10 seconds in nitrogen. This served to repair any
`surface damage that might have been produced during dry etching. Next, the wafer was
`dipped in a 1% HF solution for 1 minute just prior to being loaded into the sputter
`chamber for metal deposition. Another paper reported low contact resistance between
`Ti:W and 21+ and p+ Si following furnace anneals of 440°C in N2 for 30 minutes.52
`However, the use of Ti:W also has a major drawback for VLSI and ULSI processing.
`in that the film is quite brittle and highly stressed upon being deposited. Although these
`stresses can be sufficiently reduced so that problems on the wafer can be avoided, the
`film that is deposited on the walls of the sputtering chamber eventually reaches a
`thickness at which the stress causes it to begin to flake off (or spall). Such particulates
`can significantly reduce yield; for large chips this effect may produce unacceptably large
`yield loss.
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`3.5.2.2 Polysilicon (Sacrificial Barrier). A thin layer of5polysilicon can be
`used to separate the Al and single-crystal Si substrate (Fig. 3-28). 5 The polysilicon
`layer in such contact structures serves as a sacrificial diffusion barrier that protects
`junctions beneath the contact from undergoing contact-elutromigration failure. Under
`high current stresses, Si from the polysilicon (rather than from the substrate) 15
`transported into the Al. Consequently, void formation in the substrate (which would
`lead to junction spiking) is prevented. This contact structure is attractive because It
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