Paper No.
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`__________________
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`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`___________________
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`INTELLECTUAL VENTURES MANAGEMENT, LLC
`Petitioner
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`v.
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`Patent of XILINX, INC.
`Patent Owner
`___________________
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`Case IPR2012-00018
`Patent 7,566,960
`Title: INTERPOSING STRUCTURE
`_____________________
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`PATENT OWNER’S PRELIMINARY RESPONSE
`BY XILINX UNDER 37 C.F.R. §§ 42.107
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`Patent Owner’s Preliminary Response
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`TABLE OF CONTENTS
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`Introduction ................................................................................................................ 3
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`I. Reasons Why No Inter Partes Review Should Be Instituted ............................ 5
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`A.
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`IVM Failed to Identify All Real Parties in Interest ....................................... 5
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`B. No Trial Should Be Instituted for Ground 1 ................................................. 9
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`1. Chakravorty ‘419 does not disclose an “array of landing pads
`disposed on an inside surface of the integrated circuit package” ...................... 9
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`2. Chakravorty ’419 does not disclose “solder balls disposed on an
`outside surface” ................................................................................................12
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`3. Chakravorty ‘419 does not disclose that “first pattern and the second
`pattern are substantially identical” ...................................................................13
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`C. No Trial Should Be Instituted on Grounds 2-4 ...........................................15
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`D. No Trial Should Be Instituted on Ground 5 ................................................15
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`IVM does not identify any new teaching in Chung or Chakravorty
`1.
`’362 15
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`2. Chung does not disclose “array of landing pads disposed on an inside
`surface of the integrated circuit package” ........................................................16
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`E. No Trial Should Be Instituted for Ground 6 ...............................................18
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`F. No Trial Should Be Instituted for Ground 7 ...............................................20
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`G. No Trial Should Be Instituted for Ground 8 ...............................................20
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`H. No Trial Should Be Instituted for Ground 9 ...............................................22
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`II. Conclusion .......................................................................................................23
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`Certificate of Service ...............................................................................................24
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`Patent Owner’s Preliminary Response
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`Patent Owner Xilinx, Inc. (“Xilinx”) submits the following preliminary
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`response to the Petition filed by Intellectual Ventures Management (“IVM”) on
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`September 17, 2012 requesting inter partes review of claims 1-13 of U.S. Patent
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`No. 7,566,960 (the “’960 Patent”). Xilinx respectfully requests that the Board
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`decline to institute inter partes review of the ’960 patent.
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`INTRODUCTION
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`In October 2003, Inventor Robert O. Conn filed a patent application on a
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`new way to effectively provide power to high speed integrated circuit devices.
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`(’960 Patent, IVM 1001.). The Conn invention addressed a well-known problem
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`stemming from advances in semiconductor manufacturing that allowed integrated
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`circuit devices to reach switching frequencies in the hundreds of megahertz. These
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`high frequencies introduced detrimental noise into the power leads of integrated
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`circuitry. While it was known to reduce noise on the power leads with a
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`decoupling capacitor, the wiring between the integrated circuit and the capacitor
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`could itself produce unacceptable levels of parasitic inductance at high switching
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`speeds. To address this problem, Inventor Conn positioned the capacitor closer to
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`the integrated circuit, minimizing the length of wiring between them and the
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`associated parasitic inductance. Specifically, Conn found that a capacitive element
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`could be packaged with the integrated circuit die, inside the encapsulating package.
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`Conn devised various embodiments of this technology, including some that
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`provide a wafer-thin capacitive interposer, or caposer, suitable for placement
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`between an integrated circuit die and its surrounding packaging. In addition to
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`solving Conn’s original challenge, the inventive structure provided other benefits.
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`For example, the caposer could be tailored so that the resulting packaged circuit is
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`tailored to a specific application by matching the die circuitry to the characteristic
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`impedance of a printed circuit board. Thus, the performance of an integrated
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`circuit could be customized without requiring any redesign of the circuitry itself.
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`The US Patent Office granted U.S. Patent No. 7,566,960 to Inventor Conn for this
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`innovative technology in 2009. The ’960 Patent is now assigned to Xilinx, Inc.
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`Although IVM has no interest in the subject matter of the ’960 patent, it has
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`nevertheless requested inter partes review based on several prior art references,
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`many of which were already considered during prosecution. These references fail
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`to teach all of the elements of the ’960 patent, especially the requirements relating
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`to placing certain components inside the encapsulating ceramic package. This is
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`clear from the face of the Petition, which makes assertions about the “inside” claim
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`limitations that the prior art references do not support. Thus Board should deny the
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`Petition Inter Partes Review because it fails to show a reasonable likelihood that
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`any claim of the ’960 patent is unpatentable.
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`I.
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`Reasons Why No Inter Partes Review Should Be Instituted
`A.
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`IVM Failed to Identify All Real Parties in Interest
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`Before turning to the merits, IVM’s Petition should be denied because it fails
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`to identify all of the real parties in interest as required by 37 C.F.R. § 42.8(b)(1).
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`The requirement to disclose the real parties-in-interest serves the dual purpose of
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`“assisting courts in identifying potential conflicts and to assure proper application
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`of the statutory estoppel provisions.”1 IVM’s decision to identify itself as the sole
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`real party in interest frustrates both of these purposes.
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`It is well-known that IVM is part of a complex web of companies with a
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`“penchant for secrecy.”2 Those who of have attempted to understand IVM’s
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`financial interests have located over 1200 related entities.3 IVM is also known to
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`have a variety of “investors,” although the nature of these relationships varies
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`widely. While some investors may have a purely financial stake in IVM and its
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`associated shell companies, other companies are believed to have patent licensing
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`arrangements with IVM.4 Additionally, IVM provides patents to companies
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`1 Patent Trial Practice Guide § I.D.1.
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`2 Tom Ewing & Robin Feldman, “The Giants Among Us,” 2012 STAN. TECH. L.
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`REV. 1, ¶ 14, n. 6 (XLNX-2002).
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`3 Id., ¶ 25.
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`4 Id., ¶ 47.
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`engaged in litigation through a program termed “IP for Defense.”5 Thus, the
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`known range of IVM “investor” relationships is quite broad, and coupled with
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`IVM’s acknowledged “penchant for secrecy,” the true and complete range of
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`relationships is likely even broader.
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`The little information that is publicly available about IVM’s financial and
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`management structure merely raises more concerns about the inadequacy of its
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`real-party-in-interest disclosure. In litigation, IVM has been reluctant to identify
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`the individuals who owned and controlled it—even pursing a Motion to Seal rather
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`than allow an opponent’s general counsel to review IVM’s list of interested
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`parties.6 Yet when IVM and certain associated entities eventually revealed their
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`5 Id., ¶¶ 49-50.
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`6 IVM’s motion was itself sealed and is not publicly available. See XLNX-2003 at
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`15, Xilinx, Inc. v. Invention Investment Fund I LP, Case No. 5-11-cv-00671, Dkt.
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`45 [Administrative Motion to File Under Seal Defendants' Certificate of Interested
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`Entities or Persons Pursuant to Civil Local Rule 3-16 and F.R.C.P. 7.1] (N.D. Cal.
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`Apr. 12, 2011). However, the declaration of IVM’s counsel is available and shows
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`that IVM pursued its motion when Xilinx insisted that its general counsel should
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`be allowed to see IVM’s list of interested parties. See XLNX-2004 at 2,
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`Declaration of Bradford J. Black, Xilinx v. Invention Investment, Case No. 5-11-cv-
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`00671, Dkt. 45-2 (N.D. Cal. Apr. 14, 2011).
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`owners, the federal district court judge recused herself from the case because of a
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`potential conflict of interest.7
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`The rule that forced IVM’s disclosure in litigation—Federal Rule of Civil
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`Procedure 7.1— exists for the same reason as the requirement to identify the real
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`party in interest. Specifically, it is of paramount importance that the judges on the
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`Patent Trial and Appeal Board not be tainted by the appearance of conflict from
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`having a financial interest in the outcome of the cases under their review:
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`For example, ‘‘in the case of the Board, a conflict would
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`typically arise when an official has an investment in a company
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`with a direct interest in a Board proceeding. Such conflicts can
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`only be avoided if the parties promptly provide information
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`necessary to identify potential conflicts.’’ See Rules of Practice
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`for Trials Before the Patent Trial and Appeal Board and Judicial
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`Review of Patent Trial and Appeal Board Decisions, 77 FR
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`48612, 48617 (Aug. 14, 2012). Like administrative patent
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`judges at the Board, ‘‘[p]atent examiners are quasi-judicial
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`officials.’’ Western Elec. Co., Inc. v. Piezo Tech., Inc., 860 F.2d
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`428, 431 (Fed. Cir. 1988) (citing Butterworth v. United States
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`ex rel. Hoe, 112 U.S. 50, 67 (1884)). Accordingly, a clear
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`identification of the real-party-in- interest is important to ensure
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`that officials are able to recuse themselves in view of any
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`7 XLNX-2006, Xilinx, Inc. v. Invention Investment Fund I LP, Case No. 5-11-cv-
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`00671, Dkt. 93 (N.D. Cal. Mar. 14, 2012).
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`conflict-of-interest apparent from the disclosure. In addition,
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`‘‘[t]he identity of a real party in interest might also affect the
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`credibility of evidence presented in a proceeding.’’ 77 FR at
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`48617.8
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`Reviewing IVM’s Rule 7.1 Certificate of Interest Entities (XLNX-2005)
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`further confirms that IVM is not the only real party in interest in this proceeding.
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`In total, 63 entities are listed as have an interest in IVM or one of its associated
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`defendants. Several entities are listed as having a “non-financial interest in the
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`outcome of the litigation.” Other entities have a “Financial and non-financial
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`interest” in IVM itself. There is no explanation of the nature of these “financial”
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`and “non-financial” interests. Nor is there any explanation of the relationships
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`between and among IVM and various other, similarly named entities (all joined
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`together as defendants) such as “Intellectual Ventures LLC,” “Intellectual Ventures
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`I LLC,” and “Invention Investment Fund I LP.” All of these IVM-related entities
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`(and IVM itself) share all of their counsel—and have no separate counsel—
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`suggesting that their interests are fully aligned.
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`8 Notice of Roundtable on Proposed Requirements for Recordation of Real-Party-
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`in-Interest Information Throughout Application Pendency and Patent Term, 77
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`FED. REG. 70385, 70386-87 (Nov. 26, 2012).
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`IVM failed to disclose even the investors that it has already revealed in its
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`Certificate of Interest Entities (XLNX-2005), who are fairly seen as “real parties in
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`interest” in this matter. In fairness to the Board and to Xilinx, the Petition should
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`be denied or dismissed for non-compliance with 37 C.F.R. § 42.8(b)(1).
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`B. No Trial Should Be Instituted for Ground 1
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`Ground 1 of IVM’s Petition asserts that Claims 1, 2, 9, and 10 are
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`anticipated by U.S. Patent No. 6,611,419 to Chakravorty (“Chakravorty ’419”).
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`The Board should decline to institute inter partes review on this Ground because
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`IVM’s petition fails to show that Chakravorty ’419 satisfies all of the claim
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`elements of the ’960 patent, as shown below.
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`1.
`Chakravorty ‘419 does not disclose an “array of landing
`pads disposed on an inside surface of the integrated circuit
`package”
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`The primary element missing from Chakravorty ’419 is the requirement of
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`landing pads “on an inside surface of the integrated circuit package” as required by
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`independent claims 1 and 9 of the ’960 patent. IVM’s Petition contends that
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`Chakravorty ’419 discloses the “inside surface” limitation in the figure below, and
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`specifically conductive areas 334, 339, and 319 on the upper surface of substrate
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`320 (in FIG. 3 below) to disclose this limitation. (Petition at 7.)
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`This figure fails to disclose landing pads “inside surface of the integrated circuit
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`package.” Instead, it shows landing pads on the substrate, which is different than
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`the packaging because the substrate does not completely surround the integrated
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`circuit.
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`The distinction between pads inside the packaging vs. on some other surface
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`is illustrated by the prosecution history. During prosecution, the examiner asked
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`the applicant to clarify “what is meant by and what shows the interposing structure
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`disposed inside the integrated circuit package between the integrated circuit die
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`and the inside surface of the integrated circuit package.” (XLNX-2001 at 38, ’960
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`File History, Office Action of Sept. 2, 2008 at 2 (emphasis in original).) In
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`response, the Applicant explained that “inside” means that the integrated circuit
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`package completely surrounds the integrated circuit die:
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`The Applicant refers the Examiner to FIG. 10, which shows a
`die 1011 inside a package 1012. The package 1012 completely
`surrounds the die 1011, and hence the die 1011 is inside the
`package 1012. Further Applicant's specification states "[a]n
`integrated circuit die 1011 is mounted within an integrated
`circuit package 1012." (Applicant's specification, para. 0089).
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`(XLNX-2001 at 31, ’960 File History, Response at 6 (Nov. 25, 2008).)
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`The placement of the die inside the packaging is also illustrated by
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`Figure 10 of the ’960 patent, which shows that the integrated circuit
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`package completely surrounds the die.
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`Fig. 10 of the ’960 Patent
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`IVM’s petition ignores this figure and the prosecution history that explain
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`that the landing pads must be inside the packaging. Moreover, IVM’s Petition fails
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`to provide any reasoning or basis for the tacit assertion that substrate 320
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`completely surrounds the die 300. Indeed, Chakravorty’s selection of the word
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`“substrate” would suggest that item 320 is a flat surface, not a structure that
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`completely encloses die 300. Chakravorty repeatedly discusses packaging an
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`integrated circuit on a substrate. (See, e.g., Chakravorty ’419 (IVM 1003), 1:40,
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`1:66-67, 2:15.) And Chakravorty ’419 refers to the “top” and “bottom” of
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`substrate 320, not to the inside or outside. (See, e.g., id. 6:1-2.) The Petition failed
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`to identify—and the Patent Owner cannot find—any discussion in Chakravorty
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`’419 of enclosing die 300 inside substrate 320.
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`Because Chakravorty ’419 does not teach landing pads “on an inside surface
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`of the integrated circuit package,” it cannot anticipate the claims of the ’960 patent
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`and thus no inter partes review is necessary.
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`2.
`Chakravorty ’419 does not disclose “solder balls disposed
`on an outside surface”
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`IVM also contends that Chakravorty ’419 discloses “an array of solder balls
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`disposed on an outside surface of the integrated circuit package.” (Petition at 7-8,
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`10.) IVM argues that because Chakravorty ’419 discloses that “[s]ubstrate 320
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`can be similar to substrate 310, optionally having an IC die (not shown) on the
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`opposite surface thereof, or it can be a printed circuit board (PCB) or other type
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`of substrate” that Chakravorty ’419 discloses this limitation. (Petition at 8 citing
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`Chakravorty ’419 (IVM 1003) at 4:63-66 (emphasis in Petition).) As discussed
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`above, Chakravorty ’419 fails to disclose an inside surface and similarly fails to
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`disclose an outside surface for substrate 320. In addition, Chakravorty ’419 fails to
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`explain how this second die would be disposed “on the opposite surface thereof,”
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`and IVM provided no evidence that a second die would necessarily be attached
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`using solder balls, as required for an argument based on inherency.
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`Acknowledging the weakness of Chakravorty ’419, IVM improperly argues
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`that it would be “obvious to dispose solder balls on an outside surface of substrate
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`320.” (Petition at 8.) Even if this were obvious, a contention that Xilinx does not
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`concede, a bare allegation of obviousness fails to satisfy the requirements for
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`anticipation as asserted by IVM as the statutory basis for Ground 1. (See 37 C.F.R.
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`§ 104(b) (“the petition must set forth . . . (h)ow the construed claim is unpatentable
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`under the statutory ground identified in the paragraph (b)(2) of this section”, i.e.,
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`“[t]he specific statutory grounds under 35 U.S.C. 102 or 103 on which the
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`challenge to the claim is based”).)
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`In summary, the Petition fails to provide any evidence that Chakravorty
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`teaches—whether expressly or inherently— “solder balls disposed on an outside
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`surface” as recited in claims 1 and 9. With no credible argument as to this
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`limitation, the Petition fails to demonstrate a reasonable likelihood that the claims
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`are unpatentable, and therefore no trial should be ordered as to Ground 1.
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`3.
`Chakravorty ‘419 does not disclose that “first pattern and
`the second pattern are substantially identical”
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`Chakravorty also fails to disclose the “wherein the first pattern and the
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`second pattern are substantially identical patterns” limitation of independent claims
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`1 and 9. IVM argues that Figure 3 of Chakravorty ’419 discloses this limitation
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`becauase “solder balls 308 are aligned with leads or conductive areas 319 and 339”
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`that Chakravorty ’419 discloses this limitation. (Petition at 8.) Figure 3 does not
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`support IVM’s assertion.
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`An annotated version of FIG. 3 of Chakravorty ’419 (included below)
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`demonstrates that the pattern of solder balls below die 300 and leads or conductive
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`areas on substrate 320 are not substantially identical. For example, leads or
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`conductive areas 334 at the left and right ends of FIG. 3 do not align. Further,
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`there is an extra solder ball below the die 300 that has no corresponding lead or
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`conductive area and there is an extra lead or conductive area with no corresponding
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`solder ball. Two patterns in which less than half of the pattern elements align
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`cannot be “substantially identical” under any reasonable construction.
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`FIG. 3 of Chakravorty ’419 (IVM 1003) (Annotated)
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`Because the two patterns of Chakravorty ’419 are not substantially identical,
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`IVM has failed to demonstrate a reasonable likelihood that any claim is
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`unpatenable. No trial should be ordered as to Ground 1.
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`C. No Trial Should Be Instituted on Grounds 2-4
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`Grounds 2, 3 and 4 rely on its disclosures presented in Ground 1 of the
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`Petition without providing any teachings that would cure the defects noted above.
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`(Petition at 12-17.) Thus, for the reasons identified above for Ground 1, no trial
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`should be ordered as to Grounds 2-4 either.
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`D. No Trial Should Be Instituted on Ground 5
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`Ground 5 of IVMs petition asserts that Claims 1-13 are obvious under 35
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`U.S.C. § 103 based on U.S. Patent No. 6,680,218 to Chung et al. (“Chung”) and
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`U.S. Patent No. 6,970,362 to Chakravorty (“Chakravorty ’362”). The Board
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`should decline to institute review on this Ground because IVM fails to identify any
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`teaching in these references for several limitations in independent claims 1 and 9.
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`1.
`IVM does not identify any new teaching in Chung or
`Chakravorty ’362
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`As a preliminary matter, both Chung and Chakravorty ’362 formed the basis
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`of rejections under 35 U.S.C. § 102 during prosecution. (See XLNX-2001 at 103,
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`’960 File History, Office Action of Sept. 20, 2007; id. at 130, Office Action of Jan.
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`8, 2007.) These rejections were successfully traversed by Xilinx. (See XLNX-
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`2001 at 90, Response of Dec. 12, 2007; id. at 121, Response of Apr. 6, 2007.) The
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`Petition does not identify any new teaching of these references which was
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`inadvertently overlooked by the Examiner during the original prosecution of the
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`’960 Patent. Since the Patent Office has already thoroughly reviewed the issued
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`claims in view of these prior art references, Patent owner respectfully submits that
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`the Petition fails to demonstrate a reasonable likelihood that any claim is
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`unpatentable over Chung and Chakravorty ’362.
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`2.
`Chung does not disclose “array of landing pads disposed on
`an inside surface of the integrated circuit package”
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`Ground 5 of IVM’s Petition has a similar flaw to Ground 1—it fails to show
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`that the prior art teaches the “on an inside surface of the integrated circuit package”
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`limitation of independent claims 1 and 9.
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`IVM points to the “bond pads on the top surface of horizontal section 306”
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`of Figure 5 as satisfying the “inside surface” limitation. (Petition at 19, 25) But
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`Figure 5 shows the pads on the “top surface,” not the “inside surface” as required
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`by the claims:
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`FIG. 5 of Chung (IVM 1006)
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`As shown above, Chung discloses an IC 302 and an IC package consisting
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`of a vertical package section 304 and a horizontal package section 306. Neither
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`package section is shown in Fig. 5 as enclosing the IC 302. Instead, the IC 302 is
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`flip-chip mounted to the vertical section 304 using solder bumps. (Chung (IVM
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`1006) at 3:55-4:18; FIG. 3.) Bond pads on the bottom surface of the vertical
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`section 304 are electrically connected to bond pads on the top surface of the
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`horizontal section 306. (Id. at 5:45-55; 8:5-10.) As shown in each of the Figures
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`in Chung, the vertical section 304 couples the solder bumps of the IC 302 to the
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`bond pads on the horizontal section 306 in a 1-1 fashion, i.e., each solder bump on
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`the IC is coupled to one bond pad located opposite the solder bump. IVM has not
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`shown that Chung discloses any surrounding structure as part of horizontal
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`package section 306 that would define whether the upper surface of horizontal
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`package section 306 is an inside surface as required by claims 1 and 9.9
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`Thus, IVM has not demonstrated that the combination of Chung and
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`Chakravorty ’362 teaches, suggests, or otherwise renders obvious that the top
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`surface of the horizontal section 306 is an inside surface of the horizontal section
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`306. No trial should be ordered for Ground 5.
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`E. No Trial Should Be Instituted for Ground 6
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`IVM asserts, as Ground 6, that claims 1-5, 7-11, and 13 are obvious under
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`35 U.S.C. § 103 based on Chakravorty ’362 and U.S. Patent No. 6,730,540 to
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`Siniaguine. Here again, IVM fails to identify a teaching of all the limitations in
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`independent claims 1 and 9.
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`IVM’s petition alleges that Chakravorty ’362 discloses “an integrated circuit
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`package having an array of landing pads disposed on an inside surface of the
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`integrated circuit package in a second pattern.” (Petition at 29, 34.) IVM relies on
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`solder balls 311 on the top surface of primary substrate 320 as shown in FIG. 3 of
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`Chakravorty ’362 (included below) to disclose this limitation. (Id.) As shown in
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`FIG. 3, Chakravorty ’362 teaches a die 300 coupled to a primary substrate 320
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`9 “Capacitors 310 are mounted on bond pads (not shown) on the top surface 316 of
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`horizontal section 306” and are not part of horizontal section 306. (See Chung
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`(IVM 1006) at 6:28-32.)
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`Patent Owner’s Preliminary Response
`IPR2012-00018
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`using an interposer 310. (Chakravorty ’362 (IVM 1007) at FIG. 3.) The interposer
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`includes lands 302 and 305 coupled to solder balls 301 of the die 300, and lands
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`312 and 315 coupled to solder balls 311 that can be affixed to conductive traces or
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`areas on the primary substrate 320. (Id. at 5:30-60.)
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`FIG. 3 of Chakravorty ’362 (IVM 1007)
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`IVM has not shown that Chakravorty ’362 discloses any surrounding
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`structure as part of primary substrate 320 that would define whether the upper
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`surface of primary substrate 320 is an inside surface as required by claims 1 and 9.
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`IVM’s Petition does not rely on Siniaguine to teach the “inside surface” limitation
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`for this ground. Thus, IVM has not demonstrated that the combination of
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`Chakravorty ’362 and Siniaguine discloses, suggests, or otherwise renders obvious
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`“an array of landing pads disposed on an inside surface of the integrated circuit
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`package” as recited in independent claims 1 and 9. No trial should be ordered for
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`Ground 6.
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`F. No Trial Should Be Instituted for Ground 7
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`As a foundational basis for Ground 7 of the Petition, IVM relies on its
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`disclosures presented in Ground 6 of the Petition without providing any teachings
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`that would cure the defects noted above for Ground 6. (Petition at 36-37.)
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`Because of this reliance, IVM fails to demonstrate a reasonable likelihood that any
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`claim is unpatentable. No trial may be ordered as to Ground 7.
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`G. No Trial Should Be Instituted for Ground 8
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`For Ground 8, IVM asserts that claims 1-5, 7-11, and 13 are obvious under
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`35 U.S.C. § 103 based on Siniaguine, U.S. Patent No. 6,423,570 to Ma (“Ma”),
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`and Chakravorty ’362. However, IVM fails to identify a teaching of all the
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`limitations in independent claims 1 and 9.
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`IVM alleges that Siniaguine discloses “an integrated circuit package having
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`an array of landing pads disposed on an inside surface of the integrated circuit
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`package in a second pattern.” (Petition at 39-40, 47.) IVM relies on the pads 388
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`as shown in FIG. 4 of Siniaguine (included below) to disclose this limitation. (Id.)
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`IPR2012-00018
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`FIG. 4 of Siniaguine (IVM 1004)
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`Siniaguine describes “an integrated circuit 310 mounted on another
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`integrated circuit 320 which in turn is mounted on a wiring substrate 330.”
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`(Siniaguine (IVM 1004) at 3:39-41.) “Circuit 310 is bonded to interposer 320” by
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`bonding contact pads 374 with pads 130 (Id. at 4:21-26.) “Contact pads 323 are
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`bonded to pads 388 on wiring substrate 330.” (Id. at 4:36-37.)
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`IVM has not shown that Siniaguine discloses any surrounding structure as
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`part of wiring substrate 330 that would define whether the upper surface of wiring
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`substrate 330 is an inside surface as required by claims 1 and 9. IVM does not rely
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`on the other references to teach the “inside surface” limitation for this ground.
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`Thus, IVM has not demonstrated that the combination of Siniaguine, Ma, and
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`Chakravorty ’362 disclose, suggest, or otherwise render obvious “an array of
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`landing pads disposed on an inside surface of the integrated circuit package” as
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`recited in independent claims 1 and 9. Because the IVM fails to demonstrate a
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`reasonable likelihood that any claim is unpatentable, no trial should be ordered as
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`to Ground 8.
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`H. No Trial Should Be Instituted for Ground 9
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`As a foundational basis for Ground 9 of the Petition, the IVM relies on its
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`disclosures presented in Ground 8 of the Petition without providing any teachings
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`that would cure the defects noted above for Ground 8. (Petition at 50-51.)
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`Because of this reliance, the IVM fails to demonstrate a reasonable likelihood that
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`any claim is unpatentable. No trial should be ordered as to Ground 9.
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`//
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`//
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`//
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`//
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`//
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`//
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`//
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`//
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`//
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`//
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`//
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`II. Conclusion
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`Patent Owner’s Preliminary Response
`IPR2012-00018
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`Because the IVM has failed to meet its burden and the Petition fails to
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`demonstrate a reasonable likelihood that the IVM will prevail on any of the claims
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`challenged in each and every Ground (Grounds 1-9), inter partes review of the
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`’960 Patent should be denied and all the claims (claims 1-13) of the ’960 Patent
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`should be confirmed.
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`Respectfully submitted,
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`/David L. McCombs/
`David L. McCombs
`Registration No. 32,271
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`HAYNES AND BOONE, LLP
`Customer No. 27683
`Telephone: 214/651-5116
`Facsimile: 214/200-0808
`Attorney Docket No.: 42299.44
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`Dated: December 18, 2012
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`R_320382_2
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`Patent Owner’s Preliminary Response
`IPR2012-00018
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`UNITED STATES PATENT AND TRADEMARK OFFICE
`__________________
`
`INTELLECTUAL VENTURES MANAGEMENT, LLC
`v.
`Patent of XILINX, INC.
`___________________
`
`Case IPR2012-00018
`Patent 7,566,960
`Title: INTERPOSING STRUCTURE
`_____________________
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`CERTIFICATE OF SERVICE
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`The undersigned certifies, in accordance with 37 C.F.R. § 42.205, that
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`service was made on the Patent Owner as detailed below.
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`Date of service December 18, 2012
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`Manner of service FIRST CLASS MAIL
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`Documents served Preliminary Patent Owner Response;
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`Xilinx’ Exhibit List; and
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`Exhibits: XLNX-2001 through XLNX-2006
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`Persons served STERNE, KESSLER, GOLDSTEIN & FOX P.L.L.C.
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`1100 NEW YORK AVENUE, N.W.
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`WASHINGTON DC 20005
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`
`
`/David L. McCombs/
`David L. McCombs
`Registration No. 32,271
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