IN THE UNITED STATES PATENT AND TRADEMARK OFFICE
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`
`In re Covered Business Method
`Patent Review of:
`U.S. Patent No. 6,105,013
`
`For: METHOD, APPARATUS, SYSTEM
`AND FIRMWARE FOR SECURE
`TRANSACTIONS
`
`
`
`
`
`
`
`
`
`
`DECLARATION OF STEPHEN D. BRISTOW
`
`
`
`Mail Stop PATENT BOARD
`Patent Trial and Appeal Board
`US Patent and Trademark Office
`PO Box 1450
`Alexandria, Virginia 22313-1450
`
`
`
`I, Stephen D. Bristow, hereby declare and state as follows:
`
` I have been retained as a technical consultant on behalf of JPMorgan Chase
`1.
`
`& Co. and JPMorgan Chase Bank, N.A., the petitioner in the present
`
`proceeding, and I am being compensated at my usual and customary hourly
`
`rate. The petition names JPMorgan Chase & Co. and JPMorgan Chase
`
`Bank, N.A. as real parties-in-interest. I have no financial interest in, or
`
`affiliation with, the petitioner, real parties-in-interest, or the patent owner,
`
`which I understand to be Maxim Integrated Products, Inc. My
`
`compensation is not dependent upon the outcome of, or my testimony in,
`
`CHASE EX. 1014 - p. 1/32
`
`
`BEFORE THE PATENT TRIAL AND APPEAL BOARD
`
`
`In re Covered Business Method
`Patent Review of:
`U.S. Patent No. 6,105,013
`
`For: METHOD, APPARATUS, SYSTEM
`AND FIRMWARE FOR SECURE
`TRANSACTIONS
`
`
`
`
`
`
`
`
`
`
`DECLARATION OF STEPHEN D. BRISTOW
`
`
`
`Mail Stop PATENT BOARD
`Patent Trial and Appeal Board
`US Patent and Trademark Office
`PO Box 1450
`Alexandria, Virginia 22313-1450
`
`
`
`I, Stephen D. Bristow, hereby declare and state as follows:
`
` I have been retained as a technical consultant on behalf of JPMorgan Chase
`1.
`
`& Co. and JPMorgan Chase Bank, N.A., the petitioner in the present
`
`proceeding, and I am being compensated at my usual and customary hourly
`
`rate. The petition names JPMorgan Chase & Co. and JPMorgan Chase
`
`Bank, N.A. as real parties-in-interest. I have no financial interest in, or
`
`affiliation with, the petitioner, real parties-in-interest, or the patent owner,
`
`which I understand to be Maxim Integrated Products, Inc. My
`
`compensation is not dependent upon the outcome of, or my testimony in,
`
`CHASE EX. 1014 - p. 1/32
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`
`
`Docket No. 020358.0206-US04
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`the present covered business method patent review or any litigation
`
`proceedings.
`
`Background
`
`
` My background, qualifications, and experience relevant to the issues in this 2.
`
`proceeding are summarized below. My curriculum vitae as related to the
`
`issues in this proceeding is submitted herewith as Exhibit 1015.
`
` I am currently Chief Technology Officer of Cloudastructure, an Internet-
`3.
`
`based video security service, and am currently on retainer to advise, consult
`
`with, and maintain Parkinson’s disease testers for the Andy Grove
`
`Foundation of Los Altos, California.
`
` I have a Bachelor of Science degree in Electrical Engineering and
`4.
`
`Computer Science as a Regent’s Scholar from the University of California
`
`at Berkeley. I also have a Master of Science degree in Electrical
`
`Engineering from the University of Santa Clara, in Santa Clara, California.
`
`During my studies, I took courses in integrated circuit design,
`
`communications theory, computer architecture, programming languages
`
`such as machine language, assembly language, compiled and interpreted
`
`language, as well as programming language theory. I have also attended
`
`numerous ongoing continuing education and technical training classes since
`
`graduation, which include training in the programming, capabilities,
`
`2
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`Docket No. 020358.0206-US04
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`technological limitations, and uses of smart cards by Micro Card
`
`Technologies, Inc., a subsidiary of Bull.
`
` Beginning in 1973, I had the position of Vice President of Engineering for
`5.
`
`Atari. At that time, Atari’s arcade video games operated on a cash basis,
`
`and the company was interested in finding out ways to, and developing the
`
`technology to, make it easier for customers to play their video games.
`
`Traditional coin-operated games require a large amount of coins, which are
`
`bulky and inconvenient for consumers, and need to be periodically emptied
`
`and deposited, which can be a burden for arcade operators. Paper currency
`
`also has drawbacks, as bill acceptors and change machines at the time had
`
`complicated mechanics and electronics, and were expensive. Credit card
`
`technologies were also not appropriate, since relatively expensive phone
`
`lines would be required for each credit card reader. There was therefore a
`
`recognized benefit from having an inexpensive stored-value medium where
`
`value could be deposited by the consumer and debited by an arcade
`
`machine without communicating with a central authority.
`
` Through my work at Atari, I began to follow developments in technologies
`6.
`
`related to cash cards, including magnetic strip paper cards such as those
`
`used for mass transit. In the mid-1980s, I became aware of the
`
`development of integrated-circuit based “smart cards” which provided
`
`3
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`Docket No. 020358.0206-US04
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`persistent storage coupled with a processing capability that could
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`implement sophisticated security protocols.
`
` Around 1986, I began working with my former Atari colleague Christopher
`7.
`
`Wright to develop a smart card-based solution for postage-printing stations.
`
`Mr. Wright and I started Wright Technologies to research and implement
`
`this technology. Larger companies at the time used postage-printing
`
`stations to generate U.S. mail postage stamps in-house. This was done
`
`using heavy sealed metal boxes that included mechanical levers to set
`
`postage amounts, which would use mechanicals to set a stamp imprint.
`
`Also included was a mechanical balance calculator, which would decrement
`
`as postage stamps were generated. In order to refill the stored value, the
`
`box would need to be carried to a postal service branch to be physically
`
`opened and configured with additional value. We had the idea of using the
`
`secure storage capability of smart cards in conjunction with an intelligent
`
`printing device in order to generate secure printed postage value. This work
`
`resulted in applications for patents filed by myself and Mr. Wright, which
`
`include issued U.S. Patent Nos. 4,900,904 (the “’904 patent”) (Ex. 1017)
`
`and 4,864,618 (Ex. 1018), both filed October 17, 1988.
`
` Starting in 1986, we developed working prototypes of a postage terminal
`8.
`
`that used a smart card to securely store and transmit in an interactive basis
`
`4
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`Docket No. 020358.0206-US04
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`financial information between a printing device and a smart card based on
`
`user inputs. The smart card stored a running balance and multiple secret
`
`“keys” used to secure the transaction with the printing device. A user
`
`would enter a desired postage amount into the terminal, which would be
`
`transmitted to the smart card. The smart card would then send to a smart
`
`printing element within the printing device an encrypted communication
`
`that included a request for printing, the amount of the postage to be printed,
`
`as well as a challenge number to be used for authentication. The print head
`
`would then decrypt the communication and respond to the challenge with
`
`the same number encrypted using a different secret key. The smart card
`
`would decrypt the response to confirm that the print head is a valid print
`
`head. In turn, the print head would send its own encrypted challenge,
`
`which the smart card would need to decrypt and re-encrypt using a different
`
`secret key. The print head would decrypt the postage amount, and in
`
`response print the appropriate amount, and respond with a message
`
`indicating the print was successful. Only at this point would the smart card
`
`deduct from its balance the amount of the postage.
`
` In parallel with my work at Wright Technologies, I served as Director of
`9.
`
`Engineering at Verifone from 1989 to 1991. In that capacity I was
`
`responsible for Verifone’s engineering in California and Taiwan. While
`
`5
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`CHASE EX. 1014 - p. 5/32
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`Docket No. 020358.0206-US04
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`there we developed a cash card system making use of secure financial
`
`transaction data which was produced and used in a number of locations.
`
`The terminals for this system were designed to read the contents of the cash
`
`card and communicate with a server to complete the transaction.
`
` One aspect of my work at Verifone included securing transactions against
`10.
`
`“skimming,” which is the fraudulent duplication of a card to create an
`
`identical copy that could then also be used to spend the same value. A cash
`
`card system can be vulnerable to a skimming attack when the
`
`communication between the cash card and a terminal includes a transaction
`
`amount, but no information that uniquely identifies the card as opposed to a
`
`copy of the card. One solution we devised to address skimming attacks was
`
`to recognize that the magnetic encoding of content on individual cards bears
`
`a unique “watermark” that could not be copied by then-existing techniques.
`
`This watermark served as an additional piece of unique information that
`
`could be used to determine whether a card being presented is the same
`
`physical card, or a different physical card, than one presented earlier with
`
`the same identifying information.
`
` Verifone also manufactured credit card reading terminals such as those
`11.
`
`found in grocery stores. They use encryption techniques, such as DES, to
`
`secure communications to and from the terminals. While at Verifone, my
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`6
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`CHASE EX. 1014 - p. 6/32
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`Docket No. 020358.0206-US04
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`team designed and implemented a PIN (Personal Identification Number)
`
`pad to allow users to enter their PIN into the Verifone terminal. The PIN
`
`pad encrypted the user’s PIN using DES encryption.
`
` In 1994, Wright Technologies licensed our patents covering the postage
`12.
`
`metering system to Pitney-Bowes, and were retained by Pitney-Bowes to
`
`develop production versions of the system based on our prototype. We
`
`ultimately completed a production system which was rolled out and
`
`marketed.
`
` After my involvement with Pitney-Bowes ended in 1998, I continued to
`13.
`
`develop further smart card-based applications including an office telephone
`
`that used a smart card to retain a user’s identity in a mobile office situation.
`
`In this system, office telephones were configured to accept a smart card,
`
`and would read the contents of the card. The phone would then
`
`communicate with the office phone network so that calls would be routed to
`
`a user’s current location, as well as having autodial and other preferences
`
`carried with a user rather than tied to a specific phone.
`
` Through work related to smart cards I have also become aware of how
`14.
`
`smart cards are used in the satellite broadcast field, in particular, the use of
`
`smart cards to store subscriber information and permissions, and to control
`
`the encryption and decryption of secure broadcasts.
`
`7
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`Docket No. 020358.0206-US04
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` During the time period above, and through the present, I have regularly
`15.
`
`attended trade shows, including the Consumer Electronics Show (“CES”)
`
`and the National Association of Broadcasters (“NAB”) trade show. At
`
`these trade shows I would observe other companies’ developments in the
`
`area of smart cards and stored value card, in particular as they related to
`
`stored value and security permission and authentication.
`
` I am also a member of the Institute for Electrical and Electronics Engineers
`16.
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`(“IEEE”), and have been a member of the Administrative Committee for
`
`the Consumer Electronics Society for the IEEE, as well as a member of the
`
`Society for Motion Picture and Television Engineers (“SMPTE”), the
`
`Program Committee for the Society for Information Display (“SID”), and
`
`other relevant professional organizations. Through my work with these
`
`organizations, I have also become familiar with the state of the art of smart
`
`cards on a continuing basis.
`
` My work in the smart card field included implementing security features.
`17.
`
`These included mechanical security features of devices themselves; optical
`
`security in the form of ensuring that, for example, printed postage stamps
`
`were proof against copying, as well as electronic security to ensure the
`
`integrity of the smart card interaction.
`
`8
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`CHASE EX. 1014 - p. 8/32
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`
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`Docket No. 020358.0206-US04
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` The patents that issued out of my work in smart cards include U.S. Patent
`18.
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`No. 4,900,904 (Ex. 1017), which describes a secure transaction system that
`
`can be used in a smart card/terminal system. The scheme described in the
`
`’904 Patent uses, among other things, a challenge and response
`
`authentication. In that authentication, a smart card first generates a random
`
`number and encrypts it with a known algorithm using a shared key. The
`
`smart card sends the encrypted number to the terminal, which decrypts the
`
`number with the inverse algorithm using the same key. The terminal then
`
`re-encrypts the same number using a different algorithm, which it sends
`
`back to the smart card. The card decrypts using the inverse of the different
`
`algorithm, and verifies that it has received the same random number that
`
`was sent. If so, the transaction is authorized. See, e.g., ’904 Patent, 3:46-
`
`66.
`
` Through my work, I have become familiar with public-private key
`19.
`
`encryption, and in particular the RSA implementation of public-private key
`
`encryption. In a public-private key system, each side to a communication
`
`has both a “public” key, which is made generally available, and a “private”
`
`key, which is kept secret. Either key can be used to encrypt a message,
`
`which can only be decrypted using the other key. The RSA system for
`
`generating public and private keys was described in a 1978 paper by Rivest,
`
`9
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`Docket No. 020358.0206-US04
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`Shamir, and Adelman (Ex. 1016), which reveals mathematical algorithms
`
`for the creation of encryption key pairs (something that can be
`
`accomplished on a generic general-purpose computer).
`
`Materials Considered
`
` I have reviewed each of the following: 20.
`
`a. U.S. Patent No. 6,105,013 (“the ’013 Patent”), including the claims,
`
`description, and prosecution history (Exs. 1001 and 1002,
`
`respectively);
`
`b. Certain chapters contained within INTEGRATED CIRCUIT CARDS, TAGS
`
`AND TOKENS (P.L. Hawkes et al. eds., 1990) (Ex. 1003, hereinafter
`
`“Hawkes Chapters”):
`
`i. P.L. Hawkes, Preface and Introduction (“Hawkes Preface &
`
`Introduction”);
`
`ii. A.R. Lessin, Smart Card Technology – A US Pioneer’s
`
`Viewpoint (“Hawkes Ch. 2”);
`
`iii. J. McCrindle, A Contactless Smart Card and Its Applications
`
`(“Hawkes Ch. 3”);
`
`iv. W.L. Price & B.J. Chorley, Secure Transactions with an
`
`Intelligent Token (“Hawkes Ch. 6”); and
`
`10
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`
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`Docket No. 020358.0206-US04
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`v. D.W. Davies, Cryptography and the Smart Card (“Hawkes Ch.
`
`8”);
`
`c. Int’l Pub. No. WO 92/12485 to R. Blandford (Ex. 1004; hereinafter
`
`“Blandford”);
`
`d. Don Lancaster, A Flying Car Newsletter; Photopolymer Resources;
`
`Amateur Television Books; Royalty-Free Real PostScript!; BASIC
`
`Stamp Microcontroller, 4 HARDWARE HACKER 66 (Ex. 1005;
`
`hereinafter “Lancaster”);
`
`e. Special Master’s Report and Recommendation Re: Claim
`
`Construction, In re Maxim Integrated Prods, Inc., Case No. 2:12-mc-
`
`244, MDL No. 2354 (Oct. 9, 2013, W.D. Pa.) (Ex. 1007);
`
`f. Memorandum Opinion (re: claim construction), In re Maxim
`
`Integrated Prods, Inc., Case No. 2:12-mc-244, MDL No. 2354 (Dec.
`
`17, 2013, W.D. Pa.) (Ex. 1008); and
`
`g. Rivest, et al., A Method for Obtaining Digital Signatures and Public-
`
`Key Cryptosystems, 21 COMMUNICATIONS OF THE ACM, 2, 120 (1978)
`
`(Ex. 1016).
`
` Upon reviewing the ’013 Patent, I understand that a provisional patent
`21.
`
`application (No. 60/004,510) was filed on September 29, 1995, and a non-
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`Docket No. 020358.0206-US04
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`provisional application was filed on January 31, 1996 (No. 08/594,983, now
`
`U.S. Patent No. 5,748,740), which is the parent application to application
`
`no. 09/041,190, filed on March 10, 1998, that issued as the ’013 Patent.
`
`Based upon this information, for the purpose of my analysis, I assume the
`
`time of the purported invention to be about 1995.
`
`Level of Ordinary Skill in the Art
`
` In my opinion, a person of ordinary skill in the art for the subject matter of 22.
`
`the ’013 Patent around 1995 would have had at least a B.S. degree in
`
`electrical engineering or computer engineering with at least two years of
`
`practical or post-graduate work in the areas of secure financial transactions
`
`and real-time microcontroller programming, or, alternatively, an additional
`
`year (at least three years) of postgraduate or professional experience in
`
`computer systems engineering related to secure data transactions, or the
`
`equivalent. I was a person of at least ordinary skill in this art in 1995.
`
`State of the Art in 1995
`
` The development and rapid proliferation of computing technology in the 23.
`
`1990’s, and in particular its application to financial transactions, created a
`
`requirement for computerized mechanisms for secure communications.
`
` In discussing my background, I explained developments in this area that I
`24.
`
`was involved in. In particular, as described in further detail above, almost
`
`12
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`
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`Docket No. 020358.0206-US04
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`ten years prior to 1995 I was personally involved in developing a smart card
`
`solution to completing financial transactions with a postage metering
`
`terminal. This solution included storing both the programming necessary to
`
`process a transaction and a cash balance on the smart card, coupled with an
`
`encrypted authentication and communication process between the smart
`
`card and a custom integrated-circuit based printing device.
`
` Others in the industry were also developing smart card technology well
`25.
`
`before 1995. For example, as described in Hawkes Ch. 2, Roland Moreno
`
`obtained patents on smart card technology in 1975 that were licensed to
`
`companies such as Honeywell Bull, Schlumberger and Philips by 1978.
`
`Hawkes Ch. 2, p. 26.
`
`26.
`
` By 1985, financial services companies such as Visa were developing smart
`
`card technology. Id. at 26. By 1987, France was using smart cards as bank
`
`cards. Id. at 27.
`
` The Hawkes Chapters, published in 1990, disclose various aspects of
`27.
`
`integrated circuit devices holding data, such as monetary equivalents, that
`
`can be manipulated in a secure manner to prevent tampering. For example,
`
`Hawkes Ch. 6 discloses an “intelligent token.” Figure 6.3 shows a block
`
`diagram of the “intelligent token.”
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`Docket No. 020358.0206-US04
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`
`
`Overview of the ’013 Patent
`
` Based on my review of the ’013 Patent, it addresses a method, apparatus, 28.
`
`system and firmware for secure transactions through the use of an electronic
`
`module. The electronic module is capable of communicating with other
`
`equipment via a secure, encrypted technique so as to protect monetary
`
`transactions or other valuable data. ’013 Patent, Abstract.
`
` A block-diagram of the module 10 is shown in the patent’s Figure 1.
`29.
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`Docket No. 020358.0206-US04
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`
` Module 10 includes a microprocessor 12, a math coprocessor 18, a memory
`30.
`
`circuit 20, an input/output circuit 26, a real time clock 14, and energy
`
`circuitry 34. Id. at 2:34-3:9. The patent does not describe these components
`
`beyond their basic functions or preferences. The specification describes
`
`how module 10 can be used in certain types of transactions. For example,
`
`the patent relates to module 10 being used as a digital cash dispenser, how
`
`module 10 can be replenished with cash, and how module 10 can transfer
`
`cash to another module. Id. at 7:63-12:34.
`
` The ’013 Patent includes sixteen claims, of which only claims 1 and 9 are
`31.
`
`independent claims. For example, claim 1 recites a microcontroller based
`
`secure transaction integrated circuit comprising “a microcontroller core,” “a
`
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`Docket No. 020358.0206-US04
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`math coprocessor,” “memory circuitry,” “an input/output circuit,” and “a
`
`real time clock.”
`
`Claim Construction
`
` I have been asked to offer my opinion regarding the understanding of a 32.
`
`person skilled in the art regarding the claim term “modular exponentiation
`
`accelerator circuit” used in claim 9 of the ’013 Patent.
`
` I understand that in the present proceeding, claim terms are interpreted as
`33.
`
`the broadest reasonable construction consistent with the specification, or
`
`“BRC.”
`
` The term “modular exponentiation accelerator circuit” is used in
`34.
`
`independent claim 9 as a component of “a secure transaction integrated
`
`circuit.” The specification uses this term twice. In the first instance, the
`
`specification discloses “a high-speed modular exponentiation accelerator
`
`for large integers (math coprocessor).” ’013 Patent, 3:23-25. In the second
`
`instance, the term “modular exponentiation acceleration” is part of a list of
`
`components “preferably integrated on a single silicon chip.” Id. at 3:33-36.
`
`The use of the parenthetical “(math coprocessor),” at the very least,
`
`indicates that a modular exponentiation accelerator circuit is a math co-
`
`processor, which by definition works with another processor.
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`Docket No. 020358.0206-US04
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` Modular exponentiation is a mathematical function. Thus, the use of the
`35.
`
`parenthetical “(math coprocessor)” after “modular exponentiation
`
`accelerator for large integers” is well understood by a person of ordinary
`
`skill in the art.
`
` Based on these disclosures, it is my opinion that the BRC for “modular
`36.
`
`exponentiation accelerator circuit” is “a processor that works with another
`
`processor performing modular exponentiation.”
`
` I also reviewed the district court’s construction of the claim term “modular
`37.
`
`exponentiation accelerator circuit” from the concurrent litigation, which
`
`was “a processor that works with another processor performing complex
`
`mathematics of modular exponentiation for encryption and decryption.” Ex.
`
`1008, 18-19. I generally agree with the district court’s construction as it is
`
`consistent with the specification, with the exception of the words “complex
`
`mathematics,” which do not appear in the specification in relation to
`
`“modular exponentiation acceleration.” I also note that the patentee chose
`
`to use the phrase “complex mathematics” in claim 1, but did not use the
`
`same phrase in claim 9. The implication is that “complex mathematics”
`
`was not intended to be a limiting term in claim 9. It is also unnecessary for
`
`the construction to contain the words “for encryption and decryption,” as it
`
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`Docket No. 020358.0206-US04
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`is already a limitation of the “modular exponentiation accelerator circuit” of
`
`claim 9.
`
`38.
`
` It is my opinion that the other claim terms in the ’013 Patent would be
`
`understood by a person of ordinary skill in the art to carry their plain and
`
`ordinary meaning, and do not require construction.
`
`Hawkes Chapters
`
` I have reviewed the Hawkes Chapters (preface, introduction, and chapters 39.
`
`2, 3, 6 and 8). Based on my review, the Hawkes Chapters are directed to
`
`the state of the art in smart card technology before 1990.
`
` The Hawkes Chapters (Ex. 1003) are chapters appearing in one book. The
`40.
`
`book, titled Integrated Circuit Cards, Tags and Tokens: New Technology
`
`and Applications was published in 1990.
`
` The Hawkes Chapters disclose various aspects of integrated circuit cards
`41.
`
`and tokens. Hawkes Ch. 6 discloses an “intelligent token,” which is a
`
`microcontroller based secure transaction integrated circuit. Figure 6.3 of
`
`Hawkes Ch. 6 is a block diagram of the token.
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`Docket No. 020358.0206-US04
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`
`
` As shown in Figure 6.3 of Hawkes Ch. 6, the token includes a
`42.
`
`microcontroller core such as the “control processor”; a math coprocessor
`
`such as the “RSA processor” connected to the microcontroller core;
`
`memory circuitry such as the “program memory” and “data memory”
`
`connected to the microcontroller core; an input/output interface such as the
`
`“serial I/O” connected to the microcontroller core; and a real time clock
`
`such as the “clock” connected to the microcontroller core. Id.
`
` The Hawkes Chapters teach that the token can be used to perform digital
`43.
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`cash transactions in a secure manner. For example, the Hawkes Chapters
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`disclose that transaction messages can be used to move stored funds from
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`the token to a point-of-sale terminal. Hawkes Preface & Introduction, pp. x,
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`7; Hawkes Ch. 6, pp. 83-85. According to Hawkes Ch. 6, “these messages
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`would be prepared on the retailer terminal and sent to the token for approval
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`by the token holder (inspection in the token window by the user) and, if
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`approved, signed by the token and returned to the terminal.” Hawkes Ch. 6,
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`pp. 84-85. Hawkes Ch. 6 explains that the messages include the amount of
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`funds to be transferred. Id. at 83.
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` As shown in Figure 6.1, random number challenges can be used for
`44.
`
`authentication of the parties to a transaction.
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`
`
` Messages themselves can also be authenticated by including random
`45.
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`numbers in them. Hawkes Ch. 8, p. 150.
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` Hawkes Ch. 8 discloses the use of RSA encryption with the token of
`46.
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`Hawkes Ch. 6, and in particular the use of a specialized chip “for much
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`faster RSA processing.” Id. at 151; see also Hawkes Ch. 6, p. 88, Fig. 6.3
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`(showing separate “RSA processor”). Encryption key pairs are generated
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`by the token. Id. at 161.
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` As demonstrated by Hawkes Ch. 6 and Ch. 8, it was well known to a person
`47.
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`of ordinary skill that a coprocessor could be used to efficiently process the
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`mathematical calculations used in encryption routines.
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` Hawkes Ch. 6 discloses that the illustrated clock maintains information
`48.
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`about the date and time of day, and that including the date and time in the
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`messages prevents replays of transactions. Hawkes Ch. 6, pp. 85, 87.
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` Hawkes Ch. 6 teaches that, in order to reduce size, the functions of separate
`49.
`
`integrated circuits can be “absorbed into one application-specific integrated
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`circuit.” Id. at 87, 89. Hawkes Ch. 6 contemplates that “given demand for
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`the device, it will be feasible to miniaturise the intelligent token still
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`further,” particularly with considerations for the cost of the device. Id. at
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`90.
`
`50.
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` Hawkes Ch. 6 also disclose that, while the original “prototype form” of the
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`Hawkes Ch. 6 token contained 21 discrete integrated circuits, id. at 85, “a
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`smaller device would undoubtedly be more convenient,” id. at 90. To that
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`end, the next stage of development of the token reduced the number of
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`integrated circuits to 11. Id. at 87. Hawkes Ch. 6 contemplates that “a
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`single chip design using the latest digital signal processors is a distinct
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`possibility.” Id. at 89.
`
` These disclosures of Hawkes Ch. 6 are consistent with what was well
`51.
`
`known to those of skill in the art. The idea of taking a collection of chips
`
`and producing them as a single integrated circuit chip was well-known as a
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`way of achieving economies of scale, and a person of ordinary skill in the
`
`art would be motivated to realize those economies by implementing as a
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`single integrated chip without the need for undue experimentation or further
`
`teaching.
`
` Using a single chip rather than multiple chips is more reliable because,
`52.
`
`during assembly, the mounting of each additional chip has a risk of failure.
`
`When mounting multiple chips, if any single chip is mounted incorrectly,
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`the entire assembly will fail, and therefore a larger number of chips
`
`increases the chance of a manufacturing failure.
`
` Using a single chip rather than multiple chips is more reliable because a
`53.
`
`single chip can use a simpler substrate on which the chip is mounted.
`
`Where multiple chips are used, the substrate needs to have etched within it
`
`conductive traces to connect the different chips, which could be at risk of
`
`corrosion or delamination.
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` Mechanically, a single chip is more reliable than multiple chips because it is
`54.
`
`more resilient to environmental stresses. When mounting chips in a flexible
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`card, a single chip will be less prone to having connections broken than
`
`multiple chips interconnected by bond wires or printed circuit board traces.
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` Electronically, a single chip is more secure than multiple chips.
`55.
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`Communications between different chips over wires are easier for an
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`attacker to monitor in an attempt to compromise the system. Where all
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`signals are sent internally within a single chip, attacking the system is
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`considerably more difficult.
`
`56.
`
` The Hawkes Chapters also instruct that integrated circuit cards may be
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`produced in many different shapes and sizes according to the application it
`
`is to be put to. For example, Hawkes Preface and Introduction discloses
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`that “it is possible to design an electronic coin having the shape and size of
`
`a convention coin but functioning as a stored value device” and that “there
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`are many other prospective designs of smart ‘card’ where non-card shapes
`
`are preferable for good mechanical and economic reasons.” Hawkes
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`Preface and Introduction, p. ix-x. Of course, Hawkes Ch. 6 also states that
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`an integrated circuit device may also take the form of “an ISO standard
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`plastic card.” Hawkes Ch. 6, p. 60.
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` Furthermore, it was well known to those of skill in the art that integrated
`57.
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`circuit devices could be made in various shapes and sizes. Given either the
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`explicit disclosures in the Hawkes Chapters or common sense, it would
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`have been obvious for one of skill in the art to incorporate the device of the
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`Hawkes Chapters into an “articulatable item” such as a ring, bracelet, card,
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`necklace, badge or key fob according to the application of the device.
`
`Blandford
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` I have reviewed Blandford (Ex. 1004). Based on my review, Blandford 58.
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`describes an arbitrator, which is a microcontroller-based secure transaction
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`integrated circuit.
`
` As shown in Fig. 1 of Blandford, the arbitrator includes a microcontroller
`59.
`
`core such as a “microcontroller”; a math coprocessor such as the
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`“encryption” block connected to the microcontroller core; memory circuitry
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`
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`such as the “RAM” and “PROM” connected to the microcontroller core; an
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`input/output interface such as the “I/O” block connected to the
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`microcontroller core; and a real time clock such as the “real-time clock” in
`
`Fig. 1 connected to the microcontroller core. Id.
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` Blandford teaches that part of the RAM depicted in Figure 1 is “non-
`60.
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`volatile” RAM, such as an EEPROM. Id. at 10:9-10; 11:6-8.
`
` An example of a secure transaction using the arbitrator taught by Blandford
`61.
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`is that of authenticating time by retrieving the correct time from the real-
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`time clock, appending a random number and ID number, and digitally
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`signing the combination. Id. at 11-12.
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`Lancaster
`
` I have reviewed Lancaster (Ex. 1005). Based on my review, Lancaster 62.
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`describes a microcontroller based device that contains an interpreter for the
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`BASIC programming language.
`
` In Lancaster, the BASIC programming language interpreter is “burned into
`63.
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`the custom CPU.” Lancaster, p. 66.1. Lancaster also discloses that BASIC
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`instructions are tokenized and uploaded to the device’s memory, and that
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`BASIC instructions are “automatically interpreted” each time the device is
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`powered on. Id.
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` Thus, it is clear to a person of ordinary skill in the art that the BASIC
`64.
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`instructions used by the microcontroller based device of Lancaster are not
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`compiled but are rather used as a script programming language to program
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`the microcontroller.
`
`The Combination of the Hawkes Chapters
`
` In my opinion, the Hawkes Chapters would have been readily combined by 65.
`
`a person of skill in the art.
`
` The Hawkes Chapters all appear within the same book edited by P.L.
`66.
`
`Hawkes. As indicated by the title of the book, Integrated Circuit Cards,
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`Tags and Tokens: New Technology and Applications, all of the chapters are
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`directed to the same subject matter -- the implementation of integrated
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`circuit cards.
`
` Cross-references to other chapters in the same book are used throughout the
`67.
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`Hawkes Chapters, showing that the techniques taught in the Hawkes
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`Chapters are complementary. As an example, Hawkes Ch. 8 specifically
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`notes throughout that the encryption techniques it describes are
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`complementary to integrated circuit cards like the intelligent token of
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`Hawkes Ch. 6. See id. at 151, 161 (referring to Hawkes Ch. 6). For
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`example, on page 161, Hawkes Ch. 8 states that the token of Hawkes Ch. 6
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`generates a public key pair for encryption. Id. at 161. The book, in the
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`26
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`CHASE EX. 1014 - p.
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