Application ofo Clustering Adoptive Fuzzy Logic Controller
`
`in o Bmshless DC Drive
`
`James P. Johnson,
`Student Member, [BEE
`
`K.M. Rahman,
`Student Member, IEEE
`
`M. Ehsani,
`Fellow, IEEE
`
`Power Electronics Laboratory
`Texas A&M University
`College Station, Texas
`
`Abstract:
`
`A Cfusrerfng Adaptive Fazzy Logic System (CAFLS) is proposed
`as a high performance controller in o br-ushless o'.c. (BLDC) motor
`drive. Objectives of the proposed system include elimination of
`speed ripple due to cogging at low speeds under heavy load. as well
`as good dynamic response.
`The CAFLS implemented has
`advantages
`of
`computorionoi
`simpiiciry,
`and
`segf-tuning
`characteristics.
`
`Introduction:
`
`Recent trends toward increased efficiency, compactness,
`and reduced package weight point toward the pulse-width
`modulated (PWM) voltage source inverter
`(VSI) driven
`permanent magnet BLDC motor drive as being the most cost
`effective solution for 10 KW and under variable speed
`motion control.
`In [1], recent applications were cited: hvac
`systems, fans, pumps, washers, dryers, treadmills and other
`exercise equipment, wheelchairs, people carriers in airports,
`golf carts, freezers, refrigerators, automotive components,
`handtools, and industrial process drives. To eliminate the
`need for mechanical gearing in many of these applications, a
`drive with low-speed high torque capabilities and negligible
`torque ripple is desired. Torque ripple in Bl..DCs is primarily
`an effect of three causes: I. cogging — due to the discretely
`pulsed operation of the BLDC and its stator field - permanent
`magnet interactions at low-speeds, 2. ripple due to deviances
`of the back~ernf (BEMF) from its ideal trapezoidal shape,
`and 3.
`ripple due to the commutation instants throughout the
`speed range but usually negated by inertial effects at higher
`speeds [2}.
`In the cited reference it was noted that cogging
`can be reduced by skewing by one slot pitch, however this
`leads to an increase in ripple due to the second kind
`previou = mentioned.
`Recs:-. efforts to reduce torque ripple in BLDC drives are
`typically focused on manipulating and distorting the current
`waveforms.
`Simulations based on prescribed current
`
`reference functions shaped according to the particular BElv£F
`shape are described in [3]. Calculations of inverse ripple
`currents from coefficients stored in lockup tables to reduce
`torque ripple currents was effective in simulations in [4],
`however
`a dynamically variable
`reference model of
`considerable complexity and a priori knowledge of the plant
`model was required for its implementation. The authors of
`[5] and [6] proposed similar methods of ripple reductions
`using direct current control based on a one-step ahead current
`predictor,
`requiring system model
`information in the
`construction of torque observers. Other literature concerning
`torque ripple reduction includes the calculation of torque
`ripple harmonics with the FFT, and the generation of variable
`structure controllers.
`
`Fuzzy logic, while developed over 30 years ago, has only
`recently emerged as a useful
`tool
`in industrial control
`applications. Many texts and papers exist explaining the
`fundamentals of fuzzy logic usage, e.g. [740]. Some recent
`uses of filzzy logic have included measures of adaption and
`will be denoted Adaptive Fuzzy Logic Systems (AFLS). One
`method of conventional adaptive control, the model reference
`adaptive control (MRAC) uses an adapting plant model, or
`identifier, to provide states which should be equal to those
`produced by the actual system. A reference model, or plant
`model producing the desired output provides an output signal
`which is compared to that of the actual system which then
`produces an error. The error generated is then used by an
`adaptive control law which modifies a controller in cascade
`with the plant. The error between the identifier output and
`the actual plant output is used to update the identifier model,
`making it more closely emulate the actual plant. Recent uses
`of AFLS in motion control systems have made use of the
`concepts of MRAC. [10] utilized a fuzzy logic controller
`within a conventional MRAC. The authors reported their
`method to be faster than a conventional MRAC (without a
`fuzzy controller) while possessing the ability to adapt
`to
`parameter variations i.n such a manner that tracking errors
`were eliminated.
`in [II}, a fuzzy controller and a fuzzy
`system acting as the model
`in a NIRAC scheme were
`
`0-7803 -3 932-0
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`1001
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`Liberty Mutual Exhibit 1028
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`Liberty Mutual v. Progressive
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`implemented. A third use of fuzzy logic combined with
`MRAC, [12], utilized the inherent adaptive capability of the
`hzzy logic system by implementing it as the MRAC system's
`adaptive mechanism. In this paper, the method of control and
`ripple reduction at low-speeds are based on the use of a
`CAFLS. The proposed controller requires no model of the
`system to be controlled, and is especially suited for systems
`where few input / output data are known a priori for training
`purposes. Similar systems have outperformed the tracking
`capabilities of conventional MRAC systems [SI.
`[SI previously developed an optimal adaptive fuzzy logic
`system (OAFLS). The system used in this paper applies this
`OAFLS with some modifications and external controlling
`algorithm. The basic elements of the fuzzy system are the
`fuzzifier, rule-base, and defuzzifier. As discussed in [7-101
`these elements are available in many different forms. The
`OAFLS of the proposed system is described in the following
`section. Subsequent sections include a development of the
`proposed system, simulation results, experimental setup, and
`conclusions.
`
`I
`
`\
`
` PWM GENERATOR
`
`1 MEASURED DC CURRENT
`
`''error
`
`ERROR
`
`I
`
`I
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`I
`
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`I
`
`I
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`ADUTY CYCLE
`
`SLIDING
`CAFLS
`
`I
`
`I
`I
`
`TMS320C240
`DSP CONTROLLER
`
`- t - - - - - - - "
`
`Wcommand
`
`Proposed System:
`
`Figure 1. Overall System Block Diagram
`
`A block diagram of the proposed system is shown in
`Figure 1. The system consists of a BLDC with encoder
`driven by a six-step inverter, commutation logic and current
`limiting external to the microcontroller.
`Internal to the
`microcontroller is an interrupt-driven routine which provides
`gating signals, speed calculations from encoder information,
`a PWM generator, and the sliding CAFLS. The sliding
`CAFLS follows the flow chart of Figure 2 and equations
`which follow. The "sliding" feature of the CAFLS is a
`memory windowing system which allows different sets of
`clusters to be used depending on actual speed and load. This
`allows the clusters to more closely position themselves
`according to system dynamics and desired control action.
`The CAFLS is an adaptive fuzzy system which is especially
`suitable for systems where few inputloutput sets are known a
`priori.
`In this system the input sets consist of a set of n
`consecutive speed error samples. The output is a change in
`PWM duty cycle for the given inputs which alters the PWM
`so as to optimally correct the dynamic response. The system
`initially starts with a small number of input/output sets which
`are the initial clusters. As input is provided to a given
`window's clusters, the input is compared with the clusters and
`the norm (distance) from the input is determined for each
`cIuster. The distances from each of the clusters is compared
`to a specified radius. If all distances are greater than the
`radius then either a new cluster must be made with the input
`as its center or the radius must be increased if no space is left
`to add clusters. If any distance is less than the radius then the
`cluster having the least distance absorbs the input and
`updates its output coefficients while all other clusters remain
`
`THIS WINLOW .
`
`UPDATE CLUSTERS
`
`CREATE NEW CLUSTER
`
`YES
`
`I DETERMINE ADUTY CYCLE 1
`
`Figure 2. Sliding CAFLS Flow Chart
`
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`unchanged. A defuzzification of the input provides a crisp
`output. Given the following definitions, the CAFLS follows
`in equation form:
`
`DEFINITIONS:
`-
`Xk : vector of inputs after sample k
`-
`C, : nth cluster structure consisting of
`-
`X Cn: nth cluster structure inputs
`Ycn: nth cluster structure output
`UCn: nth cluster coefficient
`
`x(k) I,
`compare the input vector to each cluster in the window,
`
`After each sample, k, update xk = [ x(k-m), x(k-m+l), ... ,
`lx, - xcn I, to determine distances, D, ,
`where
`I w 1 is the norm of w, and
`m is the number of established clusters in the window.
`
`Determine if radius has been exceeded by D,
`
`If R = radius
`all D,,
`then create a new cluster U with
`- -
`&,= xk , Ucu = 1, and Yc, = fout as subsequently defmed.
`If R 2 D, for any x(k-p), p=O,l, ... , m then update Kc- ,
`YCn = Ycn + fout
`UC, = uc, + 1
`
`(1)
`(2)
`
`defuzzify with c
`
`fout =
`
`all m
`
`identifer, as described in
`[SI, uses a back-propagation
`algorithm to update its parameters. An accurate model of the
`system is maintained as the identifier/fuzzy controller is
`continually updated. The parameter vectors which are
`adaptively updated are [TIcn, y,].
`The design of the adaptive
`laws have been shown in [SI. A reference model may be
`chosen as any desired function such as,
`0[k]=2.67 15040 [k- 11-2.35045 1 w [k-2]+0.6787992~1 [k-31
`+3.794871e-2V~-1]+1.004261e-4V[k-2]-3.122917e-V[k-3]
`
`where V is the command speed
`o is the actual speed
`
`which acts as the original system modified by a lead
`compensator. The final output of the system is obtained as
`the the OAFLS output which acts a an adaptive system
`identifier / controller is applied as the duty cycle of the P W M
`applied in the drive. Practical upper and lower limits of
`PWM are enforced which act as additional linguistic rules.
`On-line monitoring of the current level (.c load during
`constant speedhoad operation), and updating the particular
`CAFLS corresponding to the load during constant speed
`operation, causes the adaptive identifier/fuzzy controller
`parameters to closely track those of the actual plant. For the
`proposed system all clusters are of equal size, with a 4
`element input vector consisting of 3 consecutive speed error
`values and the command speed. The size of the clusters, and
`maximum r m b e r of clusters is arbitrary, limited only by
`resources. As in Figure 2, the radius R may
`system stoi..:
`be varied as cluster limits are met. The smaller the R, the
`greater the granularity of the clusters and the greater the
`possibility new clusters will be formed. The parameter y in
`(3) is used to enhance the accuracy of the solution of the
`OAFLS. Larger y tends to allow the OAFLS to generalize
`and tends to smooth the recalled output for a given
`inputloutput data set, while a smaller y tends to provide a
`more accurate output, but has less generalizing capability to
`new input.
`
`_I
`
`Simulation Results:
`
`which
`is an OAFLS with singleton fuzzifier, Gaussian
`membership functions whose width is varied by user defined
`a product-inference
`rule,
`and
`a
`center-average
`y,
`defuzzification process [SI.
`The initial clusters for the windows are constructed by
`utilizing a system model based on the manufacturer's
`specifications. The initial usage of this system, as was shown
`in Figure 1 was as a feedback controller. A natural
`adaptiveness of this controller is in the ability of the CAFLS
`to cluster new inputs around a given number of cluster
`centers. Optimal values of radius and y were chosen off-line.
`A more complex approach is to update each window's
`clusters by an on-line adaptive series-parallel identifier. The
`
`A C program was used to simulate a BLDC drive model
`with a CAFLS in a feedback controller configuration. The
`initial cluster values were obtained with an off-line optimal
`control algorithm using the simulation model under varying
`load conditions prior to starting the CAFLS control. The
`objective of the CAFLS was reduction of speed ripple at low
`speeds with a heavy load while maintaining satisfactory
`dynamic response. Figure 3 shows the speed response of the
`optimal, the CAFLS, and a PI control for a speed setpoint of
`100 rpm with a constant (3/4)*rated load. Figure 4 shows a
`cycle of the current waveforms for one phase for each of
`these simulations.
`
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`1 5
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`2
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`2 5
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`I
`3
`x IO'
`1
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`0.161
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`0.14 -
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`0.12 -
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`0 1
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`0.08'
`0
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`0.5
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`1
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`1.5
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`2
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`2.5
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`I
`3
`x IO'
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`x io'
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`Figure 3. Step load responses of the BLDC system with (top) the
`optimal controller, (middle) the CAFLS controller, and (bottom) the PI
`controller (units: abscissa::time step [ l e 4 s1;ordinate::speed [krpm]}.
`
`Experimental Setup:
`
`The system which is being used to experimentally verify
`the simulation results is was shown in the block diagram of
`Figure 1. The DSP Controller used is a Texas Instruments
`TMS320F240 ('F240) which is based on the futed point C2xx
`core architecture. With the capabilities of this DSP
`Controller, it can be used as a virtual one-chip controller.
`This DSP Controller is specially designed with power and
`machine control in mind. Included are all of the standard
`power electronics peripherals with the processing speed of a
`DSP (up to a 20 MHz CPU clock with dual memory access in
`a single clock cycle possible). Included on the IF240 are 64K
`memory, two 8-channel multiplexed 10-bit A/D ports, 3
`independant 16-bit timers with six modes of counting
`possible, 4 capture units - two of which can be programmed
`as quadrature encoder pulse (QEP) inputs, 12 compare units,
`
`15
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`10
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`5
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`0
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`-5
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`-10
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`10-
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`5 -
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`o h
`-5 .
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`-IOo
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`0 5
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`1
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`1 5
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`2
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`2 5
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`I
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`x 10'
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`0.5
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`1
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`1.5
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`2
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`2.5
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`x lo'
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`3
`x IO'
`
`-151)
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`0.5
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`1
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`1.5
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`2
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`2.5
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`___
`Figure 4. The initial current waveforms during the step load responses
`of the BLDC system (Figure 3) with (top) the optimal controller,
`(middle) the CAFLS controller, and (bottom) the PI controller {units:
`abscissa::time step [le-5 s];ordinate::current [A]).
`the ability to generate up to 9 independent P W M outputs,
`28individually programmable digital VO pins, serial
`communications capability, memory expansion ability, a
`highly flexible choice of interrupt capabilities, and more.
`BLDC control with the 'F240 was implemented with
`encremental encoder feedback. One of the capture units was
`used with a timerkounter as the QEP channel A and B inputs
`and a third capture and interrupt as the index pulse
`timerkounter reset. The 3 full compare units of the IF240
`provided 3 independent P W M channels on 6 output pins,
`used as the gating signals for the 6-step inverter by masking
`and unmasking the appropriate gating signals with an "action
`control register" of the IF240 according to the commutation
`signals required in sychronization with the QEP position
`information. Current sensing information was easily
`
`1004
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`accessed through the A/D ports of the 'F240. The inverter is a
`six-step MOSFET inverter with current limiting with an
`option of hysteresis current control. The 3- phase, 4-pole,
`BLDC used is rated at 1 HP, and is attached in a direct-drive
`configuration to a 600 cpr 3-channel optical encoder and 1
`HP DC motor load. Experimental results will be available in
`subsequent work, possibly by the date of the conference.
`Experimental results will include an analysis of the reduction
`of speed ripple at low speed under heavy load and the
`insensitivity of the CAFLS controller to load disturbances.
`
`Conclusions:
`
`A BLDC speed controller with the goal of reducing speed
`ripple at low speeds with heavy loading was presented.
`Simulation results showed that the speed ripple and dynamic
`response of the system using a CAFLS as a feedback
`controller was superior to the PI controlled system, but not as
`good as the optimal control for constant speed operations.
`The CAFLS system outperformed the optimally controlled
`system and the PI controlled system during the initial step
`response (dynamic response), even though the CAFLS used
`the data of the optimal system to train. This was believed
`due to the generalizing ability of the CAFLS. Future work
`will focus on implementation of the CAFLS as a feedback
`controller and in an MRAC type system as described in the
`"Proposed System" part of this paper. Implementation will
`emphasize a minimal component type system by using the
`newly developed TMS320F240 with a small number of
`additional buffering type i.e.'s, inverter and current sensing
`and limiting circuitry.
`
`Acknowledgements:
`
`The support -of Texas Higher Education Coordinating
`Board Advanced Technology Program, TRW Electronic
`Controlled Steering, General Motors Research Laboratories,
`and Texas Instruments Digital Control Systems Division, for
`this research is gratefully acknowledged.
`
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`
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