Case 1:16-cv-00290-MN Document 103-3 Filed 10/17/18 Page 1 of 150 PageID #: 2402
`
`242. Han Zhao, Jung Hwan Yum, Yen-Ting Chen, and Jack C Lee “In0.53Ga0.47As n-
`MOSFETs with ALD Al2O3, HfO2 and LaAlO3 gate dielectrics”, 36th Conference on
`the Physics and Chemistry of Semiconductor Interfaces, (2009)
`
`
`243. Yen-Ting Chen, Han Zhao, Jung Hwan Yum, Yanzhen Wang, Fei Xue, Fei Zhou, and
`Jack C. Lee, "In0.53Ga0.47As MOSFETs with CF4 plasma treatment and Al2O3 gate
`oxide", International Symposium on Advanced Gate Stack Technology (ISAGST),
`August 2009
`
`
`244. Yen-Ting Chen, Han Zhao, Jung Hwan Yum, Yanzhen Wang, and Jack C. Lee,
`"Atomic-layer-deposited HfO2 gate dielectrics on InP using silicon interface
`passivation layer" Electronic Materials Conference (EMC) 2009
`
`
`245. Han Zhao, Yen-Ting Chen, Jung Hwan Yum, and Jack C Lee “Channel Doping
`Concentration and Thickness Dependence of Device Performance for In0.53Ga0.47As
`n-MOSFETs with ALD Al2O3 dielectrics”, 2009 Materials Research Society Spring
`Meeting
`
`
`246. Han Zhao, and Jack C Lee, “Self-aligned In0.53Ga0.47As MOSFETs with Atomic
`Layer Deposited Al2O3, ZrO2, and Stacked Al2O3/ZrO2 Gate Dielectrics”, 2009
`International Conference on IC Design and Technology
`
`
`247. J. Lee (Invited Paper) “High-K III-V MOSFETs” 1st International Symposium on
`Integrated Ferroelectrics and Functionalities (ISIF2), in Colorado Springs, CO,
`September 27-30, 2009
`
`
`248. J. Lee, H. Zhao, Y. Chen, J. Yum, F. Xue, F. Zhou and Y. Wang, (Invited Paper)
`“High Performance InGaAs MOSFETs with High Mobility using InP Barrier Layer"
`216th Electrochemical Society Meeting (E10 - ULSI Process Integration) in Vienna,
`Austria, October 2009.
`
`
`249. J. Huang, N. Goel, H. Zhao, C. Y. Kang, K.S. Min, G. Bersuker, S. Oktyabrsky, S.
`Koveshnikov, Jack C. Lee, P. Majhi, W. Tsai, P. D. Kirsch, H. H. Tseng and R.
`Jammy, “InGaAs MOSFET Performance and Reliability
`Improvement by
`Simultaneous Reduction of Oxide and Interface Charge in ALD (La)AlOx/ZrO2 Gate
`Stack”, IEEE International Electron Devices Meeting IEDM 13.5, 2009
`
`
`250. K.S. Min, C.Y. Kang, C. Park, C.S. Park, B. J. Park, J. B. Park, M. M. Hussain, Jack
`C. Lee, B. H. Lee, P. Kirsch, H-H, Tseng, R. Jammy, and G. Y. Yeom, “A Novel
`Damage-Free High-k Etch Technique Using Neutral Beam Assisted Atomic Layer
`Etching (NBALE) for sub-32nm Technology Node Low Power Metal Gate/High-K
`Dielectric CMOSFETs” IEEE International Electron Devices Meeting IEDM 17.4,
`2009.
`
`
`251. Han Zhao, Ning Kong, Yen-Ting Chen, Yanzhen Wang, Fei Xue, Fei Zhou, Sanjay
`K. Banerjee and Jack C. Lee, “Effects of InP barrier layer thicknesses and different
`
`App. 0544
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`

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`
`ALD oxides on device performance of In0.7Ga0.3As MOSFETs”, IEEE Device
`Research Conference, (2010).
`
`
`252. H. Zhao, N. Goel, J. Huang, Y. Chen, J. Yum, Y. Wang, F. Zhou, F. Xue, and J. Lee,
`In0.7Ga0.3As MOSFETs and Tunneling FETs Device
`“Factors Enhancing
`performance” IEEE Device Research Conference, (2010).
`
`
`253. (Invited Paper) Jack Lee, Han Zhao, Yen-Ting Chen, Yanzhen Wang, Fei Xue, Fei
`Zhou, “Investigation of III-V n-MOSFETs with ALD high-k gate oxides”, 4th
`International Workshop on High-k dielectrics on High Carrier Mobility Channel
`Materials, (2010)
`
`
`254. Y. Wang, H. Zhao, Y. Chen, F. Xue, F. Zhou, and J. Lee, "Atomic-Layer-Deposition
`HfO2Based InP n-Channel MOSFETs Using Different Thicknesses of Al2O3 as
`Interfacial Passivation Layer", Electrochemical Society (ECS) Transactions, Vol. 33,
`487, Oct. 2010.
`
`
`255. Fei Xue, Han Zhao, Yen-Ting Chen, Yanzhen Wang, Fei Zhou and Jack C. Lee,
`“Investigation of surface channel InGaAs MOSFETs with Al2O3 and ZrO2 ALD Gate
`Dielectric”, Electrochemical Society Transactions. 33(3), 487, (Oct. 2010)
`
`
`256. [Best Student Paper Award] F. Xue, H. Zhao, Y. Chen, Y. Wang, F. Zhou and J.
`Lee, “InAs and In0.7Ga0.3As buried channel MOSFETs with ALD gate dielectrics”
`41th IEEE Semiconductor Interface Specialists Conference, (Dec. 2010)
`
`
`257. F. Xue, H. Zhao, Y. Chen, Y. Wang, F. Zhou and J. Lee “Investigation of ALD Al2O3
`and ZrO2 Gate Dielectric InGaAs Surface Channel MOSFETs with Large EOT
`Range” 2010 Materials Research Society Fall Meeting, Nov. 2010.
`
`
`258. (Invited paper) J. C. Lee, H. Zhao, Y. Chen, Y. Wang, F. Xue, and F. Zhou,
`“Buried-channel In0.7Ga0.3As MOSFETs and vertical In0.7Ga0.3As tunneling FETs for
`beyond CMOS applications,” Electrochemical Society (ECS) Transactions, Vol. 33,
`Oct. 2010.
`
`
`259. Yen-Ting Chen, Han Zhao, Yanzhen Wang, Fei Xue, Fei Zhou, and Jack C. Lee,
`"Improved Electrical Performance of Fluorinated HfO2 dielectrics on
`In0.53Ga0.47As MOSFETs" Materials Research Society (MRS) November 2010.
`
`
`260. Y. Wang, Y. Chen, H. Zhao, F. Xue, F. Zhou, and J. Lee, "Improved Electrical
`Characteristics of ALD HfO2, Al2O3 Based n-Channel MOSFETs on InP Substrate
`with Postgate SF6 Plasma Treatment ", IEEE Semiconductor Interface Specialists
`Conference, Dec. 2010.
`
`
`261. (Invited Keynote Speaker) Jack C Lee, “High-K Dielectrics / High-Mobility
`Channel MOSFETs,” SEMINATEC Workshop, Campinas, Brazil, March 24-25,
`2011.
`
`App. 0545
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`

`Case 1:16-cv-00290-MN Document 103-3 Filed 10/17/18 Page 3 of 150 PageID #: 2404
`
`
`262. Yen-Ting Chen, Han Zhao, Yanzhen Wang, Fei Xue, Fei Zhou, and Jack C. Lee,
`"ZrO2-based InP MOSFETs (EOT = 1.2nm) Using Various Interfacial Dielectric
`Layers", the Electrochemical Society (ECS) the 219th meeting May 2011.
`
`
`263. J. Huang, N. Goel, P. Lysaght, D. Veksler, P. Nagaiaha, S. Oktyabrsky, , J. Price, H.
`Zhao, Y.T. Chen, J. C. Lee, J. C. Woicik, P. Majhi, P. D. Kirsch, and R. Jammy,
`“Detailed High-k/In0.53Ga0.47As Interface Understanding
`to Enable Improved
`In0.53Ga0.47As Gate Stack Quality” 2011 VLSI-TSA Symposium, June 2011.
`
`
`264. Luca Morassi, Giovanni Verzellesi, Paolo Pavan, Dmitry Veksler, Injo Ok, Han
`Zhao, Jack C. Lee and Gennadi Bersuker, “Experimental/numerical investigation of
`buried-channel InGaA MOS-HEMTs with Al2O3 gate dielectric,” IPRM 2011 --- 23th
`International Conference on Indium Phosphide and Related Materials, Berlin,
`Germany, May 2011.
`
`
`265. L. Morassi, G. Verzellesi, P. Pavan, D. Veksler, I. Ok, H. Zhao, J.C. Lee, G.
`Bersuker, “Experimental/numerical investigation of buried-channel InGaAs MOS-
`HEMTs with Al2O3 gate dielectric”, Proc. of the 23th International Conference on
`Indium Phosphide and Related Materials (IPRM 2011), Berlin (Germany), May 2011,
`pp. 103-105.
`
`
`266. L. Morassi, G. Verzellesi, L. Larcher, H. Zhao, J.C. Lee, “Errors affecting split-CV
`mobility measurements in InGaAs MOS-HEMTs”, Proc. of the 23th International
`Conference on Indium Phosphide and Related Materials (IPRM 2011), Berlin
`(Germany), May 2011, pp. 327-329.
`
`
`267. T. Akyol, J. H. Yum, D. A. Ferrer, M. Lei, M. Downer, C. W. Bielawski, T. W.
`Hudnall, G. Bersuker, J. Lee and S. Banerjee, “Introduction of ALD Beryllium Oxide
`Gate Dielectric for III-V MOS Devices,” Device Research Conference, Santa
`Barbara, 2011.
`
`
`268. Hao Tang, Patrice Rannou, Ryan A. Mesch, Lei Zhu, Edward T. Yu, Jack C. Lee, and
`C. Grant Willson, “Mobility Enhancement in Mesophases of Liquid Crystalline
`Organic Semiconductors,” Organic Microelectronics & Optoelectronics Workshop
`VII in San Francisco, July 18-20, 2011.
`
`
`269. Fei Xue, Han Zhao, Yen-Ting Chen, Yanzhen Wang, Fei Zhou, and Jack Lee,
`“In0.7Ga0.3As tunneling field-effect-transistors with LaAlO3 and ZrO2 high-k
`dielectrics”, Electrochemical Society meeting (2011).
`
`
`270. (Invited Paper) Jack C. Lee, F. Xue, Y. Chen, Y. Wang, and F. Zhou, “High-K
`Dielectrics / High-Mobility Channel MOSFETs” Electrochemical Society meeting
`(2011).
`
`
`
`App. 0546
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`

`Case 1:16-cv-00290-MN Document 103-3 Filed 10/17/18 Page 4 of 150 PageID #: 2405
`
`271. Y. Wang, H. Zhao, Y. Chen, F. Xue, F. Zhou, and J. Lee, “SF6 plasma treated high k
`dielectrics engineering on InP metal-oxide-semiconductor field-effect-transistors”,
`220th ECS Meeting, October 2011, Boston, MA.
`
`
`272. J. H. Yum, T. Akyol, M. Lei, D. A. Ferrer, Todd. W. Hudnall, M. Downer, C. W.
`Bielawski, G. Bersuker, J. C. Lee and S. K. Banerjee, “ALD Beryllium Oxide as a
`High-k Gate Dielectric for III-V MOS Devices,” Session A-44, the 2011 Atomic
`Layer Deposition Conference.
`
`
`273. J. Yum, “ALD Beryllium Oxide: Novel Barrier Layer for High Performance Gate
`Stacks on Si and High Mobility Substrates,” IEEE International Electron Devices
`Meeting Technical Digest, p. 638-641, 2011.
`
`
`274. F. Xue, Y. Chen, Y. Wang, F. Zhou, B. Fowler, and J. Lee, "The Effect of Plasma
`Treatment on Reducing Electroforming Voltage of Silicon Oxide RRAM", 221st ECS
`Meeting in Seattle, Washington (May 6 -10, 2012).
`
`
`275. Y. T. Chen, J. Huang, J. Price, P. Lysaght, D. Veksler, C. Weiland, J. C. Woicik, G.
`Bersuker, R. Hill, J. Oh, N. Goel, P. D. Kirsch, R. Jammy, and J. C. Lee, "III-V Gate
`Stack Interface Improvement to Enable High Mobility 11nm node CMOS",
`International Symposium on VLSI Technology, Systems and Applications, Hsin-Chu,
`R.O.C., 2012.
`
`
`276. Yao-Feng Chang, Yen-Ting Chen, Fei Xue, Yanzhen Wang, Fei Zhou, Burt Fowler,
`and Jack C. Lee, “Study of SiOx-based Complementary Resistive Switching
`Memristor”, Device Research Conference, June 18-20 (2012).
`
`
`277. Y. Wang, Y. Chen, F. Xue, F. Zhou, and J. Lee, “MOSFETs on InP substrate with
`LaAlO3/HfO2 bilayer of different LaAlO3 thickness and single LaXAl1-XO layer with
`different La doping level”, 222th ECS meeting (Honolulu HI, Oct. 2012).
`
`
`278. (Invited talk) Jack Lee, Fei Xue, Yen-Ting Chen, Yanzhen Wang, Fei Zhou, Yao-
`Feng Chang and Jack Lee, “Excellent Device performance of III-V Channel Field-
`Effect-Transistors with High-k Gate Dielectrics,” Technical Digest of World
`Congress of Nano-Science and Technologies, Qingdao, China September 2012.
`
`
`279. Mina J. Hanna, Han Zhao, and Jack C. Lee, “Hysteresis-like effect in AlGaN/GaN
`MISFETs with SiN gate dielectric,”
`International workshop on nitride
`semiconductors, Sapporo, Japan, Oct. 2012.
`
`
`280. X. Sun, N. Xu, F. Xue, A. Alian, F. Andrieu, B.Y. Nguyen, T. Poiroux, O. Faynot, J.
`Lee, S.Cui and T. P .Ma, “AC Transconductance: A Novel Method to Characterize
`Oxide Traps in Advanced FETs without a Body Contact” IEEE International Electron
`Devices Meeting (IEDM), p.19.4.1-19.4.4, Dec. 2012.
`
`
`
`App. 0547
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`

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`
`281. Fei Xue, Aiting Jiang, Yen-Ting Chen, Yanzhen Wang, Fei Zhou, Yaofeng Chang
`and Jack Lee, “Excellent Device performance of 3D In0.53Ga0.47As Gate-Wrap-
`Around Field-Effect-Transistors with High-k Gate Dielectrics,” IEEE International
`Electron Devices Meeting (IEDM), p.27.5.1-27.5.4, Dec. 2012.
`
`
`282. Yao-Feng Chang, Yen-Ting Chen, Fei Xue, Yanzhen Wang, Fei Zhou, Pai-Yu Chen,
`Burt Fowler, and Jack C. Lee, “Study of device architecture and multilevel
`characteristics in SiOx-based resistive switching memory”, IEEE Semiconductor
`Interface Specialists Conference, December 6-8 (2012).
`
`
`283. Yao-Feng Chang, Pai-Yu Chen, Burt Fowler, Yen-Ting Chen, Fei Xue, Yanzhen
`Wang, Fei Zhou, and Jack C. Lee, “Study of ambient effect in active SiOx-based
`resistive switching memory”, International Symposium on VLSI Technology,
`Systems and Applications, April 22-24 (2013).
`
`
`284. Yao-Feng Chang, Ying-Chen Chen, Ji Li, Fei Xue, Yanzhen Wang, Fei Zhou, Burt
`Fowler and Jack C. Lee, “Comprehensive Trap-Level Study in SiOx-based Resistive
`Switching Memory”, Device Research Conference, June 23-26 (2013).
`
`
`285. Yao-Feng Chang, Li Ji, Pai-Yu Chen, Fei Zhou, Fei Xue, Burt Fowler, Edward T. Yu,
`Jack C. Lee, “Study of SiOx-Based Resistive Switching Memory by Nano-Sphere
`Lithography”, IEEE Semiconductor Interface Specialists Conference, December 5-7
`(2013).
`
`
`286. Li Ji, Yao-Feng Chang, Ying-Chen Chen, Fei Zhou, Tsung-Ming Tsai, Kuan-Chang
`Chang, Min-Chen Chen, Ting-Chang Chang, Burt Fowler, Jack C. Lee, Edward T.
`Yu, “Optimization of High Density One Diode - One Resistor Architecture in Nano-
`Pillar SiOx-Based Resistive Switching Memory by Nano-Sphere Lithography”,
`Materials Research Society Spring Meeting, April 21-25 (2014).
`
`
`287. Yao-Feng Chang, Li Ji, Ying-Chen Chen, Fei Zhou, Tsung-Ming Tsai, Kuan-Chang
`Chang, Min-Chen Chen, Ting-Chang Chang, Burt Fowler, Edward T. Yu and Jack C.
`Lee, “High-density nano-pillar SiOx-based resistive switching memory using nano-
`sphere lithography to fabricate a one diode - one resistor (1D-1R) architecture”, IEEE
`International Symposium on VLSI Technology, Systems and Applications, April 28-
`30 (2014).
`
`
`288. (Invited Paper) Fei Zhou, Fei Xue, Yao-Feng Chang and Jack Lee, “III-V Gate-
`Wrap-Around Field-Effect-Transistors with High-k Gate Dielectrics,” Device
`Research Conference, June 22-25, 2014.
`
`
`289. Yao-Feng Chang, B. Fowler, Y. Chen, L. Ji, F. Zhou and Jack Lee, “The Voltage-
`Triggered SET Mechanism and Self-Compliance Characteristics in Intrinsic Unipolar
`SiOx-Based Resistive Switching Memory,” Device Research Conference, June 22-25,
`2014.
`
`
`
`App. 0548
`
`

`

`Case 1:16-cv-00290-MN Document 103-3 Filed 10/17/18 Page 6 of 150 PageID #: 2407
`
`290. Fei Zhou, Yao-Feng Chang, Burt Fowler, and Jack C. Lee, "Characteristics of
`PECVD SiOxN1-x for Resistive Memory Application" International Conference on
`Metallurgical Coatings & Thin Films, April 28 - May 2 (ICMCTF 2014).
`
`
`291. Fei Zhou, Yao-Feng Chang, Burt Fowler, and Jack C. Lee, "Discussion on Backward
`Voltage Sweep Set Effect in SiOx Resistive Memory" 32nd International Conference
`on the Physics of Semiconductors (ICPS 2014), August 10-15.
`
`
`292. Yao-Feng Chang, Burt Fowler, Li Ji, Ying-Chen Chen, Fei Zhou, Edward T. Yu,
`and Jack C. Lee, "Comprehensive Study of Intrinsic Unipolar SiOx-Based RRAM
`Characteristics and Self-Compliance Characteristics in High-Density Nano Pillar-
`Type 1D-1R Architecture" 32nd International Conference on the Physics of
`Semiconductors (ICPS 2014), August 10-15.
`
`
`293. Li Ji, Yao-Feng Chang, Burt Fowler, Ying-Chen Chen, Tsung-Ming Tsai, Kuan-
`Chang Chang, Min-Chen Chen, Ting-Chang Chang, Simon M. Sze, Edward T. Yu,
`and Jack C. Lee, “Resistive Switching of SiOX with One Diode-One Resistor
`Nanopillar Architecture Fabricated via Nanosphere Lithography”, IEEE Device
`Research Conference, June 22-25 (2014).
`
`
`294. Li Ji, Martin D. McDaniel, Li Tao, Xiaohan Li, Agham B. Posadas, Yao-Feng Chang,
`Alexander A. Demkov, John G. Ekerdt, Deji Akinwande, Rodney S. Ruoff, Jack C.
`Lee and Edward T. Yu, “Atomic Scale Engineering of Metal-Oxide-Semiconductor
`Photoelectrodes for Energy Harvesting Application Integrated with Graphene and
`Epitaxy SrTiO3,” 2014 IEEE International Electron Devices Meeting (IEDM), San
`Francisco, CA, December 15th-17th, 2014.
`
`
`295. Yao-Feng Chang, Burt Fowler, Fei Zhou, Kwangsub Byun, Jack C. Lee, "Study of
`SiOx-Based Resistive Switching Memory (ReRAM) in Integrated One Diode – One
`Resistor (1D-1R) Architecture" IEEE Semiconductor Interface Specialists Conference
`(SISC), December 10-13 (2014).
`
`
`296. (Invited Talk) J. Lee, “Advantages and Challenges of FinFET Devices and
`Technologies,” Northern California Chapter American Vacuum Society Conference,
`Sept. 25, 2014.
`
`
`297. K. Byun, F. Zhou, B. Fowler, Y.F. Chang, and J.C. Lee "Electrical characteristics of
`Si nanocrystal filament in unipolar SiOx based RRAM," 45th IEEE Semiconductor
`Interface Specialists Conference (SISC), Dec. 2014.
`
`
`298. Yao-Feng Chang, Burt Fowler, Fei Zhou, Kwangsub Byun, Jack C. Lee, "Study of
`SiOx-Based Resistive Switching Memory (ReRAM) in Integrated One Diode – One
`Resistor (1D-1R) Architecture" 45th IEEE Semiconductor Interface Specialists
`Conference (SISC), December 10-13 (2014).
`
`
`
`App. 0549
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`

`

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`
`299. Yao-Feng Chang, Burt Fowler, Fei Zhou, Kwangsub Byun, Jack C. Lee,
`"Understanding Electroforming and Resistive Switching in Silicon Dioxide Resistive
`Memory Devices" American Physical Society (APS) March Meeting 2015.
`
`
`300. Yao-Feng Chang, Burt Fowler, Fei Zhou, Kwangsub Byun, and Jack C. Lee,
`"Comprehensive study of intrinsic unipolar SiOx-based ReRAM characteristics and
`resistive switching mechanism in TiW/SiOx/TiW structure" International Symposium
`on VLSI Technology, Systems and Applications (2015 VLSI-TSA) April 2015.
`
`
`301. [Best Student Papers Award] Yao-Feng Chang, Burt Fowler, Fei Zhou, Jack C.
`Lee, “Study of SiOx-Based Resistive Switching Memory (ReRAM) in Integrated One
`Diode – One Resistor (1D-1R) Architecture,” 4th International Symposium on Next-
`Generation Electronics (IEEE ISNE 2015) at National Taiwan University of Science
`and Technology in Taipei, Taiwan from May 4-6, 2015.
`
`
`302. (Invited Talk) Yao-Feng Chang, Burt Fowler, Fei Zhou, and Jack C. Lee, "The Intrinsic
`Unipolar SiOx-based Resistive Switching Memory: Characterization, Mechanism and
`Applications" ECS Fall Meeting (2015).
`
`
`303. (Invited Talk) Yao-Feng Chang, "Intrinsic Unipolar SiOx-Based Resistive Switching
`Memory: Characterization, Mechanism and Applications" International Symposium on
`Next-Generation Electronics, Taipei, Taiwan, May 4 - 6 (2015).
`
`
`304. Kwangsub Byun, Ying Wang, Bruce Adams, Jack Lee, “Laser Curing and Ink-Jet
`Processes for Fabricating SiOx RRAM Structures,” 43rd International Conference on
`the Physics and Chemistry of Surfaces & Interfaces (PCSI-43), 2016.
`
`
`305. (Best Paper Award Finalist) Ying-Chen Chen, Yao-Feng Chang, Burt Fowler, Fei
`Zhou, Xiaohan Wu, Cheng-Chih Hsieh, Heng-Lu Chang, Chih-Hung Pan, Min-Chen
`Chen, Kuan-Chang Chang, Tsung-Ming Tsai, Ting-Chang Chang, and Jack C. Lee,
`"Comprehensive Study of Intrinsic Unipolar SiOx-Based ReRAM Characteristics in AC
`Frequency Response and Low Voltage (< 2V) Operation" International Symposium on
`VLSI Technology, Systems and Applications (VLSI- TSA) 2016.
`
`
`306. Ying-Chen Chen, Yao-Feng Chang, Xiaohan Wu, MeiqiGuo, Fei Zhou, Burt Fowler,
`Jack C Lee, “Characterization of SiOx/HfOx bilayer Resistive-Switching Memory
`Devices,” Electrochemical Society (ECS) Meeting, 2016.
`
`
`307. Meiqi Guo, Ying-Chen Chen, Yao-Feng Chang, Xiaohan Wu, Burt Fowler, Yonggang
`Zhao and Jack C. Lee, "Characteristics of Electrically Driven Metal-Insulator-Transition
`(E-MIT) in Nb-doped SrTiO3 and HfO2-based Selector Devices," Device Research
`Conference (DRC) (2016).
`
`
`308. Fei Zhou, Ying-Chen Chen, Xiaohan Wu, MeiqiGuo, Burt Fowler, Jack Lee “The
`Role of Oxygen Deficiency in SiOx Based Resistive Memory,” International
`Conference on Metallurgical Coatings and Thin Films (ICMCTF), 2016.
`
`
`
`App. 0550
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`

`

`Case 1:16-cv-00290-MN Document 103-3 Filed 10/17/18 Page 8 of 150 PageID #: 2409
`
`309. (Invited) Ying-Chen Chen, Xiaohan Wu, MeiqiGuo, Fei Zhou, Yao-Feng Chang,
`Burt Fowler, Chih-Hung Pan, Ting-Chang Chang, Jack C Lee, "Memcomputing
`(Memristor+ Computing) in Intrinsic SiOx-Based Resistive Switching Memory",
`230th Meeting of The Electrochemical Society (2016).
`
`
`310. Ying-Chen Chen, Xiaohan Wu, Meiqi Guo, Fei Zhou, Yao-Feng Chang**, Burt
`Fowler, Chih-Hung Pan, Ting-Chang Chang, and Jack C. Lee, "Memcomputing
`(Memristor + Computing) in Intrinsic SiOx-Based Resistive Switching Memory"
`PRiME 2016 (Invited Talk).
`
`311. (Best Student Paper Award) Chih-Yang Lin, Ying-Chen Chen, Meiqi Guo, Chih-
`Hung Pan, Fu-Yuan Jin, Cheng Chih Hsieh, Xiaohan Wu, Min-Chen Chen, Yao-Feng
`Chang, Fei Zhou, Burt Fowler, Kuan-Chang Chang, Tsung-Ming Tsai, Ting-Chang
`Chang, Yonggang Zhao, Simon M. Sze, Sanjay Banerjee, Jack C. Lee, "A Universal
`Model for Interface-type Threshold Switching Phenomena by Comprehensive Study
`of Vanadium Oxide-Based Selector", International Symposium on VLSI Technology,
`Systems and Applications (2017 VLSI-TSA), Hsinchu, Taiwan, April 24-27, (2017).
`
`
`312. Sungjun Kim, Yao-Feng Chang*, Ying-Chen Chen, Byung-Gook Park, and Jack C.
`Lee, “Resistive Switching Characteristics and Mechanisms in Silicon Oxide and
`Silicon Nitride Memristors”, China RRAM International Workshop (2017).
`
`313. Y.-C. Chen, YF Chang, CY Lin, X Wu, G Xu, B Fowler, TC Chang, JC Lee, “Built-
`in Nonlinear Characteristics of Low Power Operating One-Resistor Selector-Less
`RRAM By Stacking Engineering”, 232nd Meeting of The Electrochemical Society
`(2017).
`
`314. Jia Chen, Sungjun Kim, Ying-Chen Chen, Min-Hwi Kim, Yi Li, Xiang-Shui Miao,
`Yao-Feng Chang, Byung-Gook Park, Jack C. Lee, “Synaptic Properties Considering
`Temperature Effect in HfOx-Based Memristor – Demonstration of Homo-thermal
`Synaptic Behaviors”, International Symposium on VLSI Technology, Systems and
`Applications (VLSI-TSA) (2018).
`
`315. Y.-C. Chen, C.-Y. Lin, Y.-F. Chang, T.-C. Chang, J. Lee, “Selector-Less Graphite
`Memristor: Intrinsic Nonlinear Behavior with Gap Design Method for Array
`Applications,” 233rd Meeting of The Electrochemical Society (2018).
`
`316. Ruijing Ge, Xiaohan Wu, Myungsoo Kim, Po-An Chen, Jianping Shi, Junho Choi,
`Xiaoqin Li, Yanfeng Zhang, Meng-Hsueh Chiang, Jack C. Lee and Deji Akinwande,
`“Atomristors: Memory Effect in Atomically-thin Sheets and Record Solid-state RF
`Switches,” to be published at IEEE International Electron Devices Meeting (IEDM),
`San Francisco, CA, December 1-5, 2018.
`
`
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`App. 0551
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`Case 1:16-cv-00290-MN Document 103-3 Filed 10/17/18 Page 9 of 150 PageID #: 2410
`
`PATENTS ISSUED
`
`1. B. Doyle and J. Lee, "Method for Forming a High Dielectric Constant Insulator in the
`Fabrication of an Integrated Circuit, " filed Dec. 1996 (issued April 1999, 5,891,798)
`2. M. Gardner, M. Gilmer, J. Fulford and J. Lee, "Semiconductor Device Having a Tri-
`Layer Gate Insulating Dielectric," filed Dec. 1997 (issued May 2000, 6,057,584)
`3. M. Gardner, J. Fulford and J. Lee, "Semiconductor Having a PMOS Device Having
`Source/Drain Region Formed using a Heavy Atom P-type Implant and Method of
`Manufacturing Thereof," filed Dec. 1997 (issued Jan 2000, 6,013,546).
`4. M. Gardner, J. Fulford and J. Lee, “Semiconductor Device with Asymmetric PMOS
`Source/Drain Implant and Method of Manufacture Thereof” filed Dec. 1997, (issued
`Nov. 2000, 6,146,934)
`5. B. Doyle and J. Lee, “Method for Forming a High Dielectric Constant Insulator in the
`Fabrication of an Integrated Circuit” filed Jan. 1999 (issued Oct. 2001, 6,306,742)
`Jack Lee and Han Zhao, “Tunnel Field Effect Transistor (TFET) with Lateral
`Oxidation,” filed Oct 14, 2011, (Pub. Date: Apr 18, 2013, US2013/0093497).
`Jack C. Lee and Fei Xue, “Vertical III-V Nanowire Field-Effect Transistor Using
`Nanosphere Lithography,” (issued Dec. 18, 2015, 9,048,330).
`
`6.
`
`7.
`
`
`Book / Book Chapters
`
`1. Cheng Chih Hsieh, Yao-Feng Chang, Ying-Chen Chen, Chih-Yang Lin, Meiqi Guo,
`Fei Zhou, Burt Fowler, Ting-Chang Chang, Sanjay Banerjee, Jack C. Lee, “Memristor
`and Memristive Neural Networks: Review of Recently Progress on Memcomputing
`(Memristor + Computing) Applications in Intrinsic SiOx-Based Resistive Switching
`Memory”, ISBN: 978-953-51-5481-5, InTech (2018).
`
`2. Yao-Feng Chang, Burt Fowler, Ying-Chen Chen, Fei Zhou, Kuan-Chang Chang,
`Tsung-Ming Tsai, Ting-Chang Chang, Simon M. Sze, and Jack C. Lee, "A Synaptic
`Device Built in One Diode-One Resistor (1D-1R) Architecture with Intrinsic SiOx-
`based Resistive Switching Memory", Nano Devices and Sensors, Published by De
`Gruyter publisher, March (2016).
`
`
`3. Yao-Feng Chang, Burt Fowler, Ying-Chen Chen, Fei Zhou, Kuan-Chang Chang, Tsung-
`Ming Tsai, Ting-Chang Chang, Simon M. Sze, and Jack C. Lee, "A Synaptic Device Built
`in One Diode-One Resistor (1D-1R) Architecture with Intrinsic SiOx-based Resistive
`Switching Memory", Nano Devices and Sensors, p. 91-112, ISBN: 978-1-5015-0153-1,
`Published by De Gruyter, (March 2016).
`
`
`4. Yao-Feng Chang, Burt Fowler, Ying-Chen Chen, Fei Zhou, Xiaohan Wu, Yen-Ting Chen,
`Yanzhen Wang, Fei Xue, and Jack C. Lee, “Resistive Switching Characteristics and
`Mechanisms in Silicon Oxide Memory Devices,” Nano Devices and Sensors, p. 73-90,
`ISBN: 978-1-5015-0153-1, Published by De Gruyter publisher, (March 2016).
`
`
`5. Y. H. Kim and J. Lee, “Hf-Based High-K Dielectrics, Process Development,
`Performance Characterization and Reliability,” ISBN: 9781598290042, Morgan and
`Claypool Publishers (Jan. 2006).
`
`App. 0552
`
`

`

`Case 1:16-cv-00290-MN Document 103-3 Filed 10/17/18 Page 10 of 150 PageID #: 2411
`
`
`6. K. Onishi and J. Lee, “High-k Transistor Characteristics” in the book entitled, “High k
`Gate Dielectrics” (Ed. Michel Houssa), ISBN:0-7503-0906-7, published by IOP
`Publishing Ltd (2004).
`
`
`
`
`App. 0553
`
`

`

`Jose,
` As a courtesy, attached you will find IP Bridge’s supplemental constructions for the disputed terms in
`the ’796, ’431, and ’401 patents. To further narrow the parties’ dispute, and because OmniVision contends
`no construction is needed, IP Bridge is dropping the following two terms in claims 12 and 17 of the ’950
`patent:
`• “trench isolation on the semiconductor substrate”; and
`• “forming . . . on”.
`As a result, there is no need for the parties to offer the Court proposed constructions for these two terms.
` On Tuesday, Stam asked Bindu if OmniVision would agree to extend the page limitations currently
`imposed on the parties’ claim construction briefing by Local Rule 7.1.3(4). Tomorrow, IP Bridge will be
`filing a motion requesting an extension of the page limitations. Specifically, IP Bridge will ask the Court to
`(1) increase the total page limit from 30 pages to 40 pages and (2) permit the parties to use the 40 pages as
`they see fit (e.g., 30 pages for opening brief and 10 pages for response brief, instead of the current 20/10
`page limitation). Please let us know if OmniVision opposes the relief that IP Bridge will seek.
` Thank you,
`Sam
` Samuel E. Joyner
` NOTICE OF CONFIDENTIALITY:
`
`Sam Joyner <sjoyner@ShoreChan.com>
`From:
`Sent:
`Thursday, August 23, 2018 1:19 PM
`Villarreal, Jose
`To:
`WSGR - OVT/IP Bridge; IPB_OMNI_DE_OpposingCounsel; TeamIPB_Omni_DE_290
`Cc:
`Godo Kaisha IP Bridge 1 v. OmniVision Technologies, No. 1:16-cv-00290-JFB-SRF (D.
`Subject:
`Del.)--IP Bridge’s supplemental constructions and other related matters
`2018-08-23 IBP Suppl Markman Proposals.pdf
`Attachments:
`Partner
`
`
` D 214.593.9124 / C 214.923.1543 / F 214.593.9111
`SJoyner@ShoreChan.com / ShoreChan.com
` Shore Chan DePumpo LLP
`901 Main Street / Suite 3300 / Dallas, Texas 75202
`The information contained in and transmitted with this e-mail may be subject to the Attorney-Client and Attorney Work Product privileges, and is
`Confidential. It is intended only for the individuals or entities designated as recipients above. You are hereby notified that any dissemination, distribution,
`copying, use or reliance upon the information contained in and transmitted with this e-mail by or to anyone other than the addressee designated above by the
`sender is unauthorized and strictly prohibited. If you have received this e-mail in error, please notify the sender by reply immediately. Any e-mail erroneously
`transmitted to you should be immediately destroyed.
`
`Case 1:16-cv-00290-MN Document 103-3 Filed 10/17/18 Page 11 of 150 PageID #: 2412
`
`S H ORE CHAN
`DEPUMPO
`P'
`
`1
`
`App. 0554
`
`

`

`Case 1:16-cv-00290-MN Document 103-3 Filed 10/17/18 Page 12 of 150 PageID #: 2413
`Plaintiff Godo Kaisha IP Bridge 1’s Supplemental Claim Construction Positions concerning U.S.
`Patent Nos. 8,084,796, 8,106,431, and 8,378,401.
`Claim Term
`IP Bridge’s Proposed
`Construction
`[SUPPLEMENTAL] each read-
`out line is connected to at least
`two transfer transistors that do
`not share a floating diffusion
`section
`This term has its plain and
`ordinary meaning and need not
`be construed.
`
`“a plurality of read-out lines
`each being selectively
`connected to at least two of
`the [plurality of] transfer
`transistors”1
`“photodiode”2
`
`OmniVision’s Proposed
`Construction
`Indefinite
`
`a photoelectric conversion
`section where incident light is
`converted to electric energy
`and where photoelectric
`converted charges are stored.
`Indefinite
`
`“a plurality of floating
`diffusion sections each
`being connected to ones of
`the [plurality of]
`photodiodes via each of a
`plurality of transfer
`transistors”3
`“wherein each of said
`plurality of floating
`diffusion sections is shared
`by said ones of the plurality
`of photodiodes which are
`adjacent to each other in the
`column direction”4
`“the plurality of read-out
`lines are disposed between
`the first and the second
`photodiodes”5
`“the first read-out line and
`the second read-out line are
`disposed between the row n
`and the row n+1”6
`
`[SUPPLEMENTAL] each
`floating diffusion section is
`connected to a set of
`photodiodes via each of a set of
`transfer transistors that do not
`share the same read-out line
`
`[SUPPLEMENTAL] wherein
`each of said plurality of floating
`diffusion sections is shared by
`said ones of the plurality of
`photodiodes which are adjacent
`to each other in the column
`direction
`[SUPPLEMENTAL] each read-
`out line is connected to one of
`the first transfer transistor and
`the second transfer transistor
`[SUPPLEMENTAL] the first
`read-out line and the second-
`read out line are each connected
`to one of the transfer transistors,
`in the rows n and n+1, that share
`a floating diffusion section
`
`Indefinite
`
`Indefinite
`
`the first read-out line and the
`second read-out line are
`located within the space
`defined by the adjacent edges
`of the row n of photodiodes
`and the row n+1 of
`photodiodes
`
`
`1 This term is in the ’796 patent (claims 1, 3),’431 patent (claims 1, 5, 9), and’401 patent (claims 1, 29).
`2 This term is in the ’796 patent (claims 1, 3),’431 patent (claims 1, 4, 5, 9, 12), and’401 patent (claims 1, 4, 29).
`3 This term is in the ’796 patent (claims 1 and 3),’431 patent (claims 1, 5, 9), and’401 patent (claims 1, 29).
`4 This term is in the ’431 patent (claim 4).
`5 This term is in the ’796 patent (claims 1, 3).
`6 This claim is in the ’431 patent (claims 1, 5, 9).
`
`
`
`1
`
`App. 0555
`
`

`

`Case 1:16-cv-00290-MN Document 103-3 Filed 10/17/18 Page 13 of 150 PageID #: 2414
`Plaintiff Godo Kaisha IP Bridge 1’s Supplemental Claim Construction Positions concerning U.S.
`Patent Nos. 8,084,796, 8,106,431, and 8,378,401.
`Claim Term
`IP Bridge’s Proposed
`Construction
`[SUPPLEMENTAL] one reset
`pulse line is connected, via a
`reset transistor, to a floating
`diffusion section shared by at
`least one photodiode in each of
`the rows n+1 and n+2
`[SUPPLEMENTAL] the first
`read-out line is connected to a
`transfer transistor that shares a
`floating diffusion section with a
`transfer transistor connected to
`the second read-out line
`[SUPPLEMENTAL] one of the
`column n and the column n+1 is
`electrically disposed between
`one of the plurality of signal
`lines and the other of the column
`n and the column n+1
`
`OmniVision’s Proposed
`Construction
`one of the plurality of reset
`pulse lines is located within
`the space defined by the
`adjacent edges of the row n+1
`of photodiodes and the row
`n+2 of photodiodes
`the first readout line is directly
`next to the second readout line
`
`one of the column n and the
`column n+1 is located within
`the space defined by the
`adjacent edges of one of the
`plurality of signal lines and the
`other of the column n and the
`column n+1, and wherein no
`signal lines are located within
`the space defined by the
`adjacent edges of the column n
`and the column n+1
`
`“one of the plurality of reset
`pulse lines is disposed
`between the row n+1 and
`the row n+2”7
`
`“the first read-out line is
`adjacent to the second read-
`out line”8
`
`“one of the column n and
`the column n+1 is disposed
`between one of the plurality
`of signal lines and the other
`of the column n and the
`column n+1”9
`
`
`
`
`7 This claim is in the ’431 patent (claims 1, 5, 9).
`8 This term is in the ’401 patent (claims 1, 29).
`9 This term is in the ’401 patent (claims 1, 29).
`
`
`
`2
`
`App. 0556
`
`

`

`From:
`Sent:
`To:
`Cc:
`Subject:
`Attachments:
`Counsel,
`
` This is a courtesy notice that OmniVision intends on updating its proposed claim construction of the term “the plurality
`of read-out lines are disposed between the first and the second photodiodes,” as indicated in the attached document.
` Regards,
`-Diya
` Diya Liu
`Wilson Sonsini Goodrich & Rosati
`900 South Capital of Texas Highway
`Las Cimas IV, Fifth Floor
`Austin, Texas 78746-5546
`Phone: 512-338-5403
` From: