`Case 1:16-cv-OO290-MN Document 1-14 Filed 04/22/16 Page 1 of 5 PageID #: 294
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`EXHIBIT N
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`Case 1:16-cv-00290-MN Document 1-14 Filed 04/22/16 Page 2 of 5 PageID #: 295
`EXHIBIT N - USP 7,126,174 - OmniVision Technologies, Inc. OV8858 (PureCel)
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`1. A semiconductor device, comprising:
`(A) a trench isolation surrounding (X) an active area of a semiconductor substrate;
`(B) a gate insulating film formed over the active area;
`(C) a gate electrode formed over the gate insulating film;
`(D) first L-shaped sidewalls formed over the side surfaces of the gate electrode;
`(E) first silicide layers formed on regions located on the sides of the first L-shaped sidewalls within the active area[;]
`(F) an interconnection formed on the trench isolation; and
`(G) second L-shaped sidewalls formed over the side surfaces of the interconnection.
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`SUBJECT TO CHANGE
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`1
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`Case 1:16-cv-00290-MN Document 1-14 Filed 04/22/16 Page 3 of 5 PageID #: 296
`EXHIBIT N - USP 7,126,174 - OmniVision Technologies, Inc. OV8858 (PureCel)
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`Claim 1
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`A semiconductor device, comprising: (A) a trench isolation surrounding (X) an active area of a semiconductor substrate; (B) a gate
`insulating film formed over the active area; (C) a gate electrode formed over the gate insulating film; (D) first L-shaped sidewalls
`formed over the side surfaces of the gate electrode;
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`(C)
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`(B)
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`(A)
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` (X)
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`(D)
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`(A)
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`SUBJECT TO CHANGE
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`2
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`Case 1:16-cv-00290-MN Document 1-14 Filed 04/22/16 Page 4 of 5 PageID #: 297
`EXHIBIT N - USP 7,126,174 - OmniVision Technologies, Inc. OV8858 (PureCel)
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`Claim 1
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`A semiconductor device, comprising: (A) a trench isolation surrounding (X) an active area of a semiconductor substrate; (B) a gate
`insulating film formed over the active area; (C) a gate electrode formed over the gate insulating film; (D) first L-shaped sidewalls
`formed over the side surfaces of the gate electrode;
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`(B)
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`SUBJECT TO CHANGE
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`3
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`Case 1:16-cv-00290-MN Document 1-14 Filed 04/22/16 Page 5 of 5 PageID #: 298
`EXHIBIT N - USP 7,126,174 - OmniVision Technologies, Inc. OV8858 (PureCel)
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`Claim 1
`(E) first silicide layers formed on regions located on the sides of the first L-shaped sidewalls within the active area[;] (F) an
`interconnection formed on the trench isolation; and (G) second L-shaped sidewalls formed over the side surfaces of the
`interconnection.
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`(C) a gate electrode
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`(F) an interconnection
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`(G)
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`(X) an active area
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`(E)
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`(E)
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`(D) first L-shaped sidewalls
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`(A) a trench isolation
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`SUBJECT TO CHANGE
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`4
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