Case 1:14-cv-01430-LPS Document 308 Filed 06/22/20 Page 1 of 51 PageID #: 20536
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`IN THE UNITED STATES DISTRICT COURT
`FOR THE DISTRICT OF DELAWARE
`
`ELM 3DS INNOVATIONS, LLC, a
`Delaware limited liability company,
`
`
`
`v.
`
`Plaintiff,
`
`SAMSUNG ELECTRONICS CO., LTD., a
`Korean business entity,
`SAMSUNG SEMICONDUCTOR, INC., a
`California corporation,
`SAMSUNG ELECTRONICS AMERICA,
`INC., a New York corporation, and SAMSUNG
`AUSTIN SEMICONDUCTOR,
`LLC, a Delaware limited liability company,
`
`Defendants.
`
`C.A. No. 14-cv-1430-LPS-CJB
`
`Jury Trial Demanded
`
`SECOND AMENDED COMPLAINT FOR PATENT INFRINGEMENT
`
`Plaintiff Elm 3DS Innovations, LLC (“Plaintiff” or “Elm 3DS”), by its attorneys, for its
`
`complaint against Defendants Samsung Electronics Co., Ltd., and its U.S. subsidiaries and related
`
`entities Samsung Semiconductor, Inc., Samsung Electronics America, Inc., and Samsung Austin
`
`Semiconductor, LLC (individually or collectively “Defendants” or “Samsung”) hereby supplements
`
`its First Amended Complaint (D.I. 18) and alleges as follows:
`
`INTRODUCTION
`
`1.
`
`This is an action for patent infringement under the Patent Laws of the United States,
`
`35 U.S.C. § 1 et seq., for infringing the following Elm 3DS patents:
`
`(a)
`
`U.S. Patent No. 7,193,239 (“Leedy ’239 patent”), entitled “Three Dimensional
`
`Structure Integrated Circuit,” owned by Elm 3DS Innovations, LLC (attached as
`
`Ex. 1);
`
`(b)
`
`U.S. Patent No. 7,474,004 (“Leedy ’004 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 2);
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`Case 1:14-cv-01430-LPS Document 308 Filed 06/22/20 Page 2 of 51 PageID #: 20537
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`(c)
`
`(d)
`
`(e)
`
`(f)
`
`(g)
`
`(h)
`
`(i)
`
`(j)
`
`(k)
`
`(l)
`
`2.
`
`U.S. Patent No. 7,504,732 (“Leedy ’732 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 3);
`
`U.S. Patent No. 8,410,617 (“Leedy ’617 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 4);
`
`U.S. Patent No. 8,629,542 (“Leedy ’542 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 5);
`
`U.S. Patent No. 8,653,672 (“Leedy ’672 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 6);
`
`U.S. Patent No. 8,796,862 (“Leedy ’862 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 7);
`
`U.S. Patent No. 8,841,778 (“Leedy ’778 patent”), entitled “Three Dimensional
`
`Memory Structure,” owned by Elm 3DS Innovations, LLC (attached as Ex. 8).
`
`U.S. Patent No. 8,907,499 (“Leedy ’499 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 9);
`
`U.S. Patent No. 8,928,119 (“Leedy ’119 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 10);
`
`U.S. Patent No. 8,933,570 (“Leedy ’570 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 11); and
`
`U.S. Patent No. 8,791,581 (“Leedy ’581 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 12).
`
`The Elm 3DS patents cover foundational semiconductor technologies in the design
`
`and manufacture of three-dimensional integrated circuits such as memory, processors, and image
`
`sensors. These fundamental technologies reduce manufacturing costs while improving speed and
`
`efficiency. Among other things, the Elm 3DS patents disclose technologies that enable
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`Case 1:14-cv-01430-LPS Document 308 Filed 06/22/20 Page 3 of 51 PageID #: 20538
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`semiconductor manufacturers to stack multiple integrated circuits (“die”) on top of one another
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`within one integrated circuit package, and to form interconnect circuitry for communication among
`
`the stacked die, including interconnect circuitry passing through silicon substrates in stacked
`
`integrated circuits.
`
`3.
`
`Samsung has infringed and continues to infringe the Elm 3DS patents, directly and
`
`indirectly, by making using, selling, offering for sale, and/or importing into the United States,
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`semiconductor products with multiple stacked die and/or electronics products containing the same;
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`and by encouraging third parties to use, sell, offer for sale, and/or import into the United States,
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`Samsung semiconductor products with multiple stacked die and/or electronics products containing
`
`the same, with knowledge of the Elm 3DS patents and in the infringement resulting therefrom.
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`4.
`
`Elm 3DS incorporates by reference “Elm’s Disclosure of Asserted Claims and
`
`Infringement Contentions,” served on Samsung 11/20/2015.
`
`THE PARTIES
`
`5.
`
`Elm 3DS Innovations, LLC, is a Delaware limited liability company with its principal
`
`address at 26147 Carmelo Street, Carmel, California 93923. Elm 3DS owns patents, originally issued
`
`to its President, inventor Glenn J. Leedy, covering Mr. Leedy’s groundbreaking technology for
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`thinning, vertically stacking and interconnecting integrated circuits.
`
`6.
`
`Samsung Electronics Co., Ltd. (“SEC”) is a Korean business entity that lists its global
`
`headquarters as 129, Samsung-ro, Yeongtong-gu, Suwon-si, Gyeonggi-do, Republic of Korea. On
`
`information and belief, SEC is the global leader in the electronics market, which includes computer
`
`memory and consumer electronics products such as mobile phones and tablet computers. On
`
`information and belief, SEC is the second largest semiconductor manufacturer in the world, and the
`
`leader in DRAM, NAND Flash, solid state drives (“SSDs”), mobile DRAM and graphics memory.
`
`On information and belief, SEC designs, manufactures, has manufactured, uses, offers for sale, sells
`
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`and/or imports into the United States—including into Delaware—billions of dollars of computer
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`memory and consumer electronics each year.
`
`7.
`
`Samsung Electronics America, Inc. (“SEA”) is a New York corporation that lists its
`
`headquarters as 85 Challenger Road, Ridgefield Park, New Jersey 07660. SEA is a wholly-owned
`
`subsidiary of SEC. On information and belief, SEA markets, uses, offers for sale, sells and/or
`
`imports into the United States—including into Delaware—various electronics products including,
`
`plasma TVs and cameras; computer monitors, laser printers and solid state drives; and handheld
`
`wireless smartphones.
`
`8.
`
`Samsung Semiconductor, Inc. (“SSI”) is a California corporation that lists its
`
`headquarters as 3655 North First Street, San Jose, California 95134. SSI is a wholly- owned
`
`subsidiary of SEC. On information and belief, SSI manufactures, has manufactured, uses, offers for
`
`sale, sells and/or imports into the United States—including into Delaware—various semiconductor
`
`products including DRAM, NAND Flash, SSDs, mobile DRAM, graphics memory, and system
`
`logic.
`
`9.
`
`Samsung Austin Semiconductor, LLC (“SAS”) is a Delaware limited liability
`
`company that lists its headquarters as 12100 Samsung Boulevard, Austin, TX 78754. On information
`
`and belief, SAS operates as a subsidiary of SSI. On information and belief, SAS operates a
`
`semiconductor fabrication plant in Austin, TX, where it manufactures, has manufactured, uses,
`
`offers for sale, sells and/or imports into the United States—including into Delaware—NAND flash
`
`memory and system logic.
`
`10.
`
`This is an action for patent infringement, over which this Court has subject matter
`
`JURISDICTION
`
`jurisdiction pursuant to 28 U.S.C. §§ 1331 and 1338(a).
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`11.
`
`This Court has personal jurisdiction over each of the Defendants consistent with the
`
`requirements of the Due Process Clause of the United States Constitution and the Delaware Long
`
`Arm Statute. On information and belief, each Defendant transacts substantial business in Delaware,
`
`and/or has committed and continues to commit acts of patent infringement in Delaware as alleged
`
`in this Complaint. In addition, Samsung Telecommunications America, LLC and Samsung Austin
`
`Semiconductor, LLC are incorporated under the laws of Delaware. Further, on information and
`
`belief, the Defendants have admitted or not contested proper personal jurisdiction in this District in
`
`other patent infringement actions.
`
`VENUE
`
`12.
`
`Venue is proper in this District pursuant to 28 U.S.C. §§ 1391 (b)-(d) and 1400(b)
`
`because Defendants are subject to personal jurisdiction in this District, each has committed acts of
`
`patent infringement in this District, each has purposefully availed itself of the rights and benefits of
`
`Delaware law and regularly does and solicits business in Delaware, and each derives substantial
`
`revenue from things used or consumed in this District. Further, on information and belief, the
`
`Defendants have admitted or not contested proper venue in this District in other patent
`
`infringement actions.
`
`FACTUAL BACKGROUND
`
`I.
`
`The Elm 3DS Patents
`13.
`
`Plaintiff solely owns all rights, titles, and interests in and to the following United
`
`States patents (collectively, the “Elm 3DS Patents”), including the exclusive rights to bring suit with
`
`respect to any past, present, and future infringement thereof:
`
`(a)
`
`U.S. Patent No. 7,193,239 (“Leedy ’239 patent”), entitled “Three Dimensional
`
`Structure Integrated Circuit,” which was duly and legally issued on March 20, 2007,
`
`from a patent application filed July 3, 2003, with Glenn J. Leedy as the named
`
`5
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`inventor. The Leedy ’239 patent claims priority from U.S. Patent No. 5,915,167,
`
`which was duly and legally issued on June 22, 1999, from a patent application filed
`
`on April 4, 1997, with Glenn J. Leedy as the named inventor;
`
`(b)
`
`U.S. Patent No. 7,474,004 (“Leedy ’004 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on January 6, 2009, from a
`
`patent application filed December 18, 2003, with Glenn J. Leedy as the named
`
`inventor. The Leedy ’004 patent claims priority from U.S. Patent No. 5,915,167,
`
`which was duly and legally issued on June 22, 1999, from a patent application filed
`
`on April 4, 1997, with Glenn J. Leedy as the named inventor;
`
`(c)
`
`U.S. Patent No. 7,504,732 (“Leedy ’732 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on March 17, 2009, from a
`
`patent application filed August 19, 2002, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’732 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(d)
`
`U.S. Patent No. 8,410,617 (“Leedy ’617 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on April 2, 2013, from a
`
`patent application filed July 4, 2009, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’617 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`(e)
`
`U.S. Patent No. 8,629,542 (“Leedy ’542 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on January 14, 2014, from a
`
`patent application filed March 17, 2009, with Glenn J. Leedy as the named inventor.
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`6
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`The Leedy ’542 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(f)
`
`U.S. Patent No. 8,653,672 (“Leedy ’672 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on February 18, 2014, from a
`
`patent application filed May 27, 2010, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’672 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(g)
`
`U.S. Patent No. 8,796,862 (“Leedy ’862 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on August 5, 2014, from a
`
`patent application filed August 9, 2013, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’862 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(h)
`
`U.S. Patent No. 8,841,778 (“Leedy ’778 patent”), entitled “Three Dimensional
`
`Memory Structure,” which was duly and legally issued on September 23, 2014, from
`
`a patent application filed August 9, 2013, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’778 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(i)
`
`U.S. Patent No. 8,907,499 (“Leedy ’499 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on December 9, 2014, from a
`
`patent application filed January 4, 2013, with Glenn J. Leedy as the named inventor.
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`7
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`The Leedy ’499 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(j)
`
`U.S. Patent No. 8,928,119 (“Leedy ’119 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on January 6, 2015, from a
`
`patent application filed March 17, 2009, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’119 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(k)
`
`U.S. Patent No. 8,933,570 (“Leedy ’570 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on January 13, 2015, from a
`
`patent application filed March 17, 2009, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’570 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor; and
`
`(l)
`
`U.S. Patent No. 8,791,581 (“Leedy ’581 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on July 29, 2014, from a patent
`
`application filed October 23, 2013, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’581 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor.
`
`Each of the Elm 3DS Patents is valid and enforceable.
`
`14.
`
`The Elm 3DS Patents disclose three-dimensional integrated circuit structures and
`
`methods for manufacturing the same. In one exemplary embodiment, the patents disclose a three-
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`dimensional structure with thinned and polished integrated circuit substrates that are stacked on top
`
`of one another and electrically connected. The disclosed technology enhances memory speed and
`
`efficiency because the signal paths are shorter. The disclosed technology also improves memory
`
`density because multiple storage arrays can be stacked within a single package that meets industry
`
`form-factor requirements. Industry implementations are referred to as “stacked” memories that are
`
`electrically connected with either wire bonds or through-silicon vias (“TSV”).
`
`II. The Inventor
`15.
`
`Glenn J. Leedy is the sole named inventor on the Elm 3DS Patents. Mr. Leedy had
`
`been involved in the information technology industry since the 1960s. Working first for established
`
`IT companies such as IBM and Fairchild Semiconductor, and eventually as an independent inventor,
`
`Mr. Leedy had consistently developed essential technologies that have significantly advanced the
`
`state of the art. Today, Mr. Leedy’s foundational inventions are used in literally billions of
`
`semiconductor products around the world.
`
`16. Mr. Leedy graduated from the University of Michigan with a degree in Mathematics,
`
`in 1968.
`
`17.
`
`After working at IBM, the University of Michigan, Sycor and ComShare, Mr. Leedy
`
`joined Digital Equipment Corporation (“DEC”) in 1976. While there, Mr. Leedy assisted in the
`
`design of DEC’s first 32-bit minicomputer, and in the development of the first 16-bit
`
`microprocessor. Mr. Leedy also invented a solution for providing high-speed backup and restore for
`
`large databases, an advance in the technology that saved DEC and its customers millions of dollars.
`
`18. Mr. Leedy joined Fairchild Semiconductor in 1978. While there, Mr. Leedy assisted in
`
`the development of gate-array programmable logic products. Mr. Leedy’s time at Fairchild also
`
`provided him with the opportunity to become familiar with the semiconductor fabrication processes
`
`used to manufacture the integrated circuits he helped design.
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`19.
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`In 1981, Mr. Leedy joined National Semiconductor. While there, Mr. Leedy assisted
`
`in the development of the computer industry’s first 32-bit microprocessor.
`
`20.
`
`In 1983, Mr. Leedy left National Semiconductor to start his own business: American
`
`Information Systems (“AIS”). Mr. Leedy formed his own business to continue inventing but with
`
`independent creative control and ownership of his inventions.
`
`21.
`
`Under Mr. Leedy’s direction, AIS developed and sold a 32-bit minicomputer. The
`
`minicomputer used the 32-bit National Semiconductor microprocessor Mr. Leedy had helped
`
`develop, and the minicomputer was instantly popular because it cost a fraction of the 32-bit DEC
`
`minicomputer Mr. Leedy worked on for his prior employer. AIS was short-lived, however, as
`
`National Semiconductor decided to cease manufacture and development of its 32-bit
`
`microprocessor. Without an affordable alternative 32-bit processor on the market, AIS’ cost-
`
`performance advantage disappeared and it was forced to shut down.
`
`22.
`
`After AIS, Mr. Leedy worked for General Research for several years before again
`
`going into business for himself in 1989. Mr. Leedy then devoted himself to finding solutions to the
`
`various technological challenges he had encountered during his two decades in the IT industry. Over
`
`the next few years, Mr. Leedy developed the technologies underlying two patent portfolios that
`
`disclose and claim foundational inventions found in modern semiconductors the world over.
`
`23.
`
`In the early 1990s, Mr. Leedy applied for and received a portfolio of patents built
`
`around his Membrane Dielectric Isolation (“MDI”) technology. The MDI technology uses a thin,
`
`flexible membrane of dielectric material to electrically isolate semiconductor devices such as
`
`transistors, which can then be used to form test circuitry.
`
`24. Mr. Leedy developed the MDI technology in an effort to develop a semiconductor-
`
`grade dielectric that could serve as a membrane for testing bare integrated circuits. Mr. Leedy first
`
`worked on integrated circuit fabrication equipment in the basement of a friend, and later with an
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`integrated circuit equipment manufacturer. One key aspect of the MDI technology was Mr. Leedy’s
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`development of a tensile low-stress dielectric that could be fabricated into a flexible, free-standing
`
`membrane. The ductile characteristics of the novel membrane permitted “at speed” testing of
`
`integrated circuits while in wafer form.
`
`25. Mr. Leedy’s MDI technology enabled testing methods and devices that ultimately
`
`became essential components in the semiconductor manufacturing process, a fact validated by Mr.
`
`Leedy’s sale of the MDI patent portfolio in 2008 to Taiwan Semiconductor Manufacturing Co., the
`
`world’s largest semiconductor foundry.
`
`26.
`
`Following the successful development of his MDI technology, Mr. Leedy next
`
`applied for and received a portfolio of patents built around his Three-Dimensional Stacked “3DS”
`
`integrated circuit technology. The 3DS technology uses thinned, polished, flexible substrates to
`
`form vertical stacks of integrated circuits that are connected to one another using either wire-bonds,
`
`or vertical interconnects that pass through the stacked substrates.
`
`27. Mr. Leedy developed the 3DS technology in an effort to solve the processor-
`
`memory bottleneck—a longstanding barrier in computer-system design. The bottleneck arises when
`
`a computer’s processor is able to request and process data faster than the memory is able to provide
`
`it. Mr. Leedy believed that building the memory vertically, by stacking memory circuits on top of
`
`each other, rather than laying the memory circuits out horizontally, would shorten the electrical
`
`paths used to read and write data, thereby improving memory read/write speeds. Mr. Leedy was the
`
`first to understand that, in order to obtain an acceptable yield when stacking and connecting
`
`multiple thinned and polished integrated circuits, one needed to use a tensile low-stress dielectric
`
`layer to retain the structural integrity of the thinned and polished substrates. This prevented the
`
`substrates from cracking or warping, which can cause “bad” die.
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`11
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`28. Mr. Leedy maintained control over the Elm 3DS portfolio until his passing in July
`
`2017, as Elm 3DS’s President, and was extremely active in its development. In preparing the 3DS
`
`technology for patenting, Mr. Leedy drafted a rich specification that provides— among other
`
`things—a detailed account of the technical aspects of his inventions, the benefits associated with
`
`the inventions, and various embodiments of the inventions. The disclosures in the specification have
`
`provided enormous benefit to the semiconductor industry, and also permitted Mr. Leedy to claim
`
`the technical aspects of his inventions across the portfolio in many different ways that the
`
`semiconductor industry can understand. He continued to prosecute a number of patent applications
`
`that arose from his groundbreaking inventions until July 2017.
`
`29. Mr. Leedy’s 3DS technology has allowed semiconductor manufacturers to improve
`
`performance and to lower the “cost-per-bit” of memory storage. Using thin integrated circuits
`
`allows manufacturers to stack multiple integrated circuits in a single industry-standard package with
`
`a thickness of 1.2 mm, a feature demanded by form- factor sensitive industries such as servers and
`
`smartphones. Further, using vertical interconnects improves memory speed, reduces power
`
`consumption, and shrinks the integrated circuit footprint.
`
`30.
`
`Presently, all three leading memory manufacturers—Samsung, SK Hynix and
`
`Micron—use Mr. Leedy’s 3DS technology in various stacked semiconductor products. And in the
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`future the industry’s adoption of Mr. Leedy’s 3DS technology will become more widespread, as the
`
`cost of propagating Moore’s Law and fitting more and more transistors on a single silicon die
`
`becomes increasingly cost-prohibitive.
`
`31.
`
`In 2006, the transistor design node used to fabricate leading microprocessors was 65
`
`nm. Today, the transistor design node used to fabricate leading microprocessors is 22 nm. According
`
`to one industry report, constructing a semiconductor fabrication facility at the 65 nm transistor
`
`design node cost under $3 billion, and designing a chip for fabrication on the 65 nm node cost
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`12
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`under $50 million. http://www.eetimes.com/author.asp?section_id=36&doc_id=1323755 (last
`
`accessed Nov. 20, 2014) (attached as Ex. 13). According to the same report, constructing a
`
`semiconductor fabrication facility at the 22 nm node cost nearly $9 billion, and designing a chip for
`
`fabrication on the 22 nm node cost nearly $150 million.
`
`32. Mr. Leedy’s 3DS technology provides the solution to the compounding cost of
`
`semiconductor fabrication at smaller transistor nodes, by providing semiconductor manufacturers
`
`with the technologies needed to continue delivering faster, denser, and more efficient memories—it
`
`allows the manufacturers to expand memory up rather than out. The manufacturers’ adoption of
`
`this technology can be seen in their development of technologies such stacked NAND flash, the
`
`Hybrid Memory Cube (“HMC”), and TSV.
`
`III. The Meeting With Defendants
`33. Mr. Leedy personally met with Samsung America’s President in 2000 or 2001, shortly
`
`after issuance of the ’167 patent, the first in the 3DS family of patents, in 1999. During the meeting,
`
`Mr. Leedy provided Samsung America’s President with a slide presentation and a copy of the ’167
`
`patent, and explained the benefits of the patented technology. Mr. Leedy also explained that the
`
`technology was available to a limited number of licensees. Terms were not discussed, and a license
`
`agreement was never reached.
`
`IV. The Defendants’ Direct Infringement
`34.
`
`Despite not having a license to Mr. Leedy’s 3DS technology, Defendants have widely
`
`used it in their stacked memory products. Evidence of Defendants’ infringement can be found on
`
`their website, at www.samsung.com, where Defendants describe their stacked semiconductor
`
`products.
`
`35.
`
`According to Samsung’s website, it uses “High-density Packaging Technology for
`
`Flash memory products, which stacks individual memory chips on top of one another within a
`
`13
`
`

`

`Case 1:14-cv-01430-LPS Document 308 Filed 06/22/20 Page 14 of 51 PageID #: 20549
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`single package with a low-profile, enabling the production of flash memory devices with the highest
`
`densities and storage capacities.” Samsung further states that “Internally, the die stack design for the
`
`flash memorystack [sic] is critical factors[sic] to determine the packaging yield, its reliability of
`
`products, and its form factor.” See
`
`http://www.samsung.com/global/business/semiconductor/support/package-info/package-
`
`datasheet/flash (last accessed Nov. 20, 2014) (attached as Ex. 14).
`
`36.
`
`Samsung’s website represents that the “The immediate advantage of this [die-
`
`stacking] approach is a significant saving in the total area occupied by the memory device. The die
`
`stack design is thus extensively used in flash memory for applications where space is severely
`
`restricted, such as mobile handsets, SSDs, and memory cards, among others.” This technology “is
`
`resulting in faster and higher capacity nonvolatile storage devices, such as solid state drives.” See Ex.
`
`14. Samsung provides the following image of its die-stack design
`
`37.
`
`According to Samsung, the die-stacking technology allows it to provide the following
`
`
`
`benefits:
`
`14
`
`

`

`Case 1:14-cv-01430-LPS Document 308 Filed 06/22/20 Page 15 of 51 PageID #: 20550
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` Ultra-high memory densities – Samsung flash memory is the highest density flash
`
`memory across the electronics and semiconductor segment. Samsung supplies 128 GB
`
`flash memory devices internally organized as 16-stack MCP flash memory, with 64 Gb
`
`per die.
`
` Lowest footprints and thinnest profiles – Samsung provides the smallest packages for all
`
`types of flash memory. Samsung’s processes make it easier to deploy the memory device
`
`in space-constrained applications such as SSD modules of notebooks, tablets and mobile
`
`handsets.
`
`38.
`
`An example of Samsung’s die-stacking technology in Flash NAND memory is
`
`shown below:
`
`DIE 1 DIE 2 DIE 3 DIE 4 DIE
`
`DIE 7 DIE
`
`DIE 16 DIE 15 DIE 14 DIE 13
`
`IE 12 DIE 11 DIE
`
`
`Samsung’s website also describes its 3D V-NAND technology, which, in addition to
`
`39.
`
`stacking die vertically, stacks memory cells vertically. See
`
`http://www.samsung.com/global/business/semiconductor/html/product/flash-
`
`15
`
`

`

`Case 1:14-cv-01430-LPS Document 308 Filed 06/22/20 Page 16 of 51 PageID #: 20551
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`solution/vnand/overview.html (last accessed Nov. 20, 2014) (attached as Ex. 15). On information
`
`and belief, Samsung offers 3D V-NAND in 2 stack, 4-stack, 8-stack and 16-stack configurations.
`
`40.
`
`Samsung’s website also discusses stacked memories in the context of its DRAM
`
`products. According to Samsung, the Flip Chip technology used in its DRAM packages means the
`
`products are suitable for future packaging technologies such as TSV.
`
`http://www.samsung.com/global/business/semiconductor/support/package-info/package-
`
`datasheet/dram (last accessed Nov. 20, 2014) (attached as Ex. 16).
`
`41.
`
` Samsung has represented that it is using TSV technology in its Wide IO Memory
`
`Solutions. According to a presentation, Samsung stated that it was applying 3D TSV to Logic and
`
`Wide IO Memory. http://www.samsung.com/us/business/oem-
`
`solutions/pdfs/Web_DAC2012_TSV_demo-ah.pdf (last accessed Nov. 20, 2014) (attached as Ex.
`
`17).
`
`42.
`
`One example of Samsung’s use of Wide IO technology with TSV—marketed as
`
`Widcon – is its Exynos 5 Octa processor. Samsung states that TSV provides better energy efficiency,
`
`higher bandwidth, maximum performance even at low clock speeds, and superior thermal
`
`dissipation for full performance at low power.
`
`http://www.samsung.com/global/business/semiconductor/minisite/Exynos/w/solution.html#?v=
`
`octa_widcon (last accessed Nov. 20, 2014) (attached as Ex. 18).
`
`16
`
`

`

`Case 1:14-cv-01430-LPS Document 308 Filed 06/22/20 Page 17 of 51 PageID #: 20552
`
`43.
`
`Samsung’s website provides the following illustrations and videos describing the
`
`Widcon technology in its Exynos Octa processors
`
`
`http://www.samsung.com/global/business/semiconductor/support/package-info/package-
`
`datasheet/application-processor (last accessed Nov. 20, 2014) (attached as Ex. 19).
`
`17
`
`

`

`Case 1:14-cv-01430-LPS Document 308 Filed 06/22/20 Page 18 of 51 PageID #: 20553
`
`44.
`
`Samsung has also represented that it is using TSV technology in some of its new
`
`DDR4 DRAM memory modules. According to a press release, “To build a 3D TSV DRAM
`
`package, the DDR4 dies are ground down as thin as a few dozen micrometers, then pierced to
`
`contain hundreds of fine holes. They are vertically connected through electrodes that are passed
`
`through the holes. As a result, the new 64GB TSV module performs twice as fast as a 64GB module
`
`that uses wire bonding packaging, while consuming approximately half the power.”
`
`http://www.samsung.com/global/business/semiconductor/news-events/press-
`
`releases/detail?newsId=13602 last accessed Nov. 20, 2014) (attached as Ex. 20).
`
`45.
`
`Further, “Samsung, has worked on improving 3D TSV technology since it developed
`
`40nm-class 8GB DRAM RDIMMs in 2010 and 30nm-class 32GB DRAM RDIMMs in 2011 using
`
`3D TSV. This year, Samsung started operating a new manufacturing system dedicated to TSV
`
`packaging, for mass producing the new server modules.” See id.
`
`46.
`
`Samsung’s use, sale, offer for sale and/or manufacture of stacked NAND, stacked
`
`DRAM, TSV and other stacked semiconductor products in the United States, and/or importation
`
`of said products into the United States, constitutes infringement of at least one of the Leedy ’239,
`
`’004, ’732, ’617, ’542, ’672, ’862, ’778, ’499, ’119, and ’570 patents.
`
`47.
`
`Samsung has directly infringed, and continues to infringe, literally or under the
`
`doctrine of equivalents, one or more claims of the Elm 3DS Patents by acting without authority to
`
`make, have made, use, offer to sell, sell within the United States, and/or import into the United
`
`States, semiconductor products that practice the claimed inventions, and/or electronics products
`
`that incorporate said semiconductor prod