Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 1 of 50 PageID #: 16829
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`Exhibit 6
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`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 2 of 50 PageID #: 16830
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`IN THE UNITED STATES DISTRICT COURT
`FOR THE DISTRICT OF DELAWARE
`
`
`
`
`Plaintiff,
`
`
`v.
`
`
`
`
`
`
`
`
`C.A. No. 1:14-cv-01432-LPS-CJB
`
`Jury Trial Demanded
`
`ELM 3DS INNOVATIONS, LLC, a
`Delaware limited liability company,
`
`
`
`
`SK HYNIX INC., a Korean corporation,
`SK HYNIX AMERICA INC., a California
`corporation,
`HYNIX SEMICONDUCTOR
`MANUFACTURING AMERICA INC., a
`California corporation, and
`SK HYNIX MEMORY SOLUTIONS
`INC., a Delaware corporation,
`
`
`
`
`
`
`
`Defendants.
`
`
`
`FIRST SECOND AMENDED COMPLAINT FOR PATENT INFRINGEMENT
`
`Plaintiff Elm 3DS Innovations, LLC (“Plaintiff” or “Elm 3DS”), by its attorneys, for its
`
`complaint against Defendants SK hynix Inc., and its U.S. subsidiaries and related entities SK hynix
`
`America Inc., Hynix Semiconductor Manufacturing America Inc., and SK hynix Memory Solutions
`
`Inc. (individually or collectively “Defendants” or “Hynix”) hereby alleges as follows:
`
`INTRODUCTION
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`1.
`
`This is an action for patent infringement under the Patent Laws of the United States,
`
`35 U.S.C. § 1 et seq., for infringing the following Elm 3DS patents:
`
`(a)
`
`U.S. Patent No. 7,193,239 (“Leedy ’239 patent”), entitled “Three Dimensional
`
`Structure Integrated Circuit,” owned by Elm 3DS Innovations, LLC (attached as
`
`Exhibit 1);
`
`(b)
`
`U.S. Patent No. 7,474,004 (“Leedy ’004 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Exhibit 2);
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`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 3 of 50 PageID #: 16831
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`(c)
`
`(d)
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`U.S. Patent No. 7,504,732 (“Leedy ’732 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Exhibit 3);
`
`U.S. Patent No. 8,035,233 (“Leedy ‘233 patent”), entitled “Adjacent Substantially
`
`Flexible Substrates Having Integrated Circuits That Are Bonded Together By Non-
`
`Polymeric Layer,” owned by Elm 3DS Innovations, LLC (attached as Exhibit 4);
`
`(e)(d) U.S. Patent No. 8,410,617 (“Leedy ’617 patent”), entitled “Three Dimensional
`
`Structure Memory” owned by Elm 3DS Innovations, LLC (attached as Exhibit 54);
`
`(f)(e) U.S. Patent No. 8,629,542 (“Leedy ’542 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Exhibit 65);
`
`(g)(f) U.S. Patent No. 8,653,672 (“Leedy ’672 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Exhibit 76);
`
`(h)(g) U.S. Patent No. 8,791,581 (“Leedy ’581 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Exhibit 87);
`
`(i)(h) U.S. Patent No. 8,796,862 (“Leedy ’862 patent”), entitled “Three Dimensional
`
`Memory Structure,” owned by Elm 3DS Innovations, LLC (attached as Exhibit 89);
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`(k)(i) U.S. Patent No. 8,841,778 (“Leedy ’778 patent”), entitled “Three Dimensional
`
`Memory Structure, owned by Elm 3DS Innovations, LLC (attached as Exhibit 109);
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`(l)(j) U.S. Patent No. 8,907,499 (“Leedy ’499 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Exhibit 110);
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`(m)(k) U.S. Patent No. 8,928,119 (“Leedy ’119 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Exhibit 121);
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`(n)(l) U.S. Patent No. 8,933,570 (“Leedy ’570 patent”), entitled “Three Dimensional
`
`Structure Memory,” owned by Elm 3DS Innovations, LLC (attached as Exhibit 132).
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`2
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`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 4 of 50 PageID #: 16832
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`2.
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`The Elm 3DS patents cover foundational semiconductor technologies in the design
`
`and manufacture of three-dimensional integrated circuits such as memory, processors, and image
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`sensors. These fundamental technologies reduce manufacturing costs while improving speed and
`
`efficiency. Among other things, the Elm 3DS patents disclose technologies that enable
`
`semiconductor manufacturers to stack multiple integrated circuits (“die”) on top of one another
`
`within one integrated circuit package, and to form interconnect circuitry for communication among
`
`the stacked die, including interconnect circuitry passing through silicon substrates in stacked
`
`integrated circuits.
`
`3.
`
`Hynix has infringed and continues to infringe the Elm 3DS patents, directly and
`
`indirectly, by making using, selling, offering for sale, and/or importing into the United States,
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`semiconductor products with multiple stacked die and/or electronics products containing the same;
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`and by encouraging third parties to use, sell, offer for sale, and/or import into the United States,
`
`Hynix semiconductor products with multiple stacked die and/or electronics products containing the
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`same, with knowledge of the Elm 3DS patents and in the infringement resulting therefrom.
`
`THE PARTIES
`
`4.
`
`Elm 3DS Innovations, LLC, is a Delaware limited liability company with its principal
`
`address at 26147 Carmelo Street, Carmel, California 93923. Elm 3DS owns patents, originally issued
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`to its President, inventor Glenn J. Leedy, covering Mr. Leedy’s groundbreaking technology for
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`thinning, vertically stacking and interconnecting integrated circuits.
`
`5.
`
`SK hynix Inc. is a Korean corporation with its principal place of business at 2091,
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`Gyeongchung-daero, Bubal-eub, Icheon-si, Gyeonggi-do, Republic of Korea. On information and
`
`belief, SK hynix Inc. previously did business under the name “Hynix Semiconductor Inc.” On
`
`information and belief, SK hynix Inc. is a global leader in producing semiconductor products, such
`
`as DRAM and NAND flash and System IC including CMOS Image Sensors. On information and
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`3
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`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 5 of 50 PageID #: 16833
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`belief, SK hynix Inc. designs, manufactures, has manufactured, uses, offers for sale, sells and/or
`
`imports into the United States—including into Delaware—billions of dollars of memory and
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`semiconductor technologies each year.
`
`6.
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`SK hynix America Inc. is a California corporation with its principal place of business
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`at 3101 North First Street, San Jose, CA 95134. On information and belief, SK hynix America Inc. is
`
`a subsidiary of SK hynix Inc. On information and belief, SK hynix America Inc. previously did
`
`business under the name “Hynix Semiconductor America Inc.” On information and belief, SK hynix
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`America Inc. develops, distributes, markets, manufactures, has manufactured, uses, offers for sale,
`
`sells and/or imports into the United States—including into Delaware— memory and logic types of
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`semiconductors, flash memory devices, application-specific integrated circuits, liquid crystal displays,
`
`and wireless communications systems, as well as flash drives for MP3 players, video- game consoles,
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`mobile phones, and other consumer electronics.
`
`7.
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`Hynix Semiconductor Manufacturing America Inc. (“HSMA”) is a California
`
`corporation with its principal place of business at 3101 North First Street, San Jose, CA 95134. On
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`information and belief, HSMA is a wholly-owned subsidiary of SK hynix Inc. On information and
`
`belief, HSMA manufactures, has manufactured, uses, offers for sale, sells and/or imports into the
`
`United States—including into Delaware— dynamic random access memory chips.
`
`8.
`
`SK hynix Memory Solutions Inc. is a Delaware corporation with its principal place
`
`of business at 3101 North First Street, San Jose, CA 95134. On information and belief, SK hynix
`
`Memory Solutions is a wholly-owned subsidiary of SK hynix Inc. On information and belief, SK
`
`hynix Memory Solutions Inc. develops, manufactures, has manufactured, uses, offers for sale, sells
`
`and/or imports into the United States—including into Delaware— custom system-on-chip solutions
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`for peripheral data storage devices and provides solutions for NAND flash controllers and solid-
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`state-drive controllers.
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`4
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`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 6 of 50 PageID #: 16834
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`JURISDICTION
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`9.
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`This is an action for patent infringement, over which this Court has subject matter
`
`jurisdiction pursuant to 28 U.S.C. §§ 1331 and 1338(a).
`
`10.
`
`This Court has personal jurisdiction over each of the Defendants consistent with the
`
`requirements of the Due Process Clause of the United States Constitution and the Delaware Long
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`Arm Statute. On information and belief, each Defendant transacts substantial business in Delaware,
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`and/or has committed and continues to commit acts of patent infringement in Delaware as alleged
`
`in this Complaint. In addition, SK hynix Memory Solutions Inc. is incorporated under the laws of
`
`Delaware. Further, on information and belief, the Defendants have admitted or not contested
`
`proper personal jurisdiction in this District in other patent infringement actions.
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`VENUE
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`11.
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`Venue is proper in this District pursuant to 28 U.S.C. §§ 1391 (b)-(d) and 1400(b)
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`because Defendants are subject to personal jurisdiction in this District, each has committed acts of
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`patent infringement in this District, each has purposefully availed itself of the rights and benefits of
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`Delaware law and regularly does and solicits business in Delaware, and each derives substantial
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`revenue from things used or consumed in this District. Further, on information and belief, the
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`Defendants have admitted or not contested proper venue in this District in other patent
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`infringement actions.
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`FACTUAL BACKGROUND
`
`I.
`
`The Elm 3DS Patents
`12.
`
`Plaintiff solely owns all rights, titles, and interests in and to the following United
`
`States patents (collectively, the “Elm 3DS Patents”), including the exclusive rights to bring suit with
`
`respect to any past, present, and future infringement thereof:
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`5
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`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 7 of 50 PageID #: 16835
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`(a)
`
`U.S. Patent No. 7,193,239 (“Leedy ’239 patent”), entitled “Three Dimensional
`
`Structure Integrated Circuit,” which was duly and legally issued on March 20, 2007,
`
`from a patent application filed July 3, 2003, with Glenn J. Leedy as the named
`
`inventor. The Leedy ’239 patent claims priority from U.S. Patent No. 5,915,167,
`
`which was duly and legally issued on June 22, 1999, from a patent application filed
`
`on April 4, 1997, with Glenn J. Leedy as the named inventor;
`
`(b)
`
`U.S. Patent No. 7,474,004 (“Leedy ’004 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on January 6, 2009, from a
`
`patent application filed December 18, 2003, with Glenn J. Leedy as the named
`
`inventor. The Leedy ’004 patent claims priority from U.S. Patent No. 5,915,167,
`
`which was duly and legally issued on June 22, 1999, from a patent application filed
`
`on April 4, 1997, with Glenn J. Leedy as the named inventor;
`
`(c)
`
`U.S. Patent No. 7,504,732 (“Leedy ’732 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on March 17, 2009, from a
`
`patent application filed August 19, 2002, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’732 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(d)
`
`U.S. Patent No. 8,035,233 (“Leedy ‘233 patent”), entitled “Adjacent Substantially
`
`Flexible Substrates Having Integrated Circuits That Are Bonded Together By Non-
`
`Polymeric Layer,” which was duly and legally issued on October 11, 2011, from a
`
`patent application filed March 3, 2003, with Glenn J. Leedy as the named inventor.
`
`The Leedy ‘233 patent claims priority from U.S. Patent No. 5,915,167, which was
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`6
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`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 8 of 50 PageID #: 16836
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`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
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`1997, with Glenn J. Leedy as the named inventor;
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`(e)(d) U.S. Patent No. 8,410,617 (“Leedy ’617 patent”), entitled “Three Dimensional
`
`Structure Memory” which was duly and legally issued on April 2, 2013, from a patent
`
`application filed July 4, 2009, with Glenn J. Leedy as the named inventor. The Leedy
`
`’617 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`(f)(e) U.S. Patent No. 8,629,542 (“Leedy ’542 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on January 14, 2014, from a
`
`patent application filed March 17, 2009, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’542 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(g)(f) U.S. Patent No. 8,653,672 (“Leedy ’672 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on February 18, 2014, from a
`
`patent application filed May 27, 2010, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’672 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(h)(g) U.S. Patent No. 8,791,581 (“Leedy ’581 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on July 29, 2014 from a patent
`
`application filed October 23, 2013, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’581 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
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`7
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`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
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`Glenn J. Leedy as the named inventor;
`
`(i)(h) U.S. Patent No. 8,796,862 (“Leedy ’862 patent”), entitled “Three Dimensional
`
`Memory Structure,” which was duly and legally issued on August 5, 2014, from a
`
`patent application filed August 9, 2013, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’862 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(j)(i) U.S. Patent No. 8,841,778 (“Leedy ’778 patent”), entitled “Three Dimensional
`
`Memory Structure,” which was duly and legally issued on September 23, 2014, from
`
`a patent application filed August 9, 2013, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’778 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(k)(j) U.S. Patent No. 8,907,499 (“Leedy ’499 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on December 9, 2014, from a
`
`patent application filed January 4, 2013, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’499 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor;
`
`(l)(k) U.S. Patent No. 8,928,119 (“Leedy ’119 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on January 6, 2015, from a
`
`patent application filed March 17, 2009, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’119 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`8
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`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 10 of 50 PageID #: 16838
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`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
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`1997, with Glenn J. Leedy as the named inventor;
`
`(m)(l) U.S. Patent No. 8,933,570 (“Leedy ’570 patent”), entitled “Three Dimensional
`
`Structure Memory,” which was duly and legally issued on January 13, 2015, from a
`
`patent application filed March 17, 2009, with Glenn J. Leedy as the named inventor.
`
`The Leedy ’570 patent claims priority from U.S. Patent No. 5,915,167, which was
`
`duly and legally issued on June 22, 1999, from a patent application filed on April 4,
`
`1997, with Glenn J. Leedy as the named inventor.
`
`Each of the Elm 3DS Patents is valid and enforceable.
`
`13.
`
`The Elm 3DS Patents disclose three-dimensional integrated circuit structures and
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`methods for manufacturing the same. In one exemplary embodiment, the patents disclose a three-
`
`dimensional structure with thinned and polished integrated circuit substrates that are stacked on top
`
`of one another and electrically connected. The disclosed technology enhances memory speed and
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`efficiency because the signal paths are shorter. The disclosed technology also improves memory
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`density because multiple storage arrays can be stacked within a single package that meets industry
`
`form-factor requirements. Industry implementations are referred to as “stacked” memories that are
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`electrically connected with either wire bonds or through-silicon vias (“TSV”).
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`II. The Inventor
`14.
`
`Glenn J. Leedy is the sole named inventor on the Elm 3DS Patents. Mr. Leedy hads
`
`been involved in the information technology industry since the 1960s. Working first for established
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`IT companies such as IBM and Fairchild Semiconductor, and eventually as an independent inventor,
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`Mr. Leedy hads consistently developed essential technologies that have significantly advanced the
`
`state of the art. Today, Mr. Leedy’s foundational inventions are used in literally billions of
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`semiconductor products around the world.
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`9
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`15. Mr. Leedy graduated from the University of Michigan with a degree in Mathematics,
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`in 1968.
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`16.
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`After working at IBM, the University of Michigan, Sycor and ComShare, Mr. Leedy
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`joined Digital Equipment Corporation (“DEC”) in 1976. While there, Mr. Leedy assisted in the
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`design of DEC’s first 32-bit minicomputer, and in the development of the first 16-bit
`
`microprocessor. Mr. Leedy also invented a solution for providing high-speed backup and restore for
`
`large databases, an advance in the technology that saved DEC and its customers millions of dollars.
`
`17. Mr. Leedy joined Fairchild Semiconductor in 1978. While there, Mr. Leedy assisted in
`
`the development of gate-array programmable logic products. Mr. Leedy’s time at Fairchild also
`
`provided him with the opportunity to become familiar with the semiconductor fabrication processes
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`used to manufacture the integrated circuits he helped design.
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`18.
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`In 1981, Mr. Leedy joined National Semiconductor. While there, Mr. Leedy assisted
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`in the development of the computer industry’s first 32-bit microprocessor.
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`19.
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`In 1983, Mr. Leedy left National Semiconductor to start his own business: American
`
`Information Systems (“AIS”). Mr. Leedy formed his own business to continue inventing but with
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`independent creative control and ownership of his inventions.
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`20.
`
`Under Mr. Leedy’s direction, AIS developed and sold a 32-bit minicomputer. The
`
`minicomputer used the 32-bit National Semiconductor microprocessor Mr. Leedy had helped
`
`develop, and the minicomputer was instantly popular because it cost a fraction of the 32-bit DEC
`
`minicomputer Mr. Leedy worked on for his prior employer. AIS was short-lived, however, as
`
`National Semiconductor decided to cease manufacture and development of its 32-bit
`
`microprocessor. Without an affordable alternative 32-bit processor on the market, AIS’ cost-
`
`performance advantage disappeared and it was forced to shut down.
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`21.
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`After, Mr. Leedy worked for General Research for several years before again going
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`into business for himself in 1989. Mr. Leedy then devoted himself to finding solutions to the
`
`various technological challenges he had encountered during his two decades in the IT industry. Over
`
`the next few years, Mr. Leedy developed the technologies underlying two patent portfolios that
`
`disclose and claim foundational inventions found in modern semiconductors the world over.
`
`22.
`
`In the early 1990s, Mr. Leedy applied for and received a portfolio of patents built
`
`around his Membrane Dielectric Isolation (“MDI”) technology. The MDI technology uses a thin,
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`flexible membrane of dielectric material to electrically isolate semiconductor devices such as
`
`transistors, which can then be used to form test circuitry.
`
`23. Mr. Leedy developed the MDI technology in an effort to develop a semiconductor-
`
`grade dielectric that could serve as a membrane for testing bare integrated circuits. Mr. Leedy first
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`worked on integrated circuit fabrication equipment in the basement of a friend, and later with an
`
`integrated circuit equipment manufacturer. One key aspect of the MDI technology was Mr. Leedy’s
`
`development of a tensile low-stress dielectric that could be fabricated into a flexible, free-standing
`
`membrane. The ductile characteristics of the novel membrane permitted “at speed” testing of
`
`integrated circuits while in wafer form.
`
`24. Mr. Leedy’s MDI technology enabled testing methods and devices that ultimately
`
`became essential components in the semiconductor manufacturing process, a fact validated by Mr.
`
`Leedy’s sale of the MDI patent portfolio in 2008 to Taiwan Semiconductor Manufacturing Co., the
`
`world’s largest semiconductor foundry.
`
`25.
`
`Following the successful development of his MDI technology, Mr. Leedy next
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`applied for and received a portfolio of patents built around his Three-Dimensional Stacked “3DS”
`
`integrated circuit technology. The 3DS technology uses thinned, polished, flexible substrates to
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`form vertical stacks of integrated circuits that are connected to one another using either wire-bonds,
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`or vertical interconnects that pass through the stacked substrates.
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`26. Mr. Leedy developed the 3DS technology in an effort to solve the processor-
`
`memory bottleneck—a longstanding barrier in computer-system design. The bottleneck arises when
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`a computer’s processor is able to request and process data faster than the memory is able to provide
`
`it. Mr. Leedy believed that building the memory vertically, by stacking memory circuits on top of
`
`each other, rather than laying the memory circuits out horizontally, would shorten the electrical
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`paths used to read and write data, thereby improving memory read/write speeds. Mr. Leedy was the
`
`first to understand that, in order to obtain an acceptable yield when stacking and connecting
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`multiple thinned and polished integrated circuits, one needed to use a tensile low-stress dielectric
`
`layer to retain the structural integrity of the thinned and polished substrates. This prevented the
`
`substrates from cracking or warping, which can cause “bad” die.
`
`27. Mr. Leedy maintaineds control over the 3DS portfolio to this dayuntil his passing in
`
`July 2017, as 3DS IP’sElm 3DS’s President, and has beenwas extremely active in its development. In
`
`preparing the 3DS technology for patenting, Mr. Leedy drafted a rich specification that provides—
`
`among other things—a detailed account of the technical aspects of his inventions, the benefits
`
`associated with the inventions, and various embodiments of the inventions. The disclosures in the
`
`specification have provided enormous benefit to the semiconductor industry, and have also
`
`permitted Mr. Leedy to claim the technical aspects of his inventions across the portfolio in many
`
`different ways that the semiconductor industry can understand. He continueds to prosecute a
`
`number of patent applications that aroise from his groundbreaking inventions until July 2017.
`
`28. Mr. Leedy’s 3DS technology has allowed semiconductor manufacturers to improve
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`performance and to lower the “cost-per-bit” of memory storage. Using thin integrated circuits
`
`allows manufacturers to stack multiple integrated circuits in a single industry-standard package with
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`a thickness of 1.2 mm, a feature demanded by form- factor sensitive industries such as servers and
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`smartphones. Further, using vertical interconnects improves memory speed, reduces power
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`consumption, and shrinks the integrated circuit footprint.
`
`29.
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`Presently, all three leading memory manufacturers—Samsung, SK hynix and
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`Micron—use Mr. Leedy’s 3DS technology in various stacked semiconductor products. And in the
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`future the industry’s adoption of Mr. Leedy’s 3DS technology will become more widespread, as the
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`cost of propagating Moore’s Law and fitting more and more transistors on a single silicon die
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`becomes increasingly cost-prohibitive.
`
`30.
`
`In 2006, the transistor design node used to fabricate leading microprocessors was 65
`
`nm. TodayIn 2015, the transistor design node used to fabricate leading microprocessors is 22 nm.
`
`Today, the transistor design node used to fabricate leading microprocessors is 5 nm. According to
`
`one industry report, constructing a semiconductor fabrication facility at the 65nm transistor design
`
`node cost under $3 billion, and designing a chip for fabrication on the 65nm node cost under $50
`
`million. http://www.eetimes.com/author.asp?section_id=36&doc_id=1323755 (last accessed Nov.
`
`20, 2014) (attached as Exhibit 143). According to the same report, constructing a semiconductor
`
`fabrication facility at the 22 nm node cost nearly $9 billion, and designing a chip for fabrication on
`
`the 22 nm node cost nearly $150 million.
`
`31. Mr. Leedy’s 3DS technology provides the solution to the compounding cost of
`
`semiconductor fabrication at smaller transistor nodes, by providing semiconductor manufacturers
`
`with the technologies needed to continue delivering faster, denser, and more efficient memories—it
`
`allows the manufacturers to expand memory up rather than out. The manufacturers’ adoption of
`
`this technology can be seen in their development of technologies such as stacked NAND Flash, the
`
`Hybrid Memory Cube (“HMC”), and TSV.
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`13
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`

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`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 15 of 50 PageID #: 16843
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`III. The Meeting With Defendants
`32. Mr. Leedy personally met with Farhad Tabrizi, VP World Wide Marketing at Hyundai
`
`Semiconductor (now sk Hynix) in 2000 or 2001, shortly after issuance of the ’167 patent, the first in
`
`the 3DS family of patents, in 1999. Mr. Leedy was invited to Korea by Mr. Tabrizi. During the
`
`meeting, Mr. Leedy provided approximately 60 Hynix engineers with a presentation and a copy of
`
`the ’167 patent, and explained the benefits of the patented technology. Mr. Leedy also explained that
`
`the technology was available to a limited number of licensees. Terms were not discussed, and a
`
`license agreement was never reached.
`
`IV. The Defendants’ Direct Infringement
`33.
`
`Despite not having a license to Mr. Leedy’s 3DS technology, Defendants have widely
`
`used it in their stacked memory products. Evidence of Defendants’ infringement can be found on
`
`their website, at www.skhynix.com, where Defendants describe their stacked semiconductor
`
`products.
`
`34.
`
`According to Hynix’s website, Hynix uses stacked memory in at least some eMMC
`
`devices: “[A] Flash card that is embedded in the device is called eMMC and it integrates a Flash
`
`controller and high-speed NAND flash memory in a single FBGA package. The eMMC controller
`
`performs memory management, RAM buffering, defect management and Error Correction Code
`
`(ECC) functions, independent of the host CPU . . . The 32GB is designed by stacking eight 41nm
`
`32Gb NAND/MLC flash memory chips [and] an integrated controller all in a single FBGA (fine-
`
`pitched ball grid array) package measuring 12 x 18 x 1.4 (mm).”
`
`http://www.hynix.com/mail/newsletter_2009_06/newsletter_eng/sub01.html (last accessed Nov.
`
`20, 2014) (attached as Exhibit 145). A Hynix presentation provides a picture of die-stacking
`
`technology:
`
`14
`
`
`

`

`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 16 of 50 PageID #: 16844
`
`http://www.flashmemorysummit.com/English/Collaterals/Proceedings/2011/20110810_Keynote6
`
`_Lee.pdf (last accessed Nov. 20, 2014) (attached as Exhibit 156).
`
`35.
`
`Further, Hynix’s website represents that its “E2NAND 2.0 comes in a high density
`
`stack comprising the NAND Flash Controller and several NAND Flash dies. The existing
`
`E2NAND 1.0 is mainly focused on ECC functions to check and correct errors, on the other hand
`
`E2NAND 2.0 not only has the ECC function, but also features an advanced buffer and parallel
`
`processing function that significantly improves performance.”
`
`http://hynix.com/mail/newsletter_2010_03/eng/sub03.html (last accessed Nov. 20, 2014) (attached
`
`as Exhibit 167).
`
`36.
`
`Hynix’s press releases also discuss stacking memories suitable for mobile applications
`
`“Seoul, June 10, 2013 –SK Hynix Inc. (or ‘the Company’, www.skhynix.com) announced that it has
`
`developed the world’s first 8Gb (Gigabit) LPDDR3(Low Power DDR3) using its advanced 20nm
`
`class process technology. This product is a top-performance mobile memory solution which features
`
`15
`
`
`

`

`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 17 of 50 PageID #: 16845
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`high density, ultrahigh speed and low power consumption. The new products can be stacked up and
`
`realize a high density of maximum 4GB (Gigabytes, 32Gb) solution in a single package. In addition,
`
`the height of this package becomes dramatically thinner than the existing 4Gb-based one. In terms
`
`of its high density and competitive package height, it is suitable for the newest trend of the mobile
`
`applications.” http://www.skhynix.com/en/pr_room/news-data-view.jsp?search.seq=2235 (last
`
`accessed Nov. 20, 2014) (attached as Exhibit 178).
`
`37.
`
`An example of Hynix’s die-stacking technology in Flash NAND memory is shown
`
`below:
`
`38.
`
`Hynix has represented that it is using TSV technology in its High Bandwidth
`
`Memory. According to Hynix’s website, “HBM (High Bandwidth Memory) is a new future memory
`
`using TSV and Wide IO technology in order to satisfy performance requirement that has increased
`
`exponentially.” http://www.skhynix.com/gl/products/graphics/graphics_info.jsp (last accessed
`
`
`
`16
`
`
`

`

`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 18 of 50 PageID #: 16846
`
`March 22, 2015) (attached as Exhibit 189). Hynix’s website provides the following picture of the
`
`High Bandwidth Memory:
`
`
`A Hynix presentation provides the following image of Hynix’s TSV technology in High Bandwidth
`
`Memory:
`
`17
`
`
`

`

`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 19 of 50 PageID #: 16847
`
`
`
`http://www.hotchips.org/wp-content/uploads/hc_archives/hc26/HC26-11-day1-epub/HC26.11-
`
`3-Technology-epub/HC26.11.310-HBM-Bandwidth-Kim-Hynix-
`
`Hot%20Chips%20HBM%202014%20v7.pdf (last accessed Mar. 24, 2015) (attached as Exhibit
`
`1920).
`
`39.
`
`Hynix has also represented that it is using circuit block stacks or vaults in its High
`
`Bandwidth Memory:
`
`18
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`

`

`Case 1:14-cv-01432-LPS Document 266-6 Filed 05/13/20 Page 20 of 50 PageID #: 16848
`
`
`
`(See Ex. 2019). Each “die” is a separate semiconductor chip, connected by TSVs and organized into
`
`
`
`vaults, e.g., B0, B1, B2, B3.
`
`40.
`
`Hynix’s use, sale, offer for sale and/or manufacture of stacked NAND, stacked
`
`DRAM, HBM and other stacked semiconductor products in the United States, and/or importation
`
`of said products into the United States, constitutes infringement of at least one of the Leedy ’239,
`
`’004, ’732, 233,’617, ’542, ’672, ’581, ’862, ’778, ’499, ’119, and ’570 patents.
`
`41.
`
`Hynix has actual notice of the Leedy ’239, ’542, and ’672 patents and of the
`
`infringement alleged herein at least upon filing of the original Complaint [D.I. 1] (if not earlier),
`
`pursuant to 35 U.S.C. § 287(a). Hynix has had actual notice of the Leedy ’004, ’732, ‘233, ’617, ’581,
`
`’862, ’778, ’499, ’119, and ’570 patents and the infringement alleg