throbber
Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 1 of 50 PageID #: 16623
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`Exhibit 2
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`

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`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 2 of 50 PageID #: 16624
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`IN THE UNITED STATES DISTRICT COURT
`FOR THE DISTRICT OF DELAWARE
`
`
`ELM 3DS INNOVATIONS, LLC, a
`Delaware limited liability company,
`
`
`
`
`MICRON TECHNOLOGY, INC., a
`Delaware corporation, MICRON
`SEMICONDUCTOR
`PRODUCTS, INC., an Idaho corporation, and
`MICRON CONSUMER PRODUCTS
`GROUP, INC., a Delaware corporation,
`
`
`
`
`
`
`
`
`
`
`C.A. No. 1:14-cv-01431-LPS-CJB
`
`Jury Trial Demanded
`
`Plaintiff,
`
`Defendants.
`
`
`v.
`
`
`
`
`
`
`
`
`SECOND AMENDED COMPLAINT FOR PATENT INFRINGEMENT
`
`Plaintiff Elm 3DS Innovations, LLC (“Plaintiff” or “Elm 3DS”), by its attorneys, for its
`
`complaint against Defendants Micron Technology, Inc., and its subsidiaries and related entities
`
`Micron Semiconductor Products, Inc., and Micron Consumer Products Group, Inc. (individually or
`
`collectively “Defendants” or “Micron”) hereby alleges as follows:
`
`INTRODUCTION
`
`
`
`This is an action for patent infringement under the Patent Laws of the United States,
`
`35 U.S.C. § 1 et seq., for infringing the following Elm 3DS patents:
`
`(a)
`
`(b)
`
`(c)
`
`U.S. Patent No. 7,193,239 (“Leedy ’239 patent”), entitled “Three Dimensional Structure
`
`Integrated Circuit,” owned by Elm 3DS Innovations, LLC (attached as Ex. 1);
`
`U.S. Patent No. 7,474,004 (“Leedy ’004 patent”), entitled “Three Dimensional Structure
`
`Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 2);
`
`U.S. Patent No. 7,504,732 (“Leedy ’732 patent”), entitled “Three Dimensional Structure
`
`Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 3);
`
`

`

`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 3 of 50 PageID #: 16625
`
`(d)
`
`(e)
`
`(f)
`
`(g)
`
`(h)
`
`(i)
`
`(j)
`
`(k)
`
`(l)
`
`
`
`U.S. Patent No. 8,410,617 (“Leedy ’617 patent”), entitled “Three Dimensional Structure
`
`Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 4);
`
`U.S. Patent No. 8,629,542 (“Leedy ’542 patent”), entitled “Three Dimensional Structure
`
`Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 5);
`
`U.S. Patent No. 8,653,672 (“Leedy ’672 patent”), entitled “Three Dimensional Structure
`
`Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 6);
`
`U.S. Patent No. 8,791,581 (“Leedy ’581 patent”), entitled “Three Dimensional Structure
`
`Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 7);
`
`U.S. Patent No. 8,796,862 (“Leedy ’862 patent”), entitled “Three Dimensional Structure
`
`Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 8);
`
`U.S. Patent No. 8,841,778 (“Leedy ’778 patent”), entitled “Three Dimensional Memory
`
`Structure,” owned by Elm 3DS Innovations, LLC (attached as Ex. 9);
`
`U.S. Patent No. 8,907,499 (“Leedy ’499 patent”), entitled “Three Dimensional Structure
`
`Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 10);
`
`U.S. Patent No. 8,928,119 (“Leedy ’119 patent”), entitled “Three Dimensional Structure
`
`Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 11);
`
`U.S. Patent No. 8,933,570 (“Leedy ’570 patent”), entitled “Three Dimensional Structure
`
`Memory,” owned by Elm 3DS Innovations, LLC (attached as Ex. 12).
`
`The Elm 3DS Patents cover foundational semiconductor technologies in the design
`
`and manufacture of three-dimensional integrated circuits such as memory, processors, and image
`
`sensors. These fundamental technologies reduce manufacturing costs while improving speed and
`
`efficiency. Among other things, the Elm 3DS Patents disclose technologies that enable
`
`semiconductor manufacturers to stack multiple integrated circuits (“die”) on top of one another
`
`within one integrated circuit package, and to form interconnect circuitry for communication among
`
`2
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`

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`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 4 of 50 PageID #: 16626
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`the stacked die, including interconnect circuitry passing through silicon substrates in stacked
`
`integrated circuits.
`
`
`
`Micron has infringed and continues to infringe the Elm 3DS Patents, directly and
`
`indirectly, by making, using, selling, offering for sale, and/or importing into the United States,
`
`semiconductor products with multiple stacked die and/or electronics products containing the same;
`
`and by encouraging third parties to use, sell, offer for sale, and/or import into the United States,
`
`Micron semiconductor products with multiple stacked die and/or electronics products containing
`
`the same, with knowledge of the Elm 3DS Patents and in the infringement resulting therefrom.
`
`THE PARTIES
`
`
`
`Elm 3DS Innovations, LLC is a Delaware limited liability company with its principal
`
`address at 26147 Carmelo Street, Carmel, California 93923. Elm 3DS owns patents, originally issued
`
`to its President, inventor Glenn J. Leedy, covering Mr. Leedy’s groundbreaking technology for
`
`thinning, vertically stacking and interconnecting integrated circuits.
`
`
`
`Micron Technology, Inc. (“MTI”) is a Delaware corporation with its principal place
`
`of business at 8000 S. Federal Way, Boise, Idaho. On information and belief, MTI is a global leader
`
`in advanced memory and semiconductor technologies. On information and belief, MTI designs,
`
`manufactures, has manufactured, uses, offers for sale, sells and/or imports into the United States—
`
`including into Delaware—billions of dollars of memory and semiconductor technologies each year
`
`
`
`Micron Semiconductor Products, Inc. (“MSP”) is an Idaho corporation with its
`
`principal place of business in Boise, Idaho. On information and belief, MSP is a wholly-owned
`
`subsidiary of MTI. On information and belief, MSP manufactures, has manufactured, uses, offers
`
`for sale, sells and/or imports into the United States— including into Delaware—various
`
`semiconductor devices, including DRAM, DRAM modules, NAND flash, NOR flash, and phase
`
`change memory.
`
`3
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`

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`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 5 of 50 PageID #: 16627
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`
`
`Micron Consumer Products Groups, Inc. (“MCPG”) is a Delaware corporation with
`
`its principal place of business at 47300 Bayside Parkway, Fremont, California 94538. On information
`
`and belief, MCPG is a wholly-owned subsidiary of MTI. On information and belief, MCPG
`
`manufactures, has manufactured, uses, offers for sale, sells and/or imports into the United States—
`
`including into Delaware—various memory products for digital devices, including memory cards, SD
`
`cards, microSD cards, CompactFlash cards, CFast cards, XQD cards, and Memory Stick PRO Duo
`
`cards, as well as Image Rescue software to recover photo and video files from memory cards; card
`
`readers; USB flash drives and multipacks; and OEM products.
`
`JURISDICTION
`
`
`
`This is an action for patent infringement, over which this Court has subject matter
`
`jurisdiction pursuant to 28 U.S.C. §§ 1331 and 1338(a).
`
`
`
`This Court has personal jurisdiction over each of the Defendants consistent with the
`
`requirements of the Due Process Clause of the United States Constitution and/or the Delaware
`
`Long Arm Statute. On information and belief, each Defendant transacts substantial business in
`
`Delaware, and/or has committed and continues to commit acts of patent infringement in Delaware
`
`as alleged in this Complaint. In addition, Micron Technology, Inc. and Micron Consumer Products
`
`Group, Inc. are incorporated under the laws of Delaware. Further, on information and belief, the
`
`Defendants have admitted or not contested proper personal jurisdiction in this District in other
`
`patent infringement actions.
`
`VENUE
`
`
`
`Venue is proper in this District pursuant to 28 U.S.C. §§ 1391 (b)-(d) and 1400(b)
`
`because Defendants are subject to personal jurisdiction in this District, each has committed acts of
`
`patent infringement in this District, each has purposefully availed itself of the rights and benefits of
`
`Delaware law and regularly does and solicits business in Delaware, and each derives substantial
`
`4
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`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 6 of 50 PageID #: 16628
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`revenue from things used or consumed in this District. Further, on information and belief, the
`
`Defendants have admitted or not contested proper venue in this District in other patent
`
`infringement actions.
`
`I.
`
`The Elm 3DS Patents
`
`FACTUAL BACKGROUND
`
`
`
`Plaintiff solely owns all rights, titles, and interests in and to the following United
`
`States patents (collectively, the “Elm 3DS Patents”), including the exclusive rights to bring suit with
`
`respect to any past, present, and future infringement thereof:
`
`(a)
`
`U.S. Patent No. 7,193,239 (“Leedy ’239 patent”), entitled “Three Dimensional Structure
`
`Integrated Circuit,” which was duly and legally issued on March 20, 2007, from a patent
`
`application filed July 3, 2003, with Glenn J. Leedy as the named inventor. The Leedy
`
`’239 patent claims priority from U.S. Patent No. 5,915,167, which was duly and legally
`
`issued on June 22, 1999, from a patent application filed on April 4, 1997, with Glenn
`
`J. Leedy as the named inventor;
`
`(b)
`
`U.S. Patent No. 7,474,004 (“Leedy ’004 patent”), entitled “Three Dimensional Structure
`
`Memory,” which was duly and legally issued on January 6, 2009, from a patent
`
`application filed December 18, 2003, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’004 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`(c)
`
`U.S. Patent No. 7,504,732 (“Leedy ’732 patent”), entitled “Three Dimensional Structure
`
`Memory,” which was duly and legally issued on March 17, 2009, from a patent
`
`application filed August 19, 2002, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’732 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`5
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`

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`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 7 of 50 PageID #: 16629
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`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`(d)
`
`U.S. Patent No. 8,410,617 (“Leedy ’617 patent”), entitled “Three Dimensional Structure
`
`Memory,” which was duly and legally issued on April 2, 2013, from a patent
`
`application filed July 4, 2009, with Glenn J. Leedy as the named inventor. The Leedy
`
`’617 patent claims priority from U.S. Patent No. 5,915,167, which was duly and legally
`
`issued on June 22, 1999, from a patent application filed on April 4, 1997, with Glenn
`
`J. Leedy as the named inventor;
`
`(e)
`
`U.S. Patent No. 8,629,542 (“Leedy ’542 patent”), entitled “Three Dimensional Structure
`
`Memory,” which was duly and legally issued on January 14, 2014, from a patent
`
`application filed March 17, 2009, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’542 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`(f)
`
`U.S. Patent No. 8,653,672 (“Leedy ’672 patent”), entitled “Three Dimensional Structure
`
`Memory,” which was duly and legally issued on February 18, 2014, from a patent
`
`application filed May 27, 2010, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’672 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`(g)
`
`U.S. Patent No. 8,791,581 (“Leedy ’581 patent”), entitled “Three Dimensional Structure
`
`Memory,” which was duly and legally issued on July 29, 2014, from a patent
`
`application filed October 23, 2013, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’581 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`6
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`

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`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 8 of 50 PageID #: 16630
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`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`(h)
`
`U.S. Patent No. 8,796,862 (“Leedy ’862 patent”), entitled “Three Dimensional Structure
`
`Memory,” which was duly and legally issued on August 5, 2014, from a patent
`
`application filed August 9, 2013, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’862 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`(i)
`
`U.S. Patent No. 8,841,778 (“Leedy ’778 patent”), entitled “Three Dimensional Memory
`
`Structure,” which was duly and legally issued on September 23, 2014, from a patent
`
`application filed August 9, 2013, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’778 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`(j)
`
`U.S. Patent No. 8,907,499 (“Leedy ’499 patent”), entitled “Three Dimensional Structure
`
`Memory,” which was duly and legally issued on December 9, 2014, from a patent
`
`application filed January 4, 2013, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’499 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`(k)
`
`U.S. Patent No. 8,928,119 (“Leedy ’119 patent”), entitled “Three Dimensional Structure
`
`Memory,” which was duly and legally issued on January 6, 2015, from a patent
`
`application filed March 17, 2009, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’119 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`7
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`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 9 of 50 PageID #: 16631
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`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`(l)
`
`U.S. Patent No. 8,933,570 (“Leedy ’570 patent”), entitled “Three Dimensional Structure
`
`Memory,” which was duly and legally issued on January 13, 2015, from a patent
`
`application filed March 17, 2009, with Glenn J. Leedy as the named inventor. The
`
`Leedy ’570 patent claims priority from U.S. Patent No. 5,915,167, which was duly and
`
`legally issued on June 22, 1999, from a patent application filed on April 4, 1997, with
`
`Glenn J. Leedy as the named inventor;
`
`Each of the Elm 3DS Patents is valid and enforceable.
`
`
`
`The Elm 3DS Patents disclose three-dimensional integrated circuit structures and
`
`methods for manufacturing the same. In one exemplary embodiment, the patents disclose a three-
`
`dimensional structure with thinned and polished integrated-circuit substrates that are stacked on top
`
`of one another and electrically connected. The disclosed technology enhances memory speed and
`
`efficiency because the signal paths are shorter. The disclosed technology also improves memory
`
`density because multiple storage arrays can be stacked within a single package that meets industry
`
`form-factor requirements. Industry implementations are referred to as “stacked” memories that are
`
`electrically connected with either wire bonds or through- silicon vias (“TSV”).
`
`II.
`
`The Inventor
`
`
`
`Glenn J. Leedy is the sole named inventor on the Elm 3DS Patents. Mr. Leedy had
`
`been involved in the information technology industry since the 1960s. Working first for established
`
`IT companies such as IBM and Fairchild Semiconductor, and eventually as an independent inventor,
`
`Mr. Leedy had consistently developed essential technologies that have significantly advanced the
`
`state of the art. Today, Mr. Leedy’s foundational inventions are used in literally billions of
`
`semiconductor products around the world.
`
`8
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`

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`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 10 of 50 PageID #: 16632
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` Mr. Leedy graduated from the University of Michigan with a degree in Mathematics,
`
`in 1968.
`
`
`
`After working at IBM, the University of Michigan, Sycor and ComShare, Mr. Leedy
`
`joined Digital Equipment Corporation (“DEC”) in 1976. While there, Mr. Leedy assisted in the
`
`design of DEC’s first 32-bit minicomputer, and in the development of the first 16-bit
`
`microprocessor. Mr. Leedy also invented a solution for providing high-speed backup and restore for
`
`large databases, an advance in the technology that saved DEC and its customers millions of dollars.
`
` Mr. Leedy joined Fairchild Semiconductor in 1978. While there, Mr. Leedy assisted
`
`in the development of gate-array programmable logic products. Mr. Leedy’s time at Fairchild also
`
`provided him with the opportunity to become familiar with the semiconductor fabrication processes
`
`used to manufacture the integrated circuits he helped design.
`
`
`
`In 1981, Mr. Leedy joined National Semiconductor. While there, Mr. Leedy assisted
`
`in the development of the computer industry’s first 32-bit microprocessor.
`
`
`
`In 1983, Mr. Leedy left National Semiconductor to start his own business: American
`
`Information Systems (“AIS”). Mr. Leedy formed his own business to continue inventing but with
`
`independent creative control and ownership of his inventions.
`
`
`
`Under Mr. Leedy’s direction, AIS developed and sold a 32-bit minicomputer. The
`
`minicomputer used the 32-bit National Semiconductor microprocessor Mr. Leedy had helped
`
`develop, and the minicomputer was instantly popular because it cost a fraction of the 32-bit DEC
`
`minicomputer Mr. Leedy worked on for his prior employer. AIS was short-lived, however, as
`
`National Semiconductor decided to cease manufacture and development of its 32-bit
`
`microprocessor. Without an affordable alternative 32-bit processor on the market, AIS’ cost-
`
`performance advantage disappeared and it was forced to shut down.
`
`9
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`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 11 of 50 PageID #: 16633
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`
`
`After AIS, Mr. Leedy worked for General Research for several years before again
`
`going into business for himself in 1989. Mr. Leedy then devoted himself to finding solutions to the
`
`various technological challenges he had encountered during his two decades in the IT industry. Over
`
`the next few years, Mr. Leedy developed the technologies underlying two patent portfolios that
`
`disclose and claim foundational inventions found in modern semiconductors the world over.
`
`
`
`In the early 1990s, Mr. Leedy applied for and received a portfolio of patents built
`
`around his Membrane Dielectric Isolation (“MDI”) technology. The MDI technology uses a thin,
`
`flexible membrane of dielectric material to electrically isolate semiconductor devices such as
`
`transistors, which can then be used to form test circuitry.
`
` Mr. Leedy developed the MDI technology in an effort to develop a semiconductor-
`
`grade dielectric that could serve as a membrane for testing bare integrated circuits. Mr. Leedy first
`
`worked on integrated circuit fabrication equipment in the basement of a friend, and later with an
`
`integrated circuit equipment manufacturer. One key aspect of the MDI technology was Mr. Leedy’s
`
`development of a tensile low-stress dielectric that could be fabricated into a flexible, free-standing
`
`membrane. The ductile characteristics of the novel membrane permitted “at speed” testing of
`
`integrated circuits while in wafer form.
`
` Mr. Leedy’s MDI technology enabled testing methods and devices that ultimately
`
`became essential components in the semiconductor manufacturing process, a fact validated by Mr.
`
`Leedy’s sale of the MDI patent portfolio in 2008 to Taiwan Semiconductor Manufacturing Co., the
`
`world’s largest semiconductor foundry.
`
`
`
`Following the successful development of his MDI technology, Mr. Leedy next
`
`applied for and received a portfolio of patents built around his Three-Dimensional Stacked “3DS”
`
`integrated circuit technology. The 3DS technology uses thinned, polished, flexible substrates to form
`
`10
`
`

`

`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 12 of 50 PageID #: 16634
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`vertical stacks of integrated circuits that are connected to one another using either wire-bonds, or
`
`vertical interconnects that pass through the stacked substrates.
`
` Mr. Leedy developed the 3DS technology in an effort to solve the processor-
`
`memory bottleneck—a longstanding barrier in computer-system design. The bottleneck arises when
`
`a computer’s processor is able to request and process data faster than the memory is able to provide
`
`it. Mr. Leedy believed that building the memory vertically, by stacking memory circuits on top of
`
`each other, rather than laying the memory circuits out horizontally, would shorten the electrical
`
`paths used to read and write data, thereby improving memory read/write speeds. Mr. Leedy was the
`
`first to understand that, in order to obtain an acceptable yield when stacking and connecting
`
`multiple thinned and polished integrated circuits, one needed to use a tensile low-stress dielectric
`
`layer to retain the structural integrity of the thinned and polished substrates. This prevented the
`
`substrates from cracking or warping, which can cause “bad” die.
`
` Mr. Leedy maintained control over the 3DS portfolio until his passing in July 2017,
`
`as Elm 3DS’s President, and was extremely active in its development. In preparing the 3DS
`
`technology for patenting, Mr. Leedy drafted a rich specification that provides— among other
`
`things—a detailed account of the technical aspects of his inventions, the benefits associated with the
`
`inventions, and various embodiments of the inventions. The disclosures in the specification have
`
`provided enormous benefit to the semiconductor industry, and also permitted Mr. Leedy to claim
`
`the technical aspects of his inventions across the portfolio in many different ways that the
`
`semiconductor industry can understand. He continued to prosecute a number of patent applications
`
`that arose from his groundbreaking inventions until July 2017.
`
` Mr. Leedy’s 3DS technology has allowed semiconductor manufacturers to improve
`
`performance and to lower the “cost-per-bit” of memory storage. Using thin integrated circuits
`
`allows manufacturers to stack multiple integrated circuits in a single industry-standard package with
`
`11
`
`

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`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 13 of 50 PageID #: 16635
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`a thickness of 1.2 mm, a feature demanded by form- factor sensitive industries such as servers and
`
`smartphones. Further, using vertical interconnects improves memory speed, reduces power
`
`consumption, and shrinks the integrated-circuit footprint.
`
`
`
`Presently, all three leading memory manufacturers—Samsung, SK Hynix and
`
`Micron—use Mr. Leedy’s 3DS technology in various stacked semiconductor products. And in the
`
`future the industry’s adoption of Mr. Leedy’s 3DS technology will become more widespread, as the
`
`cost of propagating Moore’s Law and fitting more and more transistors on a single silicon die
`
`becomes increasingly cost-prohibitive.
`
`
`
`In 2006, the transistor design node used to fabricate leading microprocessors was 65
`
`nm. In 2015, the transistor design node used to fabricate leading microprocessors is 22 nm. Today,
`
`the transistor design node used to fabricate leading microprocessors is 5 nm. According to one
`
`industry report, constructing a semiconductor fabrication facility at the 65nm transistor design node
`
`cost under $3 billion, and designing a chip for fabrication on the 65nm node cost under $50 million.
`
`http://www.eetimes.com/author.asp?section_id=36&doc_id=1323755 (last accessed Nov. 20,
`
`2014) (attached as Ex. 13). According to the same report, constructing a semiconductor fabrication
`
`facility at the 22 nm node cost nearly $9 billion, and designing a chip for fabrication on the 22 nm
`
`node cost nearly $150 million.
`
` Mr. Leedy’s 3DS technology provides the solution to the compounding cost of
`
`semiconductor fabrication at smaller transistor nodes, by providing semiconductor manufacturers
`
`with the technologies needed to continue delivering faster, denser, and more efficient memories—it
`
`allows the manufacturers to expand memory up rather than out. The manufacturers’ adoption of
`
`this technology can be seen in their development of technologies such as stacked NAND Flash, the
`
`Hybrid Memory Cube (“HMC”), and TSV.
`
`12
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`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 14 of 50 PageID #: 16636
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`III. The Meeting With Defendants
` Mr. Leedy communicated with Micron’s CEO, Steve Appleton, and CTO shortly
`
`after issuance of the first Elm 3DS Patent, the ’167 patent, the first in the 3DS family of patents, in
`
`1999. Mr. Appleton referred Mr. Leedy to Mr. Durcan, Micron’s VP of technology. During this
`
`communication, Mr. Leedy provided Micron with a slide presentation and a copy of the ’167 patent,
`
`and explained the benefits of the patented technology. Mr. Leedy also explained that the technology
`
`was available to a limited number of licensees. Terms were not discussed, and a license agreement
`
`was never reached.
`
`IV. The Defendants’ Direct Infringement
`
`
`Despite not having a license to Mr. Leedy’s 3DS technology, Defendants have widely
`
`used it in their stacked memory products. Evidence of Defendants’ infringement can be found on
`
`their website, at www.micron.com, where Defendants describe their stacked semiconductor
`
`products.
`
`
`
`According to Micron’s website, Micron uses stacked memory in at least some multi-
`
`chip packages: “Stacking memory either in the same package as the applications processor or in a
`
`package that mounts on top of the processor package has been proven to improve signal quality and
`
`reduce the overall footprint for the system.”
`
`http://www.micron.com/~/media/Documents/Products/Technical%20Note/MCP/TN_10%2008
`
`.pdf (last accessed Nov. 20, 2014) (attached as Ex. 14).
`
` Micron’s website represents that the “ClearNAND devices are like regular NAND –
`
`the interface and package types are the same—but they integrate a controller into that package,
`
`along with up to eight NAND devices. The internal controller offloads ECC from the host
`
`controller, freeing designers from having to adjust their design every time the NAND changes.”
`
`13
`
`

`

`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 15 of 50 PageID #: 16637
`
`http://www.micron.com/%20products/managed-nand/clearnand (last accessed Nov. 20, 2014)
`
`(attached as Ex. 15).
`
` Micron’s website also discusses stacked memories in the context of its e- MMC
`
`products. According to Micron, “e-MMC memory, on the other hand, combines a NAND
`
`controller and high-capacity NAND Flash in a single BGA package.”
`
`http://www.micron.com/~/media/Documents/Products/White%20Paper/scaling_n
`
`onvolatile_mem_in_embedded_systems.pdf (last accessed Nov. 20, 2014) (attached as Ex. 16).
`
`
`
`An example of Micron’s die-stacking technology in LPDDR SRAM technology is
`
`shown below:
`
`14
`
`

`

`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 16 of 50 PageID #: 16638
`
`IE 1
`
`DIE 2
`
`DIE 3
`
`DIE 4
`
`
`
` Micron has represented that it is using stacked memory and TSV technology in its
`
`Hybrid Memory Cube. According to Micron’s website, the “Hybrid Memor Cube (HMC) represents
`
`an entirely new leap forward in memory technology. It combines high-speed logic and DRAM layers
`
`into one optimized 3D package that leverages through-silicon via (TSV) technology.”
`
`http://www.micron.com/products/hybrid-memory-cube (last accessed Nov. 20, 2014) (attached as
`
`Ex. 17). Further, “[a]t the core of the HMC is a small, high-speed logic layer that sits below vertical
`
`stacks of DRAM die that are connected using through-silicon-via (TSV) interconnects.”
`
`http://www.micron.com/products/hybrid-memory-cube/all-about-hmc (last accessed Nov. 20,
`
`15
`
`

`

`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 17 of 50 PageID #: 16639
`
`2014) (attached as Ex. 18). Micron’s website provides the following picture of the Hybrid Memory
`
`Cube:
`
` Micron presentation provides the following image of Micron’s TSV technology in its Hybrid
`
` A
`
`Memory Cube:
`
`16
`
`

`

`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 18 of 50 PageID #: 16640
`
`http://storageconference.us/2013/Presentations/Jeddeloh.pdf (last accessed Mar. 24, 2015)
`
`(attached as Ex. 19).
`
` Micron has also represented that it is using circuit block stacks or vaults in its Hybrid
`
`Memory Cube: “Within an HMC, memory is organized into vaults. Each vault is functionally and
`
`operationally independent.”
`
`http://www.hybridmemorycube.org/files/SiteDownloads/HMC_Specification%201_0.pdf (last
`
`accessed Mar. 24, 2015) (attached as Ex. 20). The Hybrid Memory Cube specification provides the
`
`following picture Micron’s vault technology in its Hybrid Memor Cube:
`
`
`
` Micron’s use, sale, offer for sale and/or manufacture of stacked NAND, stacked
`
`DRAM, HMC and other stacked semiconductor products in the United States, and/or importation
`
`17
`
`

`

`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 19 of 50 PageID #: 16641
`
`of said products into the United States, constitutes infringement of at least one of the Leedy ’239,
`
`’004, ’732, ’617, ’542, ’672, ’581, ’862, ’778, ’499, ’119, and ’570 patents.
`
` Micron had actual notice of the Leedy ’239, ’732, ’617, ’542, ’672, ’581, ’862, and ’778
`
`patents and the infringement alleged herein at least upon filing the original Complaint [D.I. 1] (if not
`
`earlier), pursuant to 35 U.S.C. § 287(a). Micron has had actual notice of the Leedy ’004, ’499, ’119,
`
`and ’570 patents and the infringement alleged herein at least upon filing the First Amended
`
`Complaint [D.I. 17] (if not earlier), pursuant to 35 U.S.C. § 287(a).
`
`
`
`Each of the Defendants has directly infringed, and continues to infringe, literally or
`
`under the doctrine of equivalents, one or more claims of the Elm 3DS Patents by acting without
`
`authority to make, have made, use, offer to sell, sell within the United States, and/or import into the
`
`United States semiconductor products that practice the patented inventions, and/or electronics
`
`products that incorporate said semiconductor products, including inter alia solid state drives (“SSD”)
`
`and Flash drives.
`
`
`
`The above-described acts of infringement committed by Defendants have caused
`
`injury and damage to Plaintiff, and will cause additional severe and irreparable injury and damages in
`
`the future.
`
`V.
`
`The Defendants’ Indirect Infringement
`
`GENERAL ALLEGATIONS
` Micron indirectly infringes the Elm 3DS Patents by inducing infringement by others,
`
`such as OEMs, manufacturers, importers, resellers, customers and end users under 35 U.S.C.
`
`§ 271(b) in this District and elsewhere in the United States. On information and belief, Micron has
`
`intended and continues to intend to induce patent infringement by these third parties and has had
`
`actual knowledge that the inducing acts would cause infringement or has been willfully blind to the
`
`possibility that its inducing acts would cause infringement. For example, Micron is aware of the Elm
`
`18
`
`

`

`Case 1:14-cv-01432-LPS Document 266-2 Filed 05/13/20 Page 20 of 50 PageID #: 16642
`
`3DS Patents, that the structural aspects of thinned, stacked, and electrically interconnected
`
`semiconductors are always present in infringing stacked semiconductor packages and cannot be
`
`modified by a purchaser of such stacked semiconductor packages and, therefore, that Micron’s
`
`customers will infringe one or more claims of the Elm 3DS Patents by incorporating such stacked
`
`semiconductor packages in other products, and that subsequent sales of such products in the United
`
`States would be a direct infringement of one or more claims of the Elm 3DS Patents.
`
`
`
`On information and belief, Micron indirectly infringes one or more claims of the
`
`Elm 3DS Patents by inducing numerous third-party OEMs, manufacturers, importers, resellers,
`
`customers, and end users to make, have made, use, sell, offer to sell in, and/or import into the
`
`United States, products that incorporate stacked semiconductor products and/or multiple
`
`semiconductor die that are thinned, stacked on top of and electrically connected to one another
`
`through vertical interconnects within a single chip package, which are manufactured by Micron and
`
`infringe one or more claims of the Elm 3DS Patents.
`
`
`
`On information and belief, Micron has designed, marketed,

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